
   `undef HBURST_WIDTH
   `undef HMASTER_WIDTH
   `undef HPROT_WIDTH
   `undef HRESP_WIDTH
   `undef HSIZE_WIDTH
   `undef HSPLIT_WIDTH
   `undef HTRANS_WIDTH
   `undef SINGLE
   `undef INCR
   `undef WRAP4
   `undef INCR4
   `undef WRAP8
   `undef INCR8
   `undef WRAP16
   `undef INCR16
   `undef OKAY
   `undef ERROR
   `undef RETRY
   `undef SPLIT
   `undef BYTE
   `undef HWORD
   `undef WORD
   `undef LWORD
   `undef DWORD
   `undef WORD4
   `undef WORD8
   `undef WORD16
   `undef IDLE
   `undef BUSY
   `undef NONSEQ
   `undef SEQ
   `undef READ
   `undef WRITE
   `undef TRUE
   `undef FALSE
   `undef zero8
   `undef zero16
   `undef zero32
   `undef KBYTE
   `undef USE_FOUNDATION
   `undef AHB_LITE
   `undef NUM_AHB_MASTERS
   `undef LOG2_NUM_INT_MASTERS
   `undef HADDR_WIDTH
   `undef AHB_DATA_WIDTH
   `undef AHB_MAX_ARBIF_WIDTH
   `undef AHB_XENDIAN
   `undef BIG_ENDIAN
   `undef AHB_HAS_XDCDR
   `undef REMAP
   `undef PAUSE
   `undef AHB_DELAYED_PAUSE
   `undef AHB_HAS_ARBIF
   `undef AHB_WTEN
   `undef AHB_WTEN_DEBUG
   `undef AHB_FULL_INCR
   `undef NUM_IAHB_SLAVES
   `undef NUM_NAHB_SLAVES
   `undef NUM_BAHB_SLAVES
   `undef R1_N_SA_0
   `undef R1_N_EA_0
   `undef R1_B_SA_0
   `undef R1_B_EA_0
   `undef HC_PRIORITIES
   `undef DFLT_MSTR_NUM
   `undef HC_DFLT_MSTR
   `undef EBTEN
   `undef GEN_HSEL0
   `undef PRIORITY_1
   `undef PRIORITY_2
   `undef PRIORITY_3
   `undef PRIORITY_4
   `undef PRIORITY_5
   `undef PRIORITY_6
   `undef PRIORITY_7
   `undef PRIORITY_8
   `undef PRIORITY_9
   `undef PRIORITY_10
   `undef PRIORITY_11
   `undef PRIORITY_12
   `undef PRIORITY_13
   `undef PRIORITY_14
   `undef PRIORITY_15
   `undef VISIBLE_1
   `undef MR_N1
   `undef MR_B1
   `undef HSEL_ONLY_S1
   `undef ALIAS_S1
   `undef SPLIT_CAPABLE_1
   `undef R1_N_SA_1
   `undef R1_N_EA_1
   `undef R2_N_SA_1
   `undef R2_N_EA_1
   `undef R3_N_SA_1
   `undef R3_N_EA_1
   `undef R4_N_SA_1
   `undef R4_N_EA_1
   `undef R5_N_SA_1
   `undef R5_N_EA_1
   `undef R6_N_SA_1
   `undef R6_N_EA_1
   `undef R7_N_SA_1
   `undef R7_N_EA_1
   `undef R8_N_SA_1
   `undef R8_N_EA_1
   `undef R1_B_SA_1
   `undef R1_B_EA_1
   `undef R2_B_SA_1
   `undef R2_B_EA_1
   `undef R3_B_SA_1
   `undef R3_B_EA_1
   `undef R4_B_SA_1
   `undef R4_B_EA_1
   `undef R5_B_SA_1
   `undef R5_B_EA_1
   `undef R6_B_SA_1
   `undef R6_B_EA_1
   `undef R7_B_SA_1
   `undef R7_B_EA_1
   `undef R8_B_SA_1
   `undef R8_B_EA_1
   `undef VISIBLE_2
   `undef MR_N2
   `undef R1_N_SA_2
   `undef R1_N_EA_2
   `undef R2_N_SA_2
   `undef R2_N_EA_2
   `undef MR_B2
   `undef R1_B_SA_2
   `undef R1_B_EA_2
   `undef R2_B_SA_2
   `undef R2_B_EA_2
   `undef HSEL_ONLY_S2
   `undef ALIAS_S2
   `undef SPLIT_CAPABLE_2
   `undef VISIBLE_3
   `undef MR_N3
   `undef R1_N_SA_3
   `undef R1_N_EA_3
   `undef R2_N_SA_3
   `undef R2_N_EA_3
   `undef MR_B3
   `undef R1_B_SA_3
   `undef R1_B_EA_3
   `undef R2_B_SA_3
   `undef R2_B_EA_3
   `undef HSEL_ONLY_S3
   `undef ALIAS_S3
   `undef SPLIT_CAPABLE_3
   `undef VISIBLE_4
   `undef MR_N4
   `undef R1_N_SA_4
   `undef R1_N_EA_4
   `undef R2_N_SA_4
   `undef R2_N_EA_4
   `undef MR_B4
   `undef R1_B_SA_4
   `undef R1_B_EA_4
   `undef R2_B_SA_4
   `undef R2_B_EA_4
   `undef HSEL_ONLY_S4
   `undef ALIAS_S4
   `undef SPLIT_CAPABLE_4
   `undef VISIBLE_5
   `undef MR_N5
   `undef R1_N_SA_5
   `undef R1_N_EA_5
   `undef R2_N_SA_5
   `undef R2_N_EA_5
   `undef MR_B5
   `undef R1_B_SA_5
   `undef R1_B_EA_5
   `undef R2_B_SA_5
   `undef R2_B_EA_5
   `undef HSEL_ONLY_S5
   `undef ALIAS_S5
   `undef SPLIT_CAPABLE_5
   `undef VISIBLE_6
   `undef MR_N6
   `undef R1_N_SA_6
   `undef R1_N_EA_6
   `undef R2_N_SA_6
   `undef R2_N_EA_6
   `undef MR_B6
   `undef R1_B_SA_6
   `undef R1_B_EA_6
   `undef R2_B_SA_6
   `undef R2_B_EA_6
   `undef HSEL_ONLY_S6
   `undef ALIAS_S6
   `undef SPLIT_CAPABLE_6
   `undef VISIBLE_7
   `undef MR_N7
   `undef R1_N_SA_7
   `undef R1_N_EA_7
   `undef R2_N_SA_7
   `undef R2_N_EA_7
   `undef MR_B7
   `undef R1_B_SA_7
   `undef R1_B_EA_7
   `undef R2_B_SA_7
   `undef R2_B_EA_7
   `undef HSEL_ONLY_S7
   `undef ALIAS_S7
   `undef SPLIT_CAPABLE_7
   `undef VISIBLE_8
   `undef MR_N8
   `undef R1_N_SA_8
   `undef R1_N_EA_8
   `undef R2_N_SA_8
   `undef R2_N_EA_8
   `undef MR_B8
   `undef R1_B_SA_8
   `undef R1_B_EA_8
   `undef R2_B_SA_8
   `undef R2_B_EA_8
   `undef HSEL_ONLY_S8
   `undef ALIAS_S8
   `undef SPLIT_CAPABLE_8
   `undef VISIBLE_9
   `undef MR_N9
   `undef R1_N_SA_9
   `undef R1_N_EA_9
   `undef R2_N_SA_9
   `undef R2_N_EA_9
   `undef MR_B9
   `undef R1_B_SA_9
   `undef R1_B_EA_9
   `undef R2_B_SA_9
   `undef R2_B_EA_9
   `undef HSEL_ONLY_S9
   `undef ALIAS_S9
   `undef SPLIT_CAPABLE_9
   `undef VISIBLE_10
   `undef MR_N10
   `undef R1_N_SA_10
   `undef R1_N_EA_10
   `undef R2_N_SA_10
   `undef R2_N_EA_10
   `undef MR_B10
   `undef R1_B_SA_10
   `undef R1_B_EA_10
   `undef R2_B_SA_10
   `undef R2_B_EA_10
   `undef HSEL_ONLY_S10
   `undef ALIAS_S10
   `undef SPLIT_CAPABLE_10
   `undef VISIBLE_11
   `undef MR_N11
   `undef R1_N_SA_11
   `undef R1_N_EA_11
   `undef R2_N_SA_11
   `undef R2_N_EA_11
   `undef MR_B11
   `undef R1_B_SA_11
   `undef R1_B_EA_11
   `undef R2_B_SA_11
   `undef R2_B_EA_11
   `undef HSEL_ONLY_S11
   `undef ALIAS_S11
   `undef SPLIT_CAPABLE_11
   `undef VISIBLE_12
   `undef MR_N12
   `undef R1_N_SA_12
   `undef R1_N_EA_12
   `undef R2_N_SA_12
   `undef R2_N_EA_12
   `undef MR_B12
   `undef R1_B_SA_12
   `undef R1_B_EA_12
   `undef R2_B_SA_12
   `undef R2_B_EA_12
   `undef HSEL_ONLY_S12
   `undef ALIAS_S12
   `undef SPLIT_CAPABLE_12
   `undef VISIBLE_13
   `undef MR_N13
   `undef R1_N_SA_13
   `undef R1_N_EA_13
   `undef R2_N_SA_13
   `undef R2_N_EA_13
   `undef MR_B13
   `undef R1_B_SA_13
   `undef R1_B_EA_13
   `undef R2_B_SA_13
   `undef R2_B_EA_13
   `undef HSEL_ONLY_S13
   `undef ALIAS_S13
   `undef SPLIT_CAPABLE_13
   `undef VISIBLE_14
   `undef MR_N14
   `undef R1_N_SA_14
   `undef R1_N_EA_14
   `undef R2_N_SA_14
   `undef R2_N_EA_14
   `undef MR_B14
   `undef R1_B_SA_14
   `undef R1_B_EA_14
   `undef R2_B_SA_14
   `undef R2_B_EA_14
   `undef HSEL_ONLY_S14
   `undef ALIAS_S14
   `undef SPLIT_CAPABLE_14
   `undef VISIBLE_15
   `undef MR_N15
   `undef R1_N_SA_15
   `undef R1_N_EA_15
   `undef R2_N_SA_15
   `undef R2_N_EA_15
   `undef MR_B15
   `undef R1_B_SA_15
   `undef R1_B_EA_15
   `undef R2_B_SA_15
   `undef R2_B_EA_15
   `undef HSEL_ONLY_S15
   `undef ALIAS_S15
   `undef SPLIT_CAPABLE_15
   `undef AHB_TPS_MODE
   `undef AHB_TCL_WIDTH
   `undef AHB_CCL_WIDTH
   `undef AHB_HC_TOKENS
   `undef AHB_TCL
   `undef AHB_CL_M1
   `undef AHB_CL_M2
   `undef AHB_CL_M3
   `undef AHB_CL_M4
   `undef AHB_CL_M5
   `undef AHB_CL_M6
   `undef AHB_CL_M7
   `undef AHB_CL_M8
   `undef AHB_CL_M9
   `undef AHB_CL_M10
   `undef AHB_CL_M11
   `undef AHB_CL_M12
   `undef AHB_CL_M13
   `undef AHB_CL_M14
   `undef AHB_CL_M15
   `undef AHB_REQGNT_ONLY_M1
   `undef ALIAS_M1
   `undef AHB_REQGNT_ONLY_M2
   `undef ALIAS_M2
   `undef AHB_REQGNT_ONLY_M3
   `undef ALIAS_M3
   `undef AHB_REQGNT_ONLY_M4
   `undef ALIAS_M4
   `undef AHB_REQGNT_ONLY_M5
   `undef ALIAS_M5
   `undef AHB_REQGNT_ONLY_M6
   `undef ALIAS_M6
   `undef AHB_REQGNT_ONLY_M7
   `undef ALIAS_M7
   `undef AHB_REQGNT_ONLY_M8
   `undef ALIAS_M8
   `undef AHB_REQGNT_ONLY_M9
   `undef ALIAS_M9
   `undef AHB_REQGNT_ONLY_M10
   `undef ALIAS_M10
   `undef AHB_REQGNT_ONLY_M11
   `undef ALIAS_M11
   `undef AHB_REQGNT_ONLY_M12
   `undef ALIAS_M12
   `undef AHB_REQGNT_ONLY_M13
   `undef ALIAS_M13
   `undef AHB_REQGNT_ONLY_M14
   `undef ALIAS_M14
   `undef AHB_REQGNT_ONLY_M15
   `undef ALIAS_M15
   `undef AHB_SINGLE_CYCLE_ARBITRATION
   `undef XDCDR_SUPPLIES_HSELS2AHB
   `undef AHB_HAS_SPLIT
   `undef AHB_VERSION_ID
   `undef VISIBLE_0
   `undef HSEL_ONLY_S0
   `undef ALIAS_S0
   `undef SPLIT_CAPABLE_0
   `undef NUM_INT_MASTERS
   `undef NUM_INT_SLAVES
   `undef HRESPBUS_WIDTH
   `undef HTRANSBUS_WIDTH
   `undef HSIZEBUS_WIDTH
   `undef HBURSTBUS_WIDTH
   `undef HPROTBUS_WIDTH
   `undef HWRITEBUS_WIDTH
   `undef HREADY_WIDTH
   `undef INTERNAL_HSEL
   `undef SPLITBUS_WIDTH
   `undef BUS_AHB_CCL_WIDTH
   `undef NC_NB_NP_O
   `undef NC_NB_NP_D
   `undef NC_NB_P_O
   `undef NC_NB_P_D
   `undef NC_B_NP_O
   `undef NC_B_NP_D
   `undef NC_B_P_O
   `undef NC_B_P_D
   `undef C_NB_NP_O
   `undef C_NB_NP_D
   `undef C_NP_P_O
   `undef C_NP_P_D
   `undef C_B_NP_O
   `undef C_B_NP_D
   `undef C_B_P_O
   `undef C_B_P_D
   `undef RM_BCM01
   `undef RM_BCM02
   `undef RM_BCM03
   `undef RM_BCM05
   `undef RM_BCM06
   `undef RM_BCM07
   `undef RM_BCM08
   `undef RM_BCM09
   `undef RM_BCM10
   `undef RM_BCM11
   `undef RM_BCM12
   `undef RM_BCM15
   `undef RM_BCM16
   `undef RM_BCM21
   `undef RM_BCM22
   `undef RM_BCM23
   `undef RM_BCM24
   `undef RM_BCM25
   `undef RM_BCM26
   `undef RM_BCM27
   `undef RM_BCM28
   `undef RM_BCM29
   `undef RM_BCM30
   `undef RM_BCM31
   `undef RM_BCM32
   `undef RM_BCM43
   `undef RM_BCM44
   `undef RM_BCM46_A
   `undef RM_BCM46_B
   `undef RM_BCM46_C
   `undef RM_BCM46_D
   `undef RM_BCM47
   `undef RM_BCM51
   `undef RM_BCM52
   `undef RM_BCM53
   `undef RM_BCM54
   `undef RM_BCM55
   `undef RM_BCM57
   `undef RM_BCM58
   `undef RM_BCM59
   `undef RM_BCM64
   `undef RM_BCM65
   `undef RM_BCM66
   `undef RM_BCM71
   `undef RM_BCM72
   `undef RM_BCM73
   `undef RM_BCM76
   `undef PL1_OFFSET
   `undef PL2_OFFSET
   `undef PL3_OFFSET
   `undef PL4_OFFSET
   `undef PL5_OFFSET
   `undef PL6_OFFSET
   `undef PL7_OFFSET
   `undef PL8_OFFSET
   `undef PL9_OFFSET
   `undef PL10_OFFSET
   `undef PL11_OFFSET
   `undef PL12_OFFSET
   `undef PL13_OFFSET
   `undef PL14_OFFSET
   `undef PL15_OFFSET
   `undef EBTCOUNT_OFFSET
   `undef EBT_EN_OFFSET
   `undef EBT_OFFSET
   `undef DFLT_MASTER_OFFSET
   `undef AHB_WTEN_OFFSET
   `undef AHB_TCL_OFFSET
   `undef AHB_CCLM1_OFFSET
   `undef AHB_CCLM2_OFFSET
   `undef AHB_CCLM3_OFFSET
   `undef AHB_CCLM4_OFFSET
   `undef AHB_CCLM5_OFFSET
   `undef AHB_CCLM6_OFFSET
   `undef AHB_CCLM7_OFFSET
   `undef AHB_CCLM8_OFFSET
   `undef AHB_CCLM9_OFFSET
   `undef AHB_CCLM10_OFFSET
   `undef AHB_CCLM11_OFFSET
   `undef AHB_CCLM12_OFFSET
   `undef AHB_CCLM13_OFFSET
   `undef AHB_CCLM14_OFFSET
   `undef AHB_CCLM15_OFFSET
   `undef AHB_VID_OFFSET
`define cb_dummy_parameter_definition 1
`undef  cb_dummy_parameter_definition
