/*
------------------------------------------------------------------------
--
--                    (C) COPYRIGHT 2001-2011 SYNOPSYS, INC.
--                           ALL RIGHTS RESERVED
--
--  This software and the associated documentation are confidential and
--  proprietary to Synopsys, Inc.  Your use or disclosure of this
--  software is subject to the terms and conditions of a written
--  license agreement between you, or your company, and Synopsys, Inc.
--
--  The entire notice above must be reproduced on all authorized copies.
--
-- File     : DW_axi_cc_constants.v
-- Version  : $Revision: #92 $
-- Abstract : Parameter File for DW_axi
--
------------------------------------------------------------------------
*/

// If this parameter is set to 1 the VTE will use the
// seed specified by the AXI_SEED parameter.

`define AXI_USE_RANDOM_SEED 0

// If this parameter is set to 1 the VTE will use the
// seed specified by the AXI_SEED parameter.

`define AXI_SEED 32'h0


// Name:         USE_FOUNDATION
// Default:      true
// Values:       false (0), true (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// Use DesignWare Foundation parts by default for 
// optimal Synthesis QoR. May be set to false (0) if you 
// have an RTL source licence in which case you may 
// use source code for DesignWare Foundation Parts without 
// the need for a DesignWare Foundation licence. RTL source 
// users, who also have a DesignWare Foundation key, may 
// choose to retain the Foundation parts.
`define USE_FOUNDATION 0

//Select either DVE or VTE verification environment

`define AXI_USE_VTE_ENV 1'h1



// Name:         AXI_DW
// Default:      32
// Values:       8 16 32 64 128 256 512
// 
// This is the bit width of the data bus, which 
// applied to all interfaces.
`define AXI_DW 64


// Name:         AXI_AW
// Default:      32
// Values:       32, ..., 64
// 
// This is the bit width of the address bus, which 
// is applied to all interfaces.
`define AXI_AW 32

//Creates a define for when AXI_AW = 64.

// `define AXI_AW_64


// Name:         AXI_NUM_MASTERS
// Default:      2
// Values:       1, ..., 16
// 
// This is the number of AXI masters connecting to DW_axi. 
// A master port is instantiated for each external AXI 
// master.
`define AXI_NUM_MASTERS 2

// Defined if there this is a single master configuration.

// `define AXI_NUM_MASTERS_1



// Name:         AXI_HAS_BICMD
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS > 1)
// 
// When this is set to True, it enables the Bi-Directional Command support. 
// This enables the setting of Master System numbers, and the creation of 
// interconnecting Masters and Slaves.
`define AXI_HAS_BICMD 0


// Name:         AXI_EN_MULTI_TILE_DLOCK_AVOID
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_SLAVES > 1)
// 
// When this is set to True, it enables the AXI_ACC_NON_LCL_SLV_Sx parameters, 
// which are used to mark certain slave ports as accessing slaves through other 
// DW_axi instances. This information is then used to prevent deadlock in multi tile systems.
`define AXI_EN_MULTI_TILE_DLOCK_AVOID 0


// Name:         AXI_NUM_SYS_MASTERS
// Default:      2
// Values:       1, ..., 64
// Enabled:      AXI_HAS_BICMD == 1
// 
// reuse-pragma beginAttr Description 
// AXI_NUM_SYS_MASTERS: 
// This is the number of AXI masters in the entire system. 
// (System in this instance being all connected DW_axi) 
// Excluding interconnecting Master ports
`define AXI_NUM_SYS_MASTERS 2


// Name:         AXI_NUM_SLAVES
// Default:      4
// Values:       1, ..., 16
// 
// This is the number of AXI slaves connecting to DW_axi. 
// A slave port is instantiated for each external AXI slave.
`define AXI_NUM_SLAVES 1

//This is the log2 of (AXI_NUM_SLAVES )

`define AXI_LOG2_NS 1

//This is the log2 of (AXI_NUM_SYS_MASTERS)

`define AXI_LOG2_NM 1

//This is the log2 of (AXI_NUM_SYS_MASTERS + 1)

`define AXI_LOG2_LCL_NMP1 2

//This is the log2 of (AXI_NUM_MASTERS)

`define AXI_LOG2_LCL_NM 1

//This is the log2 of (AXI_NUM_SLAVES + 1)
//The decode bus for the decoder needs to take into account
//the default slave in the slave number it presents to DW_axi.
//For 16 slaves, the decoder needs to respresent 17, which is
//4 in log2 format

`define AXI_LOG2_NSP1 1

//This is the number of user selected slaves plus 1.
//The decode bus for the decoder needs to take into account
//the default slave in the slave number it presents to DW_axi.
//For 16 slaves, the decoder needs to respresent 17, which is
//4 in log2 format

`define AXI_NSP1 2

//This is the log2 of (AXI_NUM_SLAVES + 2)
//Required as a paramter to one of the internal arbiters.

`define AXI_LOG2_NSP2 2


// Name:         AXI_MIDW
// Default:      4
// Values:       1, ..., 12
// 
// This is the ID bus width of all five channels connected 
// to an external master. All masters have the same ID width 
// for all five AXI channels. If a master's ID width for any 
// channel is less than the configured value, then the unused 
// bits should be connected externally to 0. For a single master 
// system this parameter will default to 0.
`define AXI_MIDW 4

//Is the pow2 form of the ID bus to or from a master.

`define AXI_POW2_MIDW 16


// Name:         AXI_SIDW
// Default:      5
// Values:       1, ..., 20
// 
// Read-only parameter. This is the ID bus width of all 
// five AXI channels connected to an external slave. 
// It is a function of the AXI ID Width of a Masters (AXI_MIDW) 
// and the number of AXI masters (AXI_NUM_SYS_MASTERS). 
// AXI_SIDW = AXI_MIDW + ceil(log2 (AXI_NUM_SYS_MASTERS)) 
// This is calculated automatically, and the same width is 
// applied to all slaves. A slave must use all of these bits 
// because they are a concatenation of the ID bus from the 
// master and the master number from which the transfer 
// originated. All slaves have the same ID width for all five 
// AXI channels.
`define AXI_SIDW 5


// Name:         AXI_BLW
// Default:      4
// Values:       4, ..., 8
// 
// This is the width of the burst length signal for both read 
// and write address channels.
`define AXI_BLW 4

// The width of the write strobe bus
`define AXI_SW        (`AXI_DW/8)


// Name:         AXI_HAS_TZ_SUPPORT
// Default:      false
// Values:       false (0), true (1)
// 
// When this is set to True, it enables the TrustZone support. 
// An input port exists for each AXI slave, indicating 
// whether that slave is secure. When set to False, the TrustZone 
// signals are not included on the I/O and TrustZone functionality 
// is not supported.
`define AXI_HAS_TZ_SUPPORT 0

//Creates a define for whether we support the trustzone signals.

// `define AXI_TZ_SUPPORT


// Name:         AXI_REMAP_EN
// Default:      false
// Values:       false (0), true (1)
// 
// When this is set to True, the remap feature is supported in which 
// two address maps are included in each read and write address 
// decoder. Additionally, an external remap_n signal is included 
// on the I/O, which controls the selection of the address maps. 
// If this is set to False, then remap_n is not included on the I/O.
`define AXI_REMAP_EN 1

//Creates a define for whether there are two memory maps or only one.

`define AXI_REMAP


// Name:         AXI_HAS_XDCDR
// Default:      false
// Values:       false (0), true (1)
// 
// When set to True, DW_axi uses external read amd write decoders 
// for each master port. These address decoders can have different 
// memory maps and multiple remap options. When set to False, DW_axi uses 
// a internal read and write address decoders for each master port. 
// These address decoders are fixed to a maximum of two remap options and 
// all read/write address decoders have the same memory map.
`define AXI_HAS_XDCDR 0

//Creates a define for whether there is an external decoder or not.

// `define AXI_XDCDR

//When true, the external decoder within the verification envirnoment can
//be controlled with the internal address map parameters.
//When false, does nothing, so external decoder uses default memory map.
//Not visible in the GUI to the user. For Test purposes only.

`define AXI_TEST_XDCDR 0


//AXI_INITIAL_LOCKDOWN:

`define AXI_INITIAL_LOCKDOWN 0



// Name:         AXI_HAS_LOCKING
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_INITIAL_LOCKDOWN == 0) && (AXI_NUM_MASTERS > 1))
// 
// Parameter disabled for current release. 
// When set to True, AXI locked transactions are supported. 
// This allows all masters to lock a slave for exclusive 
// access for a locked sequence. 
// Parameter is disabled for single master systems. 
// Note : disabling this parameter will not prevent 
//        DW_axi from forwarding locking transactions, it 
//        just removes the logic required for DW_axi to 
//        implement locking rules.
`define AXI_HAS_LOCKING 0

//Creates a define for whether we support the AXI locking.

// `define AXI_LOCKING


// Name:         AXI_LOWPWR_HS_IF
// Default:      false
// Values:       false (0), true (1)
// 
// When set to True, DW_axi will include low-power interface.
`define AXI_LOWPWR_HS_IF 0



// Name:         AXI_LOWPWR_NOPX_CNT
// Default:      0x0
// Values:       0x0, ..., 0xffffffff
// Enabled:      (AXI_LOWPWR_HS_IF == 1)
// 
// This sets the number of clock cycles that the AXI component will 
// count from when there are no outstanding transactions in the bus 
// until cactive deasserts.
`define AXI_LOWPWR_NOPX_CNT 32'h0

//This is the log2 of (AXI_LOWPWR_NOPX_CNT )

`define AXI_LOG2_LOWPWR_NOPX_CNT 1


// Name:         AXI_DLOCK_NOTIFY_EN
// Default:      false
// Values:       false (0), true (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// Enables deadlock notification; an interrupt is generated if no 
// read or write transactions complete within the beginning and end 
// of a deadlock evaluation period
`define AXI_DLOCK_NOTIFY_EN 0



// Name:         AXI_DLOCK_TIMEOUT
// Default:      15
// Values:       15, ..., 4294967295
// Enabled:      (AXI_DLOCK_NOTIFY_EN == 1)
// 
// Number of aclk cycles in each deadlock evaluation period
`define AXI_DLOCK_TIMEOUT 32'd15

//This is the log2 of (AXI_DLOCK_TIMEOUT+1)

`define AXI_LOG2_DLOCK_TIMEOUT_P1 4


// Name:         AXI_AR_TMO
// Default:      Combinatorial
// Values:       Combinatorial (0), Forward Registered (1), Fully Registered (2)
// Enabled:      AXI_INITIAL_LOCKDOWN == 0
// 
// This selects the mode of the internal register slice for the read 
// address channels. The internal register slice resides between the 
// master and slave port within DW_axi. 
// Combinatorial      -> Pass through, all paths unregistered. 
// Forward Registered -> Source to sink paths registered, sink to source 
//                       paths unregistered. 
// Fully Registered   -> All paths registered.
`define AXI_AR_TMO 1


// Name:         AXI_AW_TMO
// Default:      Combinatorial
// Values:       Combinatorial (0), Forward Registered (1), Fully Registered (2)
// Enabled:      AXI_INITIAL_LOCKDOWN == 0
// 
// This selects the mode of the internal register slice for the write 
// address channels. The internal register slice resides between the 
// master and slave port within DW_axi. 
// Combinatorial      -> Pass through, all paths unregistered. 
// Forward Registered -> Source to sink paths registered, sink to source 
//                       paths unregistered. 
// Fully Registered   -> All paths registered.
`define AXI_AW_TMO 1


// Name:         AXI_W_TMO
// Default:      Combinatorial
// Values:       Combinatorial (0), Forward Registered (1), Fully Registered (2)
// Enabled:      AXI_INITIAL_LOCKDOWN == 0
// 
// This selects the mode of the internal register slice for the write 
// data channels. The internal register slice resides between the 
// master and slave port within DW_axi. 
// Combinatorial      -> Pass through, all paths unregistered. 
// Forward Registered -> Source to sink paths registered, sink to source 
//                       paths unregistered. 
// Fully Registered   -> All paths registered.
`define AXI_W_TMO 1


// Name:         AXI_R_TMO
// Default:      Combinatorial
// Values:       Combinatorial (0), Forward Registered (1), Fully Registered (2)
// Enabled:      AXI_INITIAL_LOCKDOWN == 0
// 
// This selects the mode of the internal register slice for the read 
// data channels. The internal register slice resides between the 
// master and slave port within DW_axi. 
// Combinatorial      -> Pass through, all paths unregistered. 
// Forward Registered -> Source to sink paths registered, sink to source 
//                       paths unregistered. 
// Fully Registered   -> All paths registered.
`define AXI_R_TMO 1


// Name:         AXI_B_TMO
// Default:      Combinatorial
// Values:       Combinatorial (0), Forward Registered (1), Fully Registered (2)
// Enabled:      AXI_INITIAL_LOCKDOWN == 0
// 
// This selects the mode of the internal register slice for the burst 
// response channels. The internal register slice resides between the 
// master and slave port within DW_axi. 
// Combinatorial      -> Pass through, all paths unregistered. 
// Forward Registered -> Source to sink paths registered, sink to source 
//                       paths unregistered. 
// Fully Registered   -> All paths registered.
`define AXI_B_TMO 1


// Name:         AXI_AR_PL_ARB
// Default:      false
// Values:       false (0), true (1)
// 
// This selects whether or not to add a pipeline stage after the arbiter 
// in the read address channels. If enabled a single buffer stage will be 
// added to the channel.
`define AXI_AR_PL_ARB 0


// Name:         AXI_AW_PL_ARB
// Default:      false
// Values:       false (0), true (1)
// 
// This selects whether or not to add a pipeline stage after the arbiter 
// in the write address channels. If enabled a single buffer stage will be 
// added to the channel.
`define AXI_AW_PL_ARB 0


// Name:         AXI_R_PL_ARB
// Default:      false
// Values:       false (0), true (1)
// 
// This selects whether or not to add a pipeline stage after the arbiter 
// in the read data channels. If enabled a single buffer stage will be 
// added to the channel.
`define AXI_R_PL_ARB 0


// Name:         AXI_W_PL_ARB
// Default:      false
// Values:       false (0), true (1)
// 
// This selects whether or not to add a pipeline stage after the arbiter 
// in the write data channels. If enabled a single buffer stage will be 
// added to the channel.
`define AXI_W_PL_ARB 0


// Name:         AXI_B_PL_ARB
// Default:      false
// Values:       false (0), true (1)
// 
// This selects whether or not to add a pipeline stage after the arbiter 
// in the burst response channels. If enabled a single buffer stage will be 
// added to the channel.
`define AXI_B_PL_ARB 0

//This is the maximum width of any sideband bus.

`define AXI_MAX_SBW 64


// Name:         AXI_HAS_AWSB
// Default:      false
// Values:       false (0), true (1)
// 
// If set to True, then all master and slave write address channels 
// have an associated sideband bus. The write address channel sideband 
// bus is routed in the same way as the write address channel payload.
`define AXI_HAS_AWSB 0

//Creates a define for whether we support sideband signals.

// `define AXI_INC_AWSB


// Name:         AXI_AW_SBW
// Default:      1
// Values:       1, ..., =@AXI_MAX_SBW
// Enabled:      AXI_HAS_AWSB == 1
// 
// When the AXI_HAS_AWSB parameter is set to True, you can set 
// the write address channel sideband bus width.
`define AXI_AW_SBW 1


// Name:         AXI_HAS_WSB
// Default:      false
// Values:       false (0), true (1)
// 
// If set to True, then all master and slave write data channels 
// have an associated sideband bus. The write data channel sideband 
// bus is routed in the same way as the write data channel payload.
`define AXI_HAS_WSB 0

//Creates a define for whether we support sideband signals.

// `define AXI_INC_WSB


// Name:         AXI_W_SBW
// Default:      1
// Values:       1, ..., =@AXI_MAX_SBW
// Enabled:      AXI_HAS_WSB == 1
// 
// When the AXI_HAS_WSB parameter is set to True, you can set 
// the write address channel sideband bus width.
`define AXI_W_SBW 1


// Name:         AXI_HAS_BSB
// Default:      false
// Values:       false (0), true (1)
// 
// If set to True, then all master and slave write response channels 
// have a associated sideband bus. The write response channel sideband bus 
// is routed in the same way as the write response channel payload.
`define AXI_HAS_BSB 0

//Creates a define for whether we support sideband signals.

// `define AXI_INC_BSB


// Name:         AXI_B_SBW
// Default:      1
// Values:       1, ..., =@AXI_MAX_SBW
// Enabled:      AXI_HAS_BSB == 1
// 
// When the AXI_HAS_BSB parameter is set to True, you can set 
// the write response channel sideband bus width.
`define AXI_B_SBW 1


// Name:         AXI_HAS_ARSB
// Default:      false
// Values:       false (0), true (1)
// 
// If set to True, then all master and slave read address channels 
// have an associated sideband bus. The read address channel sideband bus 
// is routed in the same way as the read address channel payload.
`define AXI_HAS_ARSB 0

//Creates a define for whether we support sideband signals.

// `define AXI_INC_ARSB


// Name:         AXI_AR_SBW
// Default:      1
// Values:       1, ..., =@AXI_MAX_SBW
// Enabled:      AXI_HAS_ARSB == 1
// 
// When the AXI_HAS_ARSB parameter is set to True, you can set 
// the read address channel sideband bus width.
`define AXI_AR_SBW 1


// Name:         AXI_HAS_RSB
// Default:      false
// Values:       false (0), true (1)
// 
// If set to True, then all master and slave read data channels 
// have an associated sideband bus. The read data channel sideband bus is 
// routed in the same way as the read data channel payload.
`define AXI_HAS_RSB 0

//Creates a define for whether we support sideband signals.

// `define AXI_INC_RSB


// Name:         AXI_R_SBW
// Default:      1
// Values:       1, ..., =@AXI_MAX_SBW
// Enabled:      AXI_HAS_RSB == 1
// 
// When the AXI_HAS_RSB parameter is set to True, you can set 
// the read data channel sideband bus width.
`define AXI_R_SBW 1


// `define AXI_ENCRYPT

//Width of the priority values/signals for masters.
//Lower values of master priority width will mean less logic levels through
//the internal slave port arbiters.

`define AXI_MST_PRIORITY_W 1

//Width of the priority values/signals for slaves.
//Lower values of slave priority width will mean less logic levels through
//the internal master port arbiters.

`define AXI_SLV_PRIORITY_W 1


// Name:         AXI_REG_AW_W_PATHS
// Default:      1
// Values:       0, 1
// 
// All write address channel (AW) to write data channel (W) paths 
// are registered. 
// Where AWVALID_M(x) and WVALID_M(x) from a master assert in the same 
// cycle for a new write transaction, the DW_axi interconnect will assert 
// WVALID_S(j) on the next cycle, not the current one (assuming no pipeline 
// stages exist in the channel). 
// By setting this parameter to 0, the AW to W paths will no longer be registered 
// and the DW_axi interconnect can assert WVALID_S(j) to a slave in the same 
// cycle that it asserts AWVALID_S(j). 
// However, setting this parameter to 0 will also reduce the operating frequency of 
// the DW_axi instance as longer logic paths will exist. 
// NOTE: In the following cases, setting AXI_REG_AW_W_PATHS to 0 will not 
// improve latency to a particular slave: 
//  * If the write interleaving depth at a slave port is > 1 (AXI_WID_S(j) > 1) and 
//    the arbiter pipeline stage for the AW channel is not enabled 
//  * If a slaves write data channel has a link from the shared write data channel 
//    and pipelining is not enabled on the shared AW layer (AXI_AW_SHARED_PL=0) 
//  * If multi-cycle arbitration is enabled on the write data channel for a slave
`define AXI_REG_AW_W_PATHS 1


 
// Set by packaging script if legal overlapping addresses detected.

`define AXI_HAS_LEGAL_ADDR_OVRLP_VAL 1
 
// Defined if legal address overlapping exists.

`define AXI_HAS_LEGAL_ADDR_OVRLP
 

// Name:         AXI_NV_S0_BY_M1
// Default:      true
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 1 in Normal Mode
`define AXI_NV_S0_BY_M1 1


// Name:         AXI_NV_S0_BY_M2
// Default:      true
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 2 in Normal Mode
`define AXI_NV_S0_BY_M2 1


// Name:         AXI_NV_S0_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 3 in Normal Mode
`define AXI_NV_S0_BY_M3 0


// Name:         AXI_NV_S0_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 4 in Normal Mode
`define AXI_NV_S0_BY_M4 0


// Name:         AXI_NV_S0_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 5 in Normal Mode
`define AXI_NV_S0_BY_M5 0


// Name:         AXI_NV_S0_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 6 in Normal Mode
`define AXI_NV_S0_BY_M6 0


// Name:         AXI_NV_S0_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 7 in Normal Mode
`define AXI_NV_S0_BY_M7 0


// Name:         AXI_NV_S0_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 8 in Normal Mode
`define AXI_NV_S0_BY_M8 0


// Name:         AXI_NV_S0_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 9 in Normal Mode
`define AXI_NV_S0_BY_M9 0


// Name:         AXI_NV_S0_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 10 in Normal Mode
`define AXI_NV_S0_BY_M10 0


// Name:         AXI_NV_S0_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 11 in Normal Mode
`define AXI_NV_S0_BY_M11 0


// Name:         AXI_NV_S0_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 12 in Normal Mode
`define AXI_NV_S0_BY_M12 0


// Name:         AXI_NV_S0_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 13 in Normal Mode
`define AXI_NV_S0_BY_M13 0


// Name:         AXI_NV_S0_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 14 in Normal Mode
`define AXI_NV_S0_BY_M14 0


// Name:         AXI_NV_S0_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 15 in Normal Mode
`define AXI_NV_S0_BY_M15 0


// Name:         AXI_NV_S0_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 16 in Normal Mode
`define AXI_NV_S0_BY_M16 0


// Name:         AXI_NV_S1_BY_M1
// Default:      true
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 1 is visible by Master 1 in Normal Mode
`define AXI_NV_S1_BY_M1 1


// Name:         AXI_NV_S1_BY_M2
// Default:      true
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 1 is visible by Master 2 in Normal Mode
`define AXI_NV_S1_BY_M2 1


// Name:         AXI_NV_S1_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 1 is visible by Master 3 in Normal Mode
`define AXI_NV_S1_BY_M3 0


// Name:         AXI_NV_S1_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 1 is visible by Master 4 in Normal Mode
`define AXI_NV_S1_BY_M4 0


// Name:         AXI_NV_S1_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 1 is visible by Master 5 in Normal Mode
`define AXI_NV_S1_BY_M5 0


// Name:         AXI_NV_S1_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 1 is visible by Master 6 in Normal Mode
`define AXI_NV_S1_BY_M6 0


// Name:         AXI_NV_S1_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 1 is visible by Master 7 in Normal Mode
`define AXI_NV_S1_BY_M7 0


// Name:         AXI_NV_S1_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 1 is visible by Master 8 in Normal Mode
`define AXI_NV_S1_BY_M8 0


// Name:         AXI_NV_S1_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 1 is visible by Master 9 in Normal Mode
`define AXI_NV_S1_BY_M9 0


// Name:         AXI_NV_S1_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 1 is visible by Master 10 in Normal Mode
`define AXI_NV_S1_BY_M10 0


// Name:         AXI_NV_S1_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 1 is visible by Master 11 in Normal Mode
`define AXI_NV_S1_BY_M11 0


// Name:         AXI_NV_S1_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 1 is visible by Master 12 in Normal Mode
`define AXI_NV_S1_BY_M12 0


// Name:         AXI_NV_S1_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 1 is visible by Master 13 in Normal Mode
`define AXI_NV_S1_BY_M13 0


// Name:         AXI_NV_S1_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 1 is visible by Master 14 in Normal Mode
`define AXI_NV_S1_BY_M14 0


// Name:         AXI_NV_S1_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 1 is visible by Master 15 in Normal Mode
`define AXI_NV_S1_BY_M15 0


// Name:         AXI_NV_S1_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 1 is visible by Master 16 in Normal Mode
`define AXI_NV_S1_BY_M16 0


// Name:         AXI_NV_S2_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 2 is visible by Master 1 in Normal Mode
`define AXI_NV_S2_BY_M1 0


// Name:         AXI_NV_S2_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 2 is visible by Master 2 in Normal Mode
`define AXI_NV_S2_BY_M2 0


// Name:         AXI_NV_S2_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 2 is visible by Master 3 in Normal Mode
`define AXI_NV_S2_BY_M3 0


// Name:         AXI_NV_S2_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 2 is visible by Master 4 in Normal Mode
`define AXI_NV_S2_BY_M4 0


// Name:         AXI_NV_S2_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 2 is visible by Master 5 in Normal Mode
`define AXI_NV_S2_BY_M5 0


// Name:         AXI_NV_S2_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 2 is visible by Master 6 in Normal Mode
`define AXI_NV_S2_BY_M6 0


// Name:         AXI_NV_S2_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 2 is visible by Master 7 in Normal Mode
`define AXI_NV_S2_BY_M7 0


// Name:         AXI_NV_S2_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 2 is visible by Master 8 in Normal Mode
`define AXI_NV_S2_BY_M8 0


// Name:         AXI_NV_S2_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 2 is visible by Master 9 in Normal Mode
`define AXI_NV_S2_BY_M9 0


// Name:         AXI_NV_S2_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 2 is visible by Master 10 in Normal Mode
`define AXI_NV_S2_BY_M10 0


// Name:         AXI_NV_S2_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 2 is visible by Master 11 in Normal Mode
`define AXI_NV_S2_BY_M11 0


// Name:         AXI_NV_S2_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 2 is visible by Master 12 in Normal Mode
`define AXI_NV_S2_BY_M12 0


// Name:         AXI_NV_S2_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 2 is visible by Master 13 in Normal Mode
`define AXI_NV_S2_BY_M13 0


// Name:         AXI_NV_S2_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 2 is visible by Master 14 in Normal Mode
`define AXI_NV_S2_BY_M14 0


// Name:         AXI_NV_S2_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 2 is visible by Master 15 in Normal Mode
`define AXI_NV_S2_BY_M15 0


// Name:         AXI_NV_S2_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 2 is visible by Master 16 in Normal Mode
`define AXI_NV_S2_BY_M16 0


// Name:         AXI_NV_S3_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 3 is visible by Master 1 in Normal Mode
`define AXI_NV_S3_BY_M1 0


// Name:         AXI_NV_S3_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 3 is visible by Master 2 in Normal Mode
`define AXI_NV_S3_BY_M2 0


// Name:         AXI_NV_S3_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 3 is visible by Master 3 in Normal Mode
`define AXI_NV_S3_BY_M3 0


// Name:         AXI_NV_S3_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 3 is visible by Master 4 in Normal Mode
`define AXI_NV_S3_BY_M4 0


// Name:         AXI_NV_S3_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 3 is visible by Master 5 in Normal Mode
`define AXI_NV_S3_BY_M5 0


// Name:         AXI_NV_S3_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 3 is visible by Master 6 in Normal Mode
`define AXI_NV_S3_BY_M6 0


// Name:         AXI_NV_S3_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 3 is visible by Master 7 in Normal Mode
`define AXI_NV_S3_BY_M7 0


// Name:         AXI_NV_S3_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 3 is visible by Master 8 in Normal Mode
`define AXI_NV_S3_BY_M8 0


// Name:         AXI_NV_S3_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 3 is visible by Master 9 in Normal Mode
`define AXI_NV_S3_BY_M9 0


// Name:         AXI_NV_S3_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 3 is visible by Master 10 in Normal Mode
`define AXI_NV_S3_BY_M10 0


// Name:         AXI_NV_S3_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 3 is visible by Master 11 in Normal Mode
`define AXI_NV_S3_BY_M11 0


// Name:         AXI_NV_S3_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 3 is visible by Master 12 in Normal Mode
`define AXI_NV_S3_BY_M12 0


// Name:         AXI_NV_S3_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 3 is visible by Master 13 in Normal Mode
`define AXI_NV_S3_BY_M13 0


// Name:         AXI_NV_S3_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 3 is visible by Master 14 in Normal Mode
`define AXI_NV_S3_BY_M14 0


// Name:         AXI_NV_S3_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 3 is visible by Master 15 in Normal Mode
`define AXI_NV_S3_BY_M15 0


// Name:         AXI_NV_S3_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 3 is visible by Master 16 in Normal Mode
`define AXI_NV_S3_BY_M16 0


// Name:         AXI_NV_S4_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 4 is visible by Master 1 in Normal Mode
`define AXI_NV_S4_BY_M1 0


// Name:         AXI_NV_S4_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 4 is visible by Master 2 in Normal Mode
`define AXI_NV_S4_BY_M2 0


// Name:         AXI_NV_S4_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 4 is visible by Master 3 in Normal Mode
`define AXI_NV_S4_BY_M3 0


// Name:         AXI_NV_S4_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 4 is visible by Master 4 in Normal Mode
`define AXI_NV_S4_BY_M4 0


// Name:         AXI_NV_S4_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 4 is visible by Master 5 in Normal Mode
`define AXI_NV_S4_BY_M5 0


// Name:         AXI_NV_S4_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 4 is visible by Master 6 in Normal Mode
`define AXI_NV_S4_BY_M6 0


// Name:         AXI_NV_S4_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 4 is visible by Master 7 in Normal Mode
`define AXI_NV_S4_BY_M7 0


// Name:         AXI_NV_S4_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 4 is visible by Master 8 in Normal Mode
`define AXI_NV_S4_BY_M8 0


// Name:         AXI_NV_S4_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 4 is visible by Master 9 in Normal Mode
`define AXI_NV_S4_BY_M9 0


// Name:         AXI_NV_S4_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 4 is visible by Master 10 in Normal Mode
`define AXI_NV_S4_BY_M10 0


// Name:         AXI_NV_S4_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 4 is visible by Master 11 in Normal Mode
`define AXI_NV_S4_BY_M11 0


// Name:         AXI_NV_S4_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 4 is visible by Master 12 in Normal Mode
`define AXI_NV_S4_BY_M12 0


// Name:         AXI_NV_S4_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 4 is visible by Master 13 in Normal Mode
`define AXI_NV_S4_BY_M13 0


// Name:         AXI_NV_S4_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 4 is visible by Master 14 in Normal Mode
`define AXI_NV_S4_BY_M14 0


// Name:         AXI_NV_S4_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 4 is visible by Master 15 in Normal Mode
`define AXI_NV_S4_BY_M15 0


// Name:         AXI_NV_S4_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 4 is visible by Master 16 in Normal Mode
`define AXI_NV_S4_BY_M16 0


// Name:         AXI_NV_S5_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 5 is visible by Master 1 in Normal Mode
`define AXI_NV_S5_BY_M1 0


// Name:         AXI_NV_S5_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 5 is visible by Master 2 in Normal Mode
`define AXI_NV_S5_BY_M2 0


// Name:         AXI_NV_S5_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 5 is visible by Master 3 in Normal Mode
`define AXI_NV_S5_BY_M3 0


// Name:         AXI_NV_S5_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 5 is visible by Master 4 in Normal Mode
`define AXI_NV_S5_BY_M4 0


// Name:         AXI_NV_S5_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 5 is visible by Master 5 in Normal Mode
`define AXI_NV_S5_BY_M5 0


// Name:         AXI_NV_S5_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 5 is visible by Master 6 in Normal Mode
`define AXI_NV_S5_BY_M6 0


// Name:         AXI_NV_S5_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 5 is visible by Master 7 in Normal Mode
`define AXI_NV_S5_BY_M7 0


// Name:         AXI_NV_S5_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 5 is visible by Master 8 in Normal Mode
`define AXI_NV_S5_BY_M8 0


// Name:         AXI_NV_S5_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 5 is visible by Master 9 in Normal Mode
`define AXI_NV_S5_BY_M9 0


// Name:         AXI_NV_S5_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 5 is visible by Master 10 in Normal Mode
`define AXI_NV_S5_BY_M10 0


// Name:         AXI_NV_S5_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 5 is visible by Master 11 in Normal Mode
`define AXI_NV_S5_BY_M11 0


// Name:         AXI_NV_S5_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 5 is visible by Master 12 in Normal Mode
`define AXI_NV_S5_BY_M12 0


// Name:         AXI_NV_S5_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 5 is visible by Master 13 in Normal Mode
`define AXI_NV_S5_BY_M13 0


// Name:         AXI_NV_S5_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 5 is visible by Master 14 in Normal Mode
`define AXI_NV_S5_BY_M14 0


// Name:         AXI_NV_S5_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 5 is visible by Master 15 in Normal Mode
`define AXI_NV_S5_BY_M15 0


// Name:         AXI_NV_S5_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 5 is visible by Master 16 in Normal Mode
`define AXI_NV_S5_BY_M16 0


// Name:         AXI_NV_S6_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 6 is visible by Master 1 in Normal Mode
`define AXI_NV_S6_BY_M1 0


// Name:         AXI_NV_S6_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 6 is visible by Master 2 in Normal Mode
`define AXI_NV_S6_BY_M2 0


// Name:         AXI_NV_S6_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 6 is visible by Master 3 in Normal Mode
`define AXI_NV_S6_BY_M3 0


// Name:         AXI_NV_S6_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 6 is visible by Master 4 in Normal Mode
`define AXI_NV_S6_BY_M4 0


// Name:         AXI_NV_S6_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 6 is visible by Master 5 in Normal Mode
`define AXI_NV_S6_BY_M5 0


// Name:         AXI_NV_S6_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 6 is visible by Master 6 in Normal Mode
`define AXI_NV_S6_BY_M6 0


// Name:         AXI_NV_S6_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 6 is visible by Master 7 in Normal Mode
`define AXI_NV_S6_BY_M7 0


// Name:         AXI_NV_S6_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 6 is visible by Master 8 in Normal Mode
`define AXI_NV_S6_BY_M8 0


// Name:         AXI_NV_S6_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 6 is visible by Master 9 in Normal Mode
`define AXI_NV_S6_BY_M9 0


// Name:         AXI_NV_S6_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 6 is visible by Master 10 in Normal Mode
`define AXI_NV_S6_BY_M10 0


// Name:         AXI_NV_S6_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 6 is visible by Master 11 in Normal Mode
`define AXI_NV_S6_BY_M11 0


// Name:         AXI_NV_S6_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 6 is visible by Master 12 in Normal Mode
`define AXI_NV_S6_BY_M12 0


// Name:         AXI_NV_S6_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 6 is visible by Master 13 in Normal Mode
`define AXI_NV_S6_BY_M13 0


// Name:         AXI_NV_S6_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 6 is visible by Master 14 in Normal Mode
`define AXI_NV_S6_BY_M14 0


// Name:         AXI_NV_S6_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 6 is visible by Master 15 in Normal Mode
`define AXI_NV_S6_BY_M15 0


// Name:         AXI_NV_S6_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 6 is visible by Master 16 in Normal Mode
`define AXI_NV_S6_BY_M16 0


// Name:         AXI_NV_S7_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 7 is visible by Master 1 in Normal Mode
`define AXI_NV_S7_BY_M1 0


// Name:         AXI_NV_S7_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 7 is visible by Master 2 in Normal Mode
`define AXI_NV_S7_BY_M2 0


// Name:         AXI_NV_S7_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 7 is visible by Master 3 in Normal Mode
`define AXI_NV_S7_BY_M3 0


// Name:         AXI_NV_S7_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 7 is visible by Master 4 in Normal Mode
`define AXI_NV_S7_BY_M4 0


// Name:         AXI_NV_S7_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 7 is visible by Master 5 in Normal Mode
`define AXI_NV_S7_BY_M5 0


// Name:         AXI_NV_S7_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 7 is visible by Master 6 in Normal Mode
`define AXI_NV_S7_BY_M6 0


// Name:         AXI_NV_S7_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 7 is visible by Master 7 in Normal Mode
`define AXI_NV_S7_BY_M7 0


// Name:         AXI_NV_S7_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 7 is visible by Master 8 in Normal Mode
`define AXI_NV_S7_BY_M8 0


// Name:         AXI_NV_S7_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 7 is visible by Master 9 in Normal Mode
`define AXI_NV_S7_BY_M9 0


// Name:         AXI_NV_S7_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 7 is visible by Master 10 in Normal Mode
`define AXI_NV_S7_BY_M10 0


// Name:         AXI_NV_S7_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 7 is visible by Master 11 in Normal Mode
`define AXI_NV_S7_BY_M11 0


// Name:         AXI_NV_S7_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 7 is visible by Master 12 in Normal Mode
`define AXI_NV_S7_BY_M12 0


// Name:         AXI_NV_S7_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 7 is visible by Master 13 in Normal Mode
`define AXI_NV_S7_BY_M13 0


// Name:         AXI_NV_S7_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 7 is visible by Master 14 in Normal Mode
`define AXI_NV_S7_BY_M14 0


// Name:         AXI_NV_S7_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 7 is visible by Master 15 in Normal Mode
`define AXI_NV_S7_BY_M15 0


// Name:         AXI_NV_S7_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 7 is visible by Master 16 in Normal Mode
`define AXI_NV_S7_BY_M16 0


// Name:         AXI_NV_S8_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 8 is visible by Master 1 in Normal Mode
`define AXI_NV_S8_BY_M1 0


// Name:         AXI_NV_S8_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 8 is visible by Master 2 in Normal Mode
`define AXI_NV_S8_BY_M2 0


// Name:         AXI_NV_S8_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 8 is visible by Master 3 in Normal Mode
`define AXI_NV_S8_BY_M3 0


// Name:         AXI_NV_S8_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 8 is visible by Master 4 in Normal Mode
`define AXI_NV_S8_BY_M4 0


// Name:         AXI_NV_S8_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 8 is visible by Master 5 in Normal Mode
`define AXI_NV_S8_BY_M5 0


// Name:         AXI_NV_S8_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 8 is visible by Master 6 in Normal Mode
`define AXI_NV_S8_BY_M6 0


// Name:         AXI_NV_S8_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 8 is visible by Master 7 in Normal Mode
`define AXI_NV_S8_BY_M7 0


// Name:         AXI_NV_S8_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 8 is visible by Master 8 in Normal Mode
`define AXI_NV_S8_BY_M8 0


// Name:         AXI_NV_S8_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 8 is visible by Master 9 in Normal Mode
`define AXI_NV_S8_BY_M9 0


// Name:         AXI_NV_S8_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 8 is visible by Master 10 in Normal Mode
`define AXI_NV_S8_BY_M10 0


// Name:         AXI_NV_S8_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 8 is visible by Master 11 in Normal Mode
`define AXI_NV_S8_BY_M11 0


// Name:         AXI_NV_S8_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 8 is visible by Master 12 in Normal Mode
`define AXI_NV_S8_BY_M12 0


// Name:         AXI_NV_S8_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 8 is visible by Master 13 in Normal Mode
`define AXI_NV_S8_BY_M13 0


// Name:         AXI_NV_S8_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 8 is visible by Master 14 in Normal Mode
`define AXI_NV_S8_BY_M14 0


// Name:         AXI_NV_S8_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 8 is visible by Master 15 in Normal Mode
`define AXI_NV_S8_BY_M15 0


// Name:         AXI_NV_S8_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 8 is visible by Master 16 in Normal Mode
`define AXI_NV_S8_BY_M16 0


// Name:         AXI_NV_S9_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 9 is visible by Master 1 in Normal Mode
`define AXI_NV_S9_BY_M1 0


// Name:         AXI_NV_S9_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 9 is visible by Master 2 in Normal Mode
`define AXI_NV_S9_BY_M2 0


// Name:         AXI_NV_S9_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 9 is visible by Master 3 in Normal Mode
`define AXI_NV_S9_BY_M3 0


// Name:         AXI_NV_S9_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 9 is visible by Master 4 in Normal Mode
`define AXI_NV_S9_BY_M4 0


// Name:         AXI_NV_S9_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 9 is visible by Master 5 in Normal Mode
`define AXI_NV_S9_BY_M5 0


// Name:         AXI_NV_S9_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 9 is visible by Master 6 in Normal Mode
`define AXI_NV_S9_BY_M6 0


// Name:         AXI_NV_S9_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 9 is visible by Master 7 in Normal Mode
`define AXI_NV_S9_BY_M7 0


// Name:         AXI_NV_S9_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 9 is visible by Master 8 in Normal Mode
`define AXI_NV_S9_BY_M8 0


// Name:         AXI_NV_S9_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 9 is visible by Master 9 in Normal Mode
`define AXI_NV_S9_BY_M9 0


// Name:         AXI_NV_S9_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 9 is visible by Master 10 in Normal Mode
`define AXI_NV_S9_BY_M10 0


// Name:         AXI_NV_S9_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 9 is visible by Master 11 in Normal Mode
`define AXI_NV_S9_BY_M11 0


// Name:         AXI_NV_S9_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 9 is visible by Master 12 in Normal Mode
`define AXI_NV_S9_BY_M12 0


// Name:         AXI_NV_S9_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 9 is visible by Master 13 in Normal Mode
`define AXI_NV_S9_BY_M13 0


// Name:         AXI_NV_S9_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 9 is visible by Master 14 in Normal Mode
`define AXI_NV_S9_BY_M14 0


// Name:         AXI_NV_S9_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 9 is visible by Master 15 in Normal Mode
`define AXI_NV_S9_BY_M15 0


// Name:         AXI_NV_S9_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 9 is visible by Master 16 in Normal Mode
`define AXI_NV_S9_BY_M16 0


// Name:         AXI_NV_S10_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 10 is visible by Master 1 in Normal Mode
`define AXI_NV_S10_BY_M1 0


// Name:         AXI_NV_S10_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 10 is visible by Master 2 in Normal Mode
`define AXI_NV_S10_BY_M2 0


// Name:         AXI_NV_S10_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 10 is visible by Master 3 in Normal Mode
`define AXI_NV_S10_BY_M3 0


// Name:         AXI_NV_S10_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 10 is visible by Master 4 in Normal Mode
`define AXI_NV_S10_BY_M4 0


// Name:         AXI_NV_S10_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 10 is visible by Master 5 in Normal Mode
`define AXI_NV_S10_BY_M5 0


// Name:         AXI_NV_S10_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 10 is visible by Master 6 in Normal Mode
`define AXI_NV_S10_BY_M6 0


// Name:         AXI_NV_S10_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 10 is visible by Master 7 in Normal Mode
`define AXI_NV_S10_BY_M7 0


// Name:         AXI_NV_S10_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 10 is visible by Master 8 in Normal Mode
`define AXI_NV_S10_BY_M8 0


// Name:         AXI_NV_S10_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 10 is visible by Master 9 in Normal Mode
`define AXI_NV_S10_BY_M9 0


// Name:         AXI_NV_S10_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 10 is visible by Master 10 in Normal 
// Mode
`define AXI_NV_S10_BY_M10 0


// Name:         AXI_NV_S10_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 10 is visible by Master 11 in Normal 
// Mode
`define AXI_NV_S10_BY_M11 0


// Name:         AXI_NV_S10_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 10 is visible by Master 12 in Normal 
// Mode
`define AXI_NV_S10_BY_M12 0


// Name:         AXI_NV_S10_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 10 is visible by Master 13 in Normal 
// Mode
`define AXI_NV_S10_BY_M13 0


// Name:         AXI_NV_S10_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 10 is visible by Master 14 in Normal 
// Mode
`define AXI_NV_S10_BY_M14 0


// Name:         AXI_NV_S10_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 10 is visible by Master 15 in Normal 
// Mode
`define AXI_NV_S10_BY_M15 0


// Name:         AXI_NV_S10_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 10 is visible by Master 16 in Normal 
// Mode
`define AXI_NV_S10_BY_M16 0


// Name:         AXI_NV_S11_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 11 is visible by Master 1 in Normal Mode
`define AXI_NV_S11_BY_M1 0


// Name:         AXI_NV_S11_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 11 is visible by Master 2 in Normal Mode
`define AXI_NV_S11_BY_M2 0


// Name:         AXI_NV_S11_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 11 is visible by Master 3 in Normal Mode
`define AXI_NV_S11_BY_M3 0


// Name:         AXI_NV_S11_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 11 is visible by Master 4 in Normal Mode
`define AXI_NV_S11_BY_M4 0


// Name:         AXI_NV_S11_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 11 is visible by Master 5 in Normal Mode
`define AXI_NV_S11_BY_M5 0


// Name:         AXI_NV_S11_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 11 is visible by Master 6 in Normal Mode
`define AXI_NV_S11_BY_M6 0


// Name:         AXI_NV_S11_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 11 is visible by Master 7 in Normal Mode
`define AXI_NV_S11_BY_M7 0


// Name:         AXI_NV_S11_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 11 is visible by Master 8 in Normal Mode
`define AXI_NV_S11_BY_M8 0


// Name:         AXI_NV_S11_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 11 is visible by Master 9 in Normal Mode
`define AXI_NV_S11_BY_M9 0


// Name:         AXI_NV_S11_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 11 is visible by Master 10 in Normal 
// Mode
`define AXI_NV_S11_BY_M10 0


// Name:         AXI_NV_S11_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 11 is visible by Master 11 in Normal 
// Mode
`define AXI_NV_S11_BY_M11 0


// Name:         AXI_NV_S11_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 11 is visible by Master 12 in Normal 
// Mode
`define AXI_NV_S11_BY_M12 0


// Name:         AXI_NV_S11_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 11 is visible by Master 13 in Normal 
// Mode
`define AXI_NV_S11_BY_M13 0


// Name:         AXI_NV_S11_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 11 is visible by Master 14 in Normal 
// Mode
`define AXI_NV_S11_BY_M14 0


// Name:         AXI_NV_S11_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 11 is visible by Master 15 in Normal 
// Mode
`define AXI_NV_S11_BY_M15 0


// Name:         AXI_NV_S11_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 11 is visible by Master 16 in Normal 
// Mode
`define AXI_NV_S11_BY_M16 0


// Name:         AXI_NV_S12_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 12 is visible by Master 1 in Normal Mode
`define AXI_NV_S12_BY_M1 0


// Name:         AXI_NV_S12_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 12 is visible by Master 2 in Normal Mode
`define AXI_NV_S12_BY_M2 0


// Name:         AXI_NV_S12_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 12 is visible by Master 3 in Normal Mode
`define AXI_NV_S12_BY_M3 0


// Name:         AXI_NV_S12_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 12 is visible by Master 4 in Normal Mode
`define AXI_NV_S12_BY_M4 0


// Name:         AXI_NV_S12_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 12 is visible by Master 5 in Normal Mode
`define AXI_NV_S12_BY_M5 0


// Name:         AXI_NV_S12_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 12 is visible by Master 6 in Normal Mode
`define AXI_NV_S12_BY_M6 0


// Name:         AXI_NV_S12_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 12 is visible by Master 7 in Normal Mode
`define AXI_NV_S12_BY_M7 0


// Name:         AXI_NV_S12_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 12 is visible by Master 8 in Normal Mode
`define AXI_NV_S12_BY_M8 0


// Name:         AXI_NV_S12_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 12 is visible by Master 9 in Normal Mode
`define AXI_NV_S12_BY_M9 0


// Name:         AXI_NV_S12_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 12 is visible by Master 10 in Normal 
// Mode
`define AXI_NV_S12_BY_M10 0


// Name:         AXI_NV_S12_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 12 is visible by Master 11 in Normal 
// Mode
`define AXI_NV_S12_BY_M11 0


// Name:         AXI_NV_S12_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 12 is visible by Master 12 in Normal 
// Mode
`define AXI_NV_S12_BY_M12 0


// Name:         AXI_NV_S12_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 12 is visible by Master 13 in Normal 
// Mode
`define AXI_NV_S12_BY_M13 0


// Name:         AXI_NV_S12_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 12 is visible by Master 14 in Normal 
// Mode
`define AXI_NV_S12_BY_M14 0


// Name:         AXI_NV_S12_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 12 is visible by Master 15 in Normal 
// Mode
`define AXI_NV_S12_BY_M15 0


// Name:         AXI_NV_S12_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 12 is visible by Master 16 in Normal 
// Mode
`define AXI_NV_S12_BY_M16 0


// Name:         AXI_NV_S13_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 13 is visible by Master 1 in Normal Mode
`define AXI_NV_S13_BY_M1 0


// Name:         AXI_NV_S13_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 13 is visible by Master 2 in Normal Mode
`define AXI_NV_S13_BY_M2 0


// Name:         AXI_NV_S13_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 13 is visible by Master 3 in Normal Mode
`define AXI_NV_S13_BY_M3 0


// Name:         AXI_NV_S13_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 13 is visible by Master 4 in Normal Mode
`define AXI_NV_S13_BY_M4 0


// Name:         AXI_NV_S13_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 13 is visible by Master 5 in Normal Mode
`define AXI_NV_S13_BY_M5 0


// Name:         AXI_NV_S13_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 13 is visible by Master 6 in Normal Mode
`define AXI_NV_S13_BY_M6 0


// Name:         AXI_NV_S13_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 13 is visible by Master 7 in Normal Mode
`define AXI_NV_S13_BY_M7 0


// Name:         AXI_NV_S13_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 13 is visible by Master 8 in Normal Mode
`define AXI_NV_S13_BY_M8 0


// Name:         AXI_NV_S13_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 13 is visible by Master 9 in Normal Mode
`define AXI_NV_S13_BY_M9 0


// Name:         AXI_NV_S13_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 13 is visible by Master 10 in Normal 
// Mode
`define AXI_NV_S13_BY_M10 0


// Name:         AXI_NV_S13_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 13 is visible by Master 11 in Normal 
// Mode
`define AXI_NV_S13_BY_M11 0


// Name:         AXI_NV_S13_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 13 is visible by Master 12 in Normal 
// Mode
`define AXI_NV_S13_BY_M12 0


// Name:         AXI_NV_S13_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 13 is visible by Master 13 in Normal 
// Mode
`define AXI_NV_S13_BY_M13 0


// Name:         AXI_NV_S13_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 13 is visible by Master 14 in Normal 
// Mode
`define AXI_NV_S13_BY_M14 0


// Name:         AXI_NV_S13_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 13 is visible by Master 15 in Normal 
// Mode
`define AXI_NV_S13_BY_M15 0


// Name:         AXI_NV_S13_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 13 is visible by Master 16 in Normal 
// Mode
`define AXI_NV_S13_BY_M16 0


// Name:         AXI_NV_S14_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 14 is visible by Master 1 in Normal Mode
`define AXI_NV_S14_BY_M1 0


// Name:         AXI_NV_S14_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 14 is visible by Master 2 in Normal Mode
`define AXI_NV_S14_BY_M2 0


// Name:         AXI_NV_S14_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 14 is visible by Master 3 in Normal Mode
`define AXI_NV_S14_BY_M3 0


// Name:         AXI_NV_S14_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 14 is visible by Master 4 in Normal Mode
`define AXI_NV_S14_BY_M4 0


// Name:         AXI_NV_S14_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 14 is visible by Master 5 in Normal Mode
`define AXI_NV_S14_BY_M5 0


// Name:         AXI_NV_S14_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 14 is visible by Master 6 in Normal Mode
`define AXI_NV_S14_BY_M6 0


// Name:         AXI_NV_S14_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 14 is visible by Master 7 in Normal Mode
`define AXI_NV_S14_BY_M7 0


// Name:         AXI_NV_S14_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 14 is visible by Master 8 in Normal Mode
`define AXI_NV_S14_BY_M8 0


// Name:         AXI_NV_S14_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 14 is visible by Master 9 in Normal Mode
`define AXI_NV_S14_BY_M9 0


// Name:         AXI_NV_S14_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 14 is visible by Master 10 in Normal 
// Mode
`define AXI_NV_S14_BY_M10 0


// Name:         AXI_NV_S14_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 14 is visible by Master 11 in Normal 
// Mode
`define AXI_NV_S14_BY_M11 0


// Name:         AXI_NV_S14_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 14 is visible by Master 12 in Normal 
// Mode
`define AXI_NV_S14_BY_M12 0


// Name:         AXI_NV_S14_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 14 is visible by Master 13 in Normal 
// Mode
`define AXI_NV_S14_BY_M13 0


// Name:         AXI_NV_S14_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 14 is visible by Master 14 in Normal 
// Mode
`define AXI_NV_S14_BY_M14 0


// Name:         AXI_NV_S14_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 14 is visible by Master 15 in Normal 
// Mode
`define AXI_NV_S14_BY_M15 0


// Name:         AXI_NV_S14_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 14 is visible by Master 16 in Normal 
// Mode
`define AXI_NV_S14_BY_M16 0


// Name:         AXI_NV_S15_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 15 is visible by Master 1 in Normal Mode
`define AXI_NV_S15_BY_M1 0


// Name:         AXI_NV_S15_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 15 is visible by Master 2 in Normal Mode
`define AXI_NV_S15_BY_M2 0


// Name:         AXI_NV_S15_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 15 is visible by Master 3 in Normal Mode
`define AXI_NV_S15_BY_M3 0


// Name:         AXI_NV_S15_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 15 is visible by Master 4 in Normal Mode
`define AXI_NV_S15_BY_M4 0


// Name:         AXI_NV_S15_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 15 is visible by Master 5 in Normal Mode
`define AXI_NV_S15_BY_M5 0


// Name:         AXI_NV_S15_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 15 is visible by Master 6 in Normal Mode
`define AXI_NV_S15_BY_M6 0


// Name:         AXI_NV_S15_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 15 is visible by Master 7 in Normal Mode
`define AXI_NV_S15_BY_M7 0


// Name:         AXI_NV_S15_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 15 is visible by Master 8 in Normal Mode
`define AXI_NV_S15_BY_M8 0


// Name:         AXI_NV_S15_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 15 is visible by Master 9 in Normal Mode
`define AXI_NV_S15_BY_M9 0


// Name:         AXI_NV_S15_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 15 is visible by Master 10 in Normal 
// Mode
`define AXI_NV_S15_BY_M10 0


// Name:         AXI_NV_S15_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 15 is visible by Master 11 in Normal 
// Mode
`define AXI_NV_S15_BY_M11 0


// Name:         AXI_NV_S15_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 15 is visible by Master 12 in Normal 
// Mode
`define AXI_NV_S15_BY_M12 0


// Name:         AXI_NV_S15_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 15 is visible by Master 13 in Normal 
// Mode
`define AXI_NV_S15_BY_M13 0


// Name:         AXI_NV_S15_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 15 is visible by Master 14 in Normal 
// Mode
`define AXI_NV_S15_BY_M14 0


// Name:         AXI_NV_S15_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 15 is visible by Master 15 in Normal 
// Mode
`define AXI_NV_S15_BY_M15 0


// Name:         AXI_NV_S15_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 15 is visible by Master 16 in Normal 
// Mode
`define AXI_NV_S15_BY_M16 0


// Name:         AXI_NV_S16_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 1))
// 
// This selects whether Slave 16 is visible by Master 1 in Normal Mode
`define AXI_NV_S16_BY_M1 0


// Name:         AXI_NV_S16_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 2))
// 
// This selects whether Slave 16 is visible by Master 2 in Normal Mode
`define AXI_NV_S16_BY_M2 0


// Name:         AXI_NV_S16_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 3))
// 
// This selects whether Slave 16 is visible by Master 3 in Normal Mode
`define AXI_NV_S16_BY_M3 0


// Name:         AXI_NV_S16_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 4))
// 
// This selects whether Slave 16 is visible by Master 4 in Normal Mode
`define AXI_NV_S16_BY_M4 0


// Name:         AXI_NV_S16_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 5))
// 
// This selects whether Slave 16 is visible by Master 5 in Normal Mode
`define AXI_NV_S16_BY_M5 0


// Name:         AXI_NV_S16_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 6))
// 
// This selects whether Slave 16 is visible by Master 6 in Normal Mode
`define AXI_NV_S16_BY_M6 0


// Name:         AXI_NV_S16_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 7))
// 
// This selects whether Slave 16 is visible by Master 7 in Normal Mode
`define AXI_NV_S16_BY_M7 0


// Name:         AXI_NV_S16_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 8))
// 
// This selects whether Slave 16 is visible by Master 8 in Normal Mode
`define AXI_NV_S16_BY_M8 0


// Name:         AXI_NV_S16_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 9))
// 
// This selects whether Slave 16 is visible by Master 9 in Normal Mode
`define AXI_NV_S16_BY_M9 0


// Name:         AXI_NV_S16_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 10))
// 
// This selects whether Slave 16 is visible by Master 10 in Normal 
// Mode
`define AXI_NV_S16_BY_M10 0


// Name:         AXI_NV_S16_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 11))
// 
// This selects whether Slave 16 is visible by Master 11 in Normal 
// Mode
`define AXI_NV_S16_BY_M11 0


// Name:         AXI_NV_S16_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 12))
// 
// This selects whether Slave 16 is visible by Master 12 in Normal 
// Mode
`define AXI_NV_S16_BY_M12 0


// Name:         AXI_NV_S16_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 13))
// 
// This selects whether Slave 16 is visible by Master 13 in Normal 
// Mode
`define AXI_NV_S16_BY_M13 0


// Name:         AXI_NV_S16_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 14))
// 
// This selects whether Slave 16 is visible by Master 14 in Normal 
// Mode
`define AXI_NV_S16_BY_M14 0


// Name:         AXI_NV_S16_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 15))
// 
// This selects whether Slave 16 is visible by Master 15 in Normal 
// Mode
`define AXI_NV_S16_BY_M15 0


// Name:         AXI_NV_S16_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 16))
// 
// This selects whether Slave 16 is visible by Master 16 in Normal 
// Mode
`define AXI_NV_S16_BY_M16 0


//This shows whether Slave 1 is visible by any master in Normal Mode

`define AXI_NV_S1_BY_ANY_M 1


//This shows whether Slave 2 is visible by any master in Normal Mode

`define AXI_NV_S2_BY_ANY_M 0


//This shows whether Slave 3 is visible by any master in Normal Mode

`define AXI_NV_S3_BY_ANY_M 0


//This shows whether Slave 4 is visible by any master in Normal Mode

`define AXI_NV_S4_BY_ANY_M 0


//This shows whether Slave 5 is visible by any master in Normal Mode

`define AXI_NV_S5_BY_ANY_M 0


//This shows whether Slave 6 is visible by any master in Normal Mode

`define AXI_NV_S6_BY_ANY_M 0


//This shows whether Slave 7 is visible by any master in Normal Mode

`define AXI_NV_S7_BY_ANY_M 0


//This shows whether Slave 8 is visible by any master in Normal Mode

`define AXI_NV_S8_BY_ANY_M 0


//This shows whether Slave 9 is visible by any master in Normal Mode

`define AXI_NV_S9_BY_ANY_M 0


//This shows whether Slave 10 is visible by any master in Normal Mode

`define AXI_NV_S10_BY_ANY_M 0


//This shows whether Slave 11 is visible by any master in Normal Mode

`define AXI_NV_S11_BY_ANY_M 0


//This shows whether Slave 12 is visible by any master in Normal Mode

`define AXI_NV_S12_BY_ANY_M 0


//This shows whether Slave 13 is visible by any master in Normal Mode

`define AXI_NV_S13_BY_ANY_M 0


//This shows whether Slave 14 is visible by any master in Normal Mode

`define AXI_NV_S14_BY_ANY_M 0


//This shows whether Slave 15 is visible by any master in Normal Mode

`define AXI_NV_S15_BY_ANY_M 0


//This shows whether Slave 16 is visible by any master in Normal Mode

`define AXI_NV_S16_BY_ANY_M 0


// Name:         AXI_BV_S0_BY_M1
// Default:      true
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 1 in Boot Mode
`define AXI_BV_S0_BY_M1 1


// Name:         AXI_BV_S0_BY_M2
// Default:      true
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 2 in Boot Mode
`define AXI_BV_S0_BY_M2 1


// Name:         AXI_BV_S0_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 3 in Boot Mode
`define AXI_BV_S0_BY_M3 0


// Name:         AXI_BV_S0_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 4 in Boot Mode
`define AXI_BV_S0_BY_M4 0


// Name:         AXI_BV_S0_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 5 in Boot Mode
`define AXI_BV_S0_BY_M5 0


// Name:         AXI_BV_S0_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 6 in Boot Mode
`define AXI_BV_S0_BY_M6 0


// Name:         AXI_BV_S0_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 7 in Boot Mode
`define AXI_BV_S0_BY_M7 0


// Name:         AXI_BV_S0_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 8 in Boot Mode
`define AXI_BV_S0_BY_M8 0


// Name:         AXI_BV_S0_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 9 in Boot Mode
`define AXI_BV_S0_BY_M9 0


// Name:         AXI_BV_S0_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 10 in Boot Mode
`define AXI_BV_S0_BY_M10 0


// Name:         AXI_BV_S0_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 11 in Boot Mode
`define AXI_BV_S0_BY_M11 0


// Name:         AXI_BV_S0_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 12 in Boot Mode
`define AXI_BV_S0_BY_M12 0


// Name:         AXI_BV_S0_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 13 in Boot Mode
`define AXI_BV_S0_BY_M13 0


// Name:         AXI_BV_S0_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 14 in Boot Mode
`define AXI_BV_S0_BY_M14 0


// Name:         AXI_BV_S0_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 15 in Boot Mode
`define AXI_BV_S0_BY_M15 0


// Name:         AXI_BV_S0_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0
// 
// This selects whether Slave 0 is visible by Master 16 in Boot Mode
`define AXI_BV_S0_BY_M16 0


// Name:         AXI_BV_S1_BY_M1
// Default:      true
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 1 in Boot Mode
`define AXI_BV_S1_BY_M1 1


// Name:         AXI_BV_S1_BY_M2
// Default:      true
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 2 in Boot Mode
`define AXI_BV_S1_BY_M2 1


// Name:         AXI_BV_S1_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 3 in Boot Mode
`define AXI_BV_S1_BY_M3 0


// Name:         AXI_BV_S1_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 4 in Boot Mode
`define AXI_BV_S1_BY_M4 0


// Name:         AXI_BV_S1_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 5 in Boot Mode
`define AXI_BV_S1_BY_M5 0


// Name:         AXI_BV_S1_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 6 in Boot Mode
`define AXI_BV_S1_BY_M6 0


// Name:         AXI_BV_S1_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 7 in Boot Mode
`define AXI_BV_S1_BY_M7 0


// Name:         AXI_BV_S1_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 8 in Boot Mode
`define AXI_BV_S1_BY_M8 0


// Name:         AXI_BV_S1_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 9 in Boot Mode
`define AXI_BV_S1_BY_M9 0


// Name:         AXI_BV_S1_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 10 in Boot Mode
`define AXI_BV_S1_BY_M10 0


// Name:         AXI_BV_S1_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 11 in Boot Mode
`define AXI_BV_S1_BY_M11 0


// Name:         AXI_BV_S1_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 12 in Boot Mode
`define AXI_BV_S1_BY_M12 0


// Name:         AXI_BV_S1_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 13 in Boot Mode
`define AXI_BV_S1_BY_M13 0


// Name:         AXI_BV_S1_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 14 in Boot Mode
`define AXI_BV_S1_BY_M14 0


// Name:         AXI_BV_S1_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 15 in Boot Mode
`define AXI_BV_S1_BY_M15 0


// Name:         AXI_BV_S1_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 1) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 1 is visible by Master 16 in Boot Mode
`define AXI_BV_S1_BY_M16 0


// Name:         AXI_BV_S2_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 1 in Boot Mode
`define AXI_BV_S2_BY_M1 0


// Name:         AXI_BV_S2_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 2 in Boot Mode
`define AXI_BV_S2_BY_M2 0


// Name:         AXI_BV_S2_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 3 in Boot Mode
`define AXI_BV_S2_BY_M3 0


// Name:         AXI_BV_S2_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 4 in Boot Mode
`define AXI_BV_S2_BY_M4 0


// Name:         AXI_BV_S2_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 5 in Boot Mode
`define AXI_BV_S2_BY_M5 0


// Name:         AXI_BV_S2_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 6 in Boot Mode
`define AXI_BV_S2_BY_M6 0


// Name:         AXI_BV_S2_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 7 in Boot Mode
`define AXI_BV_S2_BY_M7 0


// Name:         AXI_BV_S2_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 8 in Boot Mode
`define AXI_BV_S2_BY_M8 0


// Name:         AXI_BV_S2_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 9 in Boot Mode
`define AXI_BV_S2_BY_M9 0


// Name:         AXI_BV_S2_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 10 in Boot Mode
`define AXI_BV_S2_BY_M10 0


// Name:         AXI_BV_S2_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 11 in Boot Mode
`define AXI_BV_S2_BY_M11 0


// Name:         AXI_BV_S2_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 12 in Boot Mode
`define AXI_BV_S2_BY_M12 0


// Name:         AXI_BV_S2_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 13 in Boot Mode
`define AXI_BV_S2_BY_M13 0


// Name:         AXI_BV_S2_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 14 in Boot Mode
`define AXI_BV_S2_BY_M14 0


// Name:         AXI_BV_S2_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 15 in Boot Mode
`define AXI_BV_S2_BY_M15 0


// Name:         AXI_BV_S2_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 2) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 2 is visible by Master 16 in Boot Mode
`define AXI_BV_S2_BY_M16 0


// Name:         AXI_BV_S3_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 1 in Boot Mode
`define AXI_BV_S3_BY_M1 0


// Name:         AXI_BV_S3_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 2 in Boot Mode
`define AXI_BV_S3_BY_M2 0


// Name:         AXI_BV_S3_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 3 in Boot Mode
`define AXI_BV_S3_BY_M3 0


// Name:         AXI_BV_S3_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 4 in Boot Mode
`define AXI_BV_S3_BY_M4 0


// Name:         AXI_BV_S3_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 5 in Boot Mode
`define AXI_BV_S3_BY_M5 0


// Name:         AXI_BV_S3_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 6 in Boot Mode
`define AXI_BV_S3_BY_M6 0


// Name:         AXI_BV_S3_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 7 in Boot Mode
`define AXI_BV_S3_BY_M7 0


// Name:         AXI_BV_S3_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 8 in Boot Mode
`define AXI_BV_S3_BY_M8 0


// Name:         AXI_BV_S3_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 9 in Boot Mode
`define AXI_BV_S3_BY_M9 0


// Name:         AXI_BV_S3_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 10 in Boot Mode
`define AXI_BV_S3_BY_M10 0


// Name:         AXI_BV_S3_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 11 in Boot Mode
`define AXI_BV_S3_BY_M11 0


// Name:         AXI_BV_S3_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 12 in Boot Mode
`define AXI_BV_S3_BY_M12 0


// Name:         AXI_BV_S3_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 13 in Boot Mode
`define AXI_BV_S3_BY_M13 0


// Name:         AXI_BV_S3_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 14 in Boot Mode
`define AXI_BV_S3_BY_M14 0


// Name:         AXI_BV_S3_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 15 in Boot Mode
`define AXI_BV_S3_BY_M15 0


// Name:         AXI_BV_S3_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 3) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 3 is visible by Master 16 in Boot Mode
`define AXI_BV_S3_BY_M16 0


// Name:         AXI_BV_S4_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 1 in Boot Mode
`define AXI_BV_S4_BY_M1 0


// Name:         AXI_BV_S4_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 2 in Boot Mode
`define AXI_BV_S4_BY_M2 0


// Name:         AXI_BV_S4_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 3 in Boot Mode
`define AXI_BV_S4_BY_M3 0


// Name:         AXI_BV_S4_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 4 in Boot Mode
`define AXI_BV_S4_BY_M4 0


// Name:         AXI_BV_S4_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 5 in Boot Mode
`define AXI_BV_S4_BY_M5 0


// Name:         AXI_BV_S4_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 6 in Boot Mode
`define AXI_BV_S4_BY_M6 0


// Name:         AXI_BV_S4_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 7 in Boot Mode
`define AXI_BV_S4_BY_M7 0


// Name:         AXI_BV_S4_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 8 in Boot Mode
`define AXI_BV_S4_BY_M8 0


// Name:         AXI_BV_S4_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 9 in Boot Mode
`define AXI_BV_S4_BY_M9 0


// Name:         AXI_BV_S4_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 10 in Boot Mode
`define AXI_BV_S4_BY_M10 0


// Name:         AXI_BV_S4_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 11 in Boot Mode
`define AXI_BV_S4_BY_M11 0


// Name:         AXI_BV_S4_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 12 in Boot Mode
`define AXI_BV_S4_BY_M12 0


// Name:         AXI_BV_S4_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 13 in Boot Mode
`define AXI_BV_S4_BY_M13 0


// Name:         AXI_BV_S4_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 14 in Boot Mode
`define AXI_BV_S4_BY_M14 0


// Name:         AXI_BV_S4_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 15 in Boot Mode
`define AXI_BV_S4_BY_M15 0


// Name:         AXI_BV_S4_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 4) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 4 is visible by Master 16 in Boot Mode
`define AXI_BV_S4_BY_M16 0


// Name:         AXI_BV_S5_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 1 in Boot Mode
`define AXI_BV_S5_BY_M1 0


// Name:         AXI_BV_S5_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 2 in Boot Mode
`define AXI_BV_S5_BY_M2 0


// Name:         AXI_BV_S5_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 3 in Boot Mode
`define AXI_BV_S5_BY_M3 0


// Name:         AXI_BV_S5_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 4 in Boot Mode
`define AXI_BV_S5_BY_M4 0


// Name:         AXI_BV_S5_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 5 in Boot Mode
`define AXI_BV_S5_BY_M5 0


// Name:         AXI_BV_S5_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 6 in Boot Mode
`define AXI_BV_S5_BY_M6 0


// Name:         AXI_BV_S5_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 7 in Boot Mode
`define AXI_BV_S5_BY_M7 0


// Name:         AXI_BV_S5_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 8 in Boot Mode
`define AXI_BV_S5_BY_M8 0


// Name:         AXI_BV_S5_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 9 in Boot Mode
`define AXI_BV_S5_BY_M9 0


// Name:         AXI_BV_S5_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 10 in Boot Mode
`define AXI_BV_S5_BY_M10 0


// Name:         AXI_BV_S5_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 11 in Boot Mode
`define AXI_BV_S5_BY_M11 0


// Name:         AXI_BV_S5_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 12 in Boot Mode
`define AXI_BV_S5_BY_M12 0


// Name:         AXI_BV_S5_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 13 in Boot Mode
`define AXI_BV_S5_BY_M13 0


// Name:         AXI_BV_S5_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 14 in Boot Mode
`define AXI_BV_S5_BY_M14 0


// Name:         AXI_BV_S5_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 15 in Boot Mode
`define AXI_BV_S5_BY_M15 0


// Name:         AXI_BV_S5_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 5) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 5 is visible by Master 16 in Boot Mode
`define AXI_BV_S5_BY_M16 0


// Name:         AXI_BV_S6_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 1 in Boot Mode
`define AXI_BV_S6_BY_M1 0


// Name:         AXI_BV_S6_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 2 in Boot Mode
`define AXI_BV_S6_BY_M2 0


// Name:         AXI_BV_S6_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 3 in Boot Mode
`define AXI_BV_S6_BY_M3 0


// Name:         AXI_BV_S6_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 4 in Boot Mode
`define AXI_BV_S6_BY_M4 0


// Name:         AXI_BV_S6_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 5 in Boot Mode
`define AXI_BV_S6_BY_M5 0


// Name:         AXI_BV_S6_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 6 in Boot Mode
`define AXI_BV_S6_BY_M6 0


// Name:         AXI_BV_S6_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 7 in Boot Mode
`define AXI_BV_S6_BY_M7 0


// Name:         AXI_BV_S6_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 8 in Boot Mode
`define AXI_BV_S6_BY_M8 0


// Name:         AXI_BV_S6_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 9 in Boot Mode
`define AXI_BV_S6_BY_M9 0


// Name:         AXI_BV_S6_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 10 in Boot Mode
`define AXI_BV_S6_BY_M10 0


// Name:         AXI_BV_S6_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 11 in Boot Mode
`define AXI_BV_S6_BY_M11 0


// Name:         AXI_BV_S6_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 12 in Boot Mode
`define AXI_BV_S6_BY_M12 0


// Name:         AXI_BV_S6_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 13 in Boot Mode
`define AXI_BV_S6_BY_M13 0


// Name:         AXI_BV_S6_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 14 in Boot Mode
`define AXI_BV_S6_BY_M14 0


// Name:         AXI_BV_S6_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 15 in Boot Mode
`define AXI_BV_S6_BY_M15 0


// Name:         AXI_BV_S6_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 6) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 6 is visible by Master 16 in Boot Mode
`define AXI_BV_S6_BY_M16 0


// Name:         AXI_BV_S7_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 1 in Boot Mode
`define AXI_BV_S7_BY_M1 0


// Name:         AXI_BV_S7_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 2 in Boot Mode
`define AXI_BV_S7_BY_M2 0


// Name:         AXI_BV_S7_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 3 in Boot Mode
`define AXI_BV_S7_BY_M3 0


// Name:         AXI_BV_S7_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 4 in Boot Mode
`define AXI_BV_S7_BY_M4 0


// Name:         AXI_BV_S7_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 5 in Boot Mode
`define AXI_BV_S7_BY_M5 0


// Name:         AXI_BV_S7_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 6 in Boot Mode
`define AXI_BV_S7_BY_M6 0


// Name:         AXI_BV_S7_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 7 in Boot Mode
`define AXI_BV_S7_BY_M7 0


// Name:         AXI_BV_S7_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 8 in Boot Mode
`define AXI_BV_S7_BY_M8 0


// Name:         AXI_BV_S7_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 9 in Boot Mode
`define AXI_BV_S7_BY_M9 0


// Name:         AXI_BV_S7_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 10 in Boot Mode
`define AXI_BV_S7_BY_M10 0


// Name:         AXI_BV_S7_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 11 in Boot Mode
`define AXI_BV_S7_BY_M11 0


// Name:         AXI_BV_S7_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 12 in Boot Mode
`define AXI_BV_S7_BY_M12 0


// Name:         AXI_BV_S7_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 13 in Boot Mode
`define AXI_BV_S7_BY_M13 0


// Name:         AXI_BV_S7_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 14 in Boot Mode
`define AXI_BV_S7_BY_M14 0


// Name:         AXI_BV_S7_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 15 in Boot Mode
`define AXI_BV_S7_BY_M15 0


// Name:         AXI_BV_S7_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 7) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 7 is visible by Master 16 in Boot Mode
`define AXI_BV_S7_BY_M16 0


// Name:         AXI_BV_S8_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 1 in Boot Mode
`define AXI_BV_S8_BY_M1 0


// Name:         AXI_BV_S8_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 2 in Boot Mode
`define AXI_BV_S8_BY_M2 0


// Name:         AXI_BV_S8_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 3 in Boot Mode
`define AXI_BV_S8_BY_M3 0


// Name:         AXI_BV_S8_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 4 in Boot Mode
`define AXI_BV_S8_BY_M4 0


// Name:         AXI_BV_S8_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 5 in Boot Mode
`define AXI_BV_S8_BY_M5 0


// Name:         AXI_BV_S8_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 6 in Boot Mode
`define AXI_BV_S8_BY_M6 0


// Name:         AXI_BV_S8_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 7 in Boot Mode
`define AXI_BV_S8_BY_M7 0


// Name:         AXI_BV_S8_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 8 in Boot Mode
`define AXI_BV_S8_BY_M8 0


// Name:         AXI_BV_S8_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 9 in Boot Mode
`define AXI_BV_S8_BY_M9 0


// Name:         AXI_BV_S8_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 10 in Boot Mode
`define AXI_BV_S8_BY_M10 0


// Name:         AXI_BV_S8_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 11 in Boot Mode
`define AXI_BV_S8_BY_M11 0


// Name:         AXI_BV_S8_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 12 in Boot Mode
`define AXI_BV_S8_BY_M12 0


// Name:         AXI_BV_S8_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 13 in Boot Mode
`define AXI_BV_S8_BY_M13 0


// Name:         AXI_BV_S8_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 14 in Boot Mode
`define AXI_BV_S8_BY_M14 0


// Name:         AXI_BV_S8_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 15 in Boot Mode
`define AXI_BV_S8_BY_M15 0


// Name:         AXI_BV_S8_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 8) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 8 is visible by Master 16 in Boot Mode
`define AXI_BV_S8_BY_M16 0


// Name:         AXI_BV_S9_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 1 in Boot Mode
`define AXI_BV_S9_BY_M1 0


// Name:         AXI_BV_S9_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 2 in Boot Mode
`define AXI_BV_S9_BY_M2 0


// Name:         AXI_BV_S9_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 3 in Boot Mode
`define AXI_BV_S9_BY_M3 0


// Name:         AXI_BV_S9_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 4 in Boot Mode
`define AXI_BV_S9_BY_M4 0


// Name:         AXI_BV_S9_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 5 in Boot Mode
`define AXI_BV_S9_BY_M5 0


// Name:         AXI_BV_S9_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 6 in Boot Mode
`define AXI_BV_S9_BY_M6 0


// Name:         AXI_BV_S9_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 7 in Boot Mode
`define AXI_BV_S9_BY_M7 0


// Name:         AXI_BV_S9_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 8 in Boot Mode
`define AXI_BV_S9_BY_M8 0


// Name:         AXI_BV_S9_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 9 in Boot Mode
`define AXI_BV_S9_BY_M9 0


// Name:         AXI_BV_S9_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 10 in Boot Mode
`define AXI_BV_S9_BY_M10 0


// Name:         AXI_BV_S9_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 11 in Boot Mode
`define AXI_BV_S9_BY_M11 0


// Name:         AXI_BV_S9_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 12 in Boot Mode
`define AXI_BV_S9_BY_M12 0


// Name:         AXI_BV_S9_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 13 in Boot Mode
`define AXI_BV_S9_BY_M13 0


// Name:         AXI_BV_S9_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 14 in Boot Mode
`define AXI_BV_S9_BY_M14 0


// Name:         AXI_BV_S9_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 15 in Boot Mode
`define AXI_BV_S9_BY_M15 0


// Name:         AXI_BV_S9_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 9) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 9 is visible by Master 16 in Boot Mode
`define AXI_BV_S9_BY_M16 0


// Name:         AXI_BV_S10_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 1 in Boot Mode
`define AXI_BV_S10_BY_M1 0


// Name:         AXI_BV_S10_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 2 in Boot Mode
`define AXI_BV_S10_BY_M2 0


// Name:         AXI_BV_S10_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 3 in Boot Mode
`define AXI_BV_S10_BY_M3 0


// Name:         AXI_BV_S10_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 4 in Boot Mode
`define AXI_BV_S10_BY_M4 0


// Name:         AXI_BV_S10_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 5 in Boot Mode
`define AXI_BV_S10_BY_M5 0


// Name:         AXI_BV_S10_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 6 in Boot Mode
`define AXI_BV_S10_BY_M6 0


// Name:         AXI_BV_S10_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 7 in Boot Mode
`define AXI_BV_S10_BY_M7 0


// Name:         AXI_BV_S10_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 8 in Boot Mode
`define AXI_BV_S10_BY_M8 0


// Name:         AXI_BV_S10_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 9 in Boot Mode
`define AXI_BV_S10_BY_M9 0


// Name:         AXI_BV_S10_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 10 in Boot Mode
`define AXI_BV_S10_BY_M10 0


// Name:         AXI_BV_S10_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 11 in Boot Mode
`define AXI_BV_S10_BY_M11 0


// Name:         AXI_BV_S10_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 12 in Boot Mode
`define AXI_BV_S10_BY_M12 0


// Name:         AXI_BV_S10_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 13 in Boot Mode
`define AXI_BV_S10_BY_M13 0


// Name:         AXI_BV_S10_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 14 in Boot Mode
`define AXI_BV_S10_BY_M14 0


// Name:         AXI_BV_S10_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 15 in Boot Mode
`define AXI_BV_S10_BY_M15 0


// Name:         AXI_BV_S10_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 10) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 10 is visible by Master 16 in Boot Mode
`define AXI_BV_S10_BY_M16 0


// Name:         AXI_BV_S11_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 1 in Boot Mode
`define AXI_BV_S11_BY_M1 0


// Name:         AXI_BV_S11_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 2 in Boot Mode
`define AXI_BV_S11_BY_M2 0


// Name:         AXI_BV_S11_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 3 in Boot Mode
`define AXI_BV_S11_BY_M3 0


// Name:         AXI_BV_S11_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 4 in Boot Mode
`define AXI_BV_S11_BY_M4 0


// Name:         AXI_BV_S11_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 5 in Boot Mode
`define AXI_BV_S11_BY_M5 0


// Name:         AXI_BV_S11_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 6 in Boot Mode
`define AXI_BV_S11_BY_M6 0


// Name:         AXI_BV_S11_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 7 in Boot Mode
`define AXI_BV_S11_BY_M7 0


// Name:         AXI_BV_S11_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 8 in Boot Mode
`define AXI_BV_S11_BY_M8 0


// Name:         AXI_BV_S11_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 9 in Boot Mode
`define AXI_BV_S11_BY_M9 0


// Name:         AXI_BV_S11_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 10 in Boot Mode
`define AXI_BV_S11_BY_M10 0


// Name:         AXI_BV_S11_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 11 in Boot Mode
`define AXI_BV_S11_BY_M11 0


// Name:         AXI_BV_S11_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 12 in Boot Mode
`define AXI_BV_S11_BY_M12 0


// Name:         AXI_BV_S11_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 13 in Boot Mode
`define AXI_BV_S11_BY_M13 0


// Name:         AXI_BV_S11_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 14 in Boot Mode
`define AXI_BV_S11_BY_M14 0


// Name:         AXI_BV_S11_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 15 in Boot Mode
`define AXI_BV_S11_BY_M15 0


// Name:         AXI_BV_S11_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 11) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 11 is visible by Master 16 in Boot Mode
`define AXI_BV_S11_BY_M16 0


// Name:         AXI_BV_S12_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 1 in Boot Mode
`define AXI_BV_S12_BY_M1 0


// Name:         AXI_BV_S12_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 2 in Boot Mode
`define AXI_BV_S12_BY_M2 0


// Name:         AXI_BV_S12_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 3 in Boot Mode
`define AXI_BV_S12_BY_M3 0


// Name:         AXI_BV_S12_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 4 in Boot Mode
`define AXI_BV_S12_BY_M4 0


// Name:         AXI_BV_S12_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 5 in Boot Mode
`define AXI_BV_S12_BY_M5 0


// Name:         AXI_BV_S12_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 6 in Boot Mode
`define AXI_BV_S12_BY_M6 0


// Name:         AXI_BV_S12_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 7 in Boot Mode
`define AXI_BV_S12_BY_M7 0


// Name:         AXI_BV_S12_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 8 in Boot Mode
`define AXI_BV_S12_BY_M8 0


// Name:         AXI_BV_S12_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 9 in Boot Mode
`define AXI_BV_S12_BY_M9 0


// Name:         AXI_BV_S12_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 10 in Boot Mode
`define AXI_BV_S12_BY_M10 0


// Name:         AXI_BV_S12_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 11 in Boot Mode
`define AXI_BV_S12_BY_M11 0


// Name:         AXI_BV_S12_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 12 in Boot Mode
`define AXI_BV_S12_BY_M12 0


// Name:         AXI_BV_S12_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 13 in Boot Mode
`define AXI_BV_S12_BY_M13 0


// Name:         AXI_BV_S12_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 14 in Boot Mode
`define AXI_BV_S12_BY_M14 0


// Name:         AXI_BV_S12_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 15 in Boot Mode
`define AXI_BV_S12_BY_M15 0


// Name:         AXI_BV_S12_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 12) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 12 is visible by Master 16 in Boot Mode
`define AXI_BV_S12_BY_M16 0


// Name:         AXI_BV_S13_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 1 in Boot Mode
`define AXI_BV_S13_BY_M1 0


// Name:         AXI_BV_S13_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 2 in Boot Mode
`define AXI_BV_S13_BY_M2 0


// Name:         AXI_BV_S13_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 3 in Boot Mode
`define AXI_BV_S13_BY_M3 0


// Name:         AXI_BV_S13_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 4 in Boot Mode
`define AXI_BV_S13_BY_M4 0


// Name:         AXI_BV_S13_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 5 in Boot Mode
`define AXI_BV_S13_BY_M5 0


// Name:         AXI_BV_S13_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 6 in Boot Mode
`define AXI_BV_S13_BY_M6 0


// Name:         AXI_BV_S13_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 7 in Boot Mode
`define AXI_BV_S13_BY_M7 0


// Name:         AXI_BV_S13_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 8 in Boot Mode
`define AXI_BV_S13_BY_M8 0


// Name:         AXI_BV_S13_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 9 in Boot Mode
`define AXI_BV_S13_BY_M9 0


// Name:         AXI_BV_S13_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 10 in Boot Mode
`define AXI_BV_S13_BY_M10 0


// Name:         AXI_BV_S13_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 11 in Boot Mode
`define AXI_BV_S13_BY_M11 0


// Name:         AXI_BV_S13_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 12 in Boot Mode
`define AXI_BV_S13_BY_M12 0


// Name:         AXI_BV_S13_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 13 in Boot Mode
`define AXI_BV_S13_BY_M13 0


// Name:         AXI_BV_S13_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 14 in Boot Mode
`define AXI_BV_S13_BY_M14 0


// Name:         AXI_BV_S13_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 15 in Boot Mode
`define AXI_BV_S13_BY_M15 0


// Name:         AXI_BV_S13_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 13) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 13 is visible by Master 16 in Boot Mode
`define AXI_BV_S13_BY_M16 0


// Name:         AXI_BV_S14_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 1 in Boot Mode
`define AXI_BV_S14_BY_M1 0


// Name:         AXI_BV_S14_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 2 in Boot Mode
`define AXI_BV_S14_BY_M2 0


// Name:         AXI_BV_S14_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 3 in Boot Mode
`define AXI_BV_S14_BY_M3 0


// Name:         AXI_BV_S14_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 4 in Boot Mode
`define AXI_BV_S14_BY_M4 0


// Name:         AXI_BV_S14_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 5 in Boot Mode
`define AXI_BV_S14_BY_M5 0


// Name:         AXI_BV_S14_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 6 in Boot Mode
`define AXI_BV_S14_BY_M6 0


// Name:         AXI_BV_S14_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 7 in Boot Mode
`define AXI_BV_S14_BY_M7 0


// Name:         AXI_BV_S14_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 8 in Boot Mode
`define AXI_BV_S14_BY_M8 0


// Name:         AXI_BV_S14_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 9 in Boot Mode
`define AXI_BV_S14_BY_M9 0


// Name:         AXI_BV_S14_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 10 in Boot Mode
`define AXI_BV_S14_BY_M10 0


// Name:         AXI_BV_S14_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 11 in Boot Mode
`define AXI_BV_S14_BY_M11 0


// Name:         AXI_BV_S14_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 12 in Boot Mode
`define AXI_BV_S14_BY_M12 0


// Name:         AXI_BV_S14_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 13 in Boot Mode
`define AXI_BV_S14_BY_M13 0


// Name:         AXI_BV_S14_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 14 in Boot Mode
`define AXI_BV_S14_BY_M14 0


// Name:         AXI_BV_S14_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 15 in Boot Mode
`define AXI_BV_S14_BY_M15 0


// Name:         AXI_BV_S14_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 14) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 14 is visible by Master 16 in Boot Mode
`define AXI_BV_S14_BY_M16 0


// Name:         AXI_BV_S15_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 1 in Boot Mode
`define AXI_BV_S15_BY_M1 0


// Name:         AXI_BV_S15_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 2 in Boot Mode
`define AXI_BV_S15_BY_M2 0


// Name:         AXI_BV_S15_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 3 in Boot Mode
`define AXI_BV_S15_BY_M3 0


// Name:         AXI_BV_S15_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 4 in Boot Mode
`define AXI_BV_S15_BY_M4 0


// Name:         AXI_BV_S15_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 5 in Boot Mode
`define AXI_BV_S15_BY_M5 0


// Name:         AXI_BV_S15_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 6 in Boot Mode
`define AXI_BV_S15_BY_M6 0


// Name:         AXI_BV_S15_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 7 in Boot Mode
`define AXI_BV_S15_BY_M7 0


// Name:         AXI_BV_S15_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 8 in Boot Mode
`define AXI_BV_S15_BY_M8 0


// Name:         AXI_BV_S15_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 9 in Boot Mode
`define AXI_BV_S15_BY_M9 0


// Name:         AXI_BV_S15_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 10 in Boot Mode
`define AXI_BV_S15_BY_M10 0


// Name:         AXI_BV_S15_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 11 in Boot Mode
`define AXI_BV_S15_BY_M11 0


// Name:         AXI_BV_S15_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 12 in Boot Mode
`define AXI_BV_S15_BY_M12 0


// Name:         AXI_BV_S15_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 13 in Boot Mode
`define AXI_BV_S15_BY_M13 0


// Name:         AXI_BV_S15_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 14 in Boot Mode
`define AXI_BV_S15_BY_M14 0


// Name:         AXI_BV_S15_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 15 in Boot Mode
`define AXI_BV_S15_BY_M15 0


// Name:         AXI_BV_S15_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 15) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 15 is visible by Master 16 in Boot Mode
`define AXI_BV_S15_BY_M16 0


// Name:         AXI_BV_S16_BY_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 1) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 1 in Boot Mode
`define AXI_BV_S16_BY_M1 0


// Name:         AXI_BV_S16_BY_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 2) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 2 in Boot Mode
`define AXI_BV_S16_BY_M2 0


// Name:         AXI_BV_S16_BY_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 3) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 3 in Boot Mode
`define AXI_BV_S16_BY_M3 0


// Name:         AXI_BV_S16_BY_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 4) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 4 in Boot Mode
`define AXI_BV_S16_BY_M4 0


// Name:         AXI_BV_S16_BY_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 5) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 5 in Boot Mode
`define AXI_BV_S16_BY_M5 0


// Name:         AXI_BV_S16_BY_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 6) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 6 in Boot Mode
`define AXI_BV_S16_BY_M6 0


// Name:         AXI_BV_S16_BY_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 7) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 7 in Boot Mode
`define AXI_BV_S16_BY_M7 0


// Name:         AXI_BV_S16_BY_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 8) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 8 in Boot Mode
`define AXI_BV_S16_BY_M8 0


// Name:         AXI_BV_S16_BY_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 9) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 9 in Boot Mode
`define AXI_BV_S16_BY_M9 0


// Name:         AXI_BV_S16_BY_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 10) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 10 in Boot Mode
`define AXI_BV_S16_BY_M10 0


// Name:         AXI_BV_S16_BY_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 11) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 11 in Boot Mode
`define AXI_BV_S16_BY_M11 0


// Name:         AXI_BV_S16_BY_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 12) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 12 in Boot Mode
`define AXI_BV_S16_BY_M12 0


// Name:         AXI_BV_S16_BY_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 13) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 13 in Boot Mode
`define AXI_BV_S16_BY_M13 0


// Name:         AXI_BV_S16_BY_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 14) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 14 in Boot Mode
`define AXI_BV_S16_BY_M14 0


// Name:         AXI_BV_S16_BY_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 15) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 15 in Boot Mode
`define AXI_BV_S16_BY_M15 0


// Name:         AXI_BV_S16_BY_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      ((AXI_NUM_SLAVES >= 16) && (AXI_NUM_MASTERS >= 16) && (AXI_REMAP_EN 
//               == 1))
// 
// This selects whether Slave 16 is visible by Master 16 in Boot Mode
`define AXI_BV_S16_BY_M16 0


//This shows whether Slave 1 is visible by any master in Boot Mode

`define AXI_BV_S1_BY_ANY_M 1


//This shows whether Slave 2 is visible by any master in Boot Mode

`define AXI_BV_S2_BY_ANY_M 0


//This shows whether Slave 3 is visible by any master in Boot Mode

`define AXI_BV_S3_BY_ANY_M 0


//This shows whether Slave 4 is visible by any master in Boot Mode

`define AXI_BV_S4_BY_ANY_M 0


//This shows whether Slave 5 is visible by any master in Boot Mode

`define AXI_BV_S5_BY_ANY_M 0


//This shows whether Slave 6 is visible by any master in Boot Mode

`define AXI_BV_S6_BY_ANY_M 0


//This shows whether Slave 7 is visible by any master in Boot Mode

`define AXI_BV_S7_BY_ANY_M 0


//This shows whether Slave 8 is visible by any master in Boot Mode

`define AXI_BV_S8_BY_ANY_M 0


//This shows whether Slave 9 is visible by any master in Boot Mode

`define AXI_BV_S9_BY_ANY_M 0


//This shows whether Slave 10 is visible by any master in Boot Mode

`define AXI_BV_S10_BY_ANY_M 0


//This shows whether Slave 11 is visible by any master in Boot Mode

`define AXI_BV_S11_BY_ANY_M 0


//This shows whether Slave 12 is visible by any master in Boot Mode

`define AXI_BV_S12_BY_ANY_M 0


//This shows whether Slave 13 is visible by any master in Boot Mode

`define AXI_BV_S13_BY_ANY_M 0


//This shows whether Slave 14 is visible by any master in Boot Mode

`define AXI_BV_S14_BY_ANY_M 0


//This shows whether Slave 15 is visible by any master in Boot Mode

`define AXI_BV_S15_BY_ANY_M 0


//This shows whether Slave 16 is visible by any master in Boot Mode

`define AXI_BV_S16_BY_ANY_M 0


//This selects whether Slave 0 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M1 1

`define AXI_V_S0_BY_M1




//This selects whether Slave 0 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M2 1

`define AXI_V_S0_BY_M2




//This selects whether Slave 0 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M3 0





//This selects whether Slave 0 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M4 0





//This selects whether Slave 0 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M5 0





//This selects whether Slave 0 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M6 0





//This selects whether Slave 0 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M7 0





//This selects whether Slave 0 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M8 0





//This selects whether Slave 0 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M9 0





//This selects whether Slave 0 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M10 0





//This selects whether Slave 0 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M11 0





//This selects whether Slave 0 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M12 0





//This selects whether Slave 0 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M13 0





//This selects whether Slave 0 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M14 0





//This selects whether Slave 0 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M15 0





//This selects whether Slave 0 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S0_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S0_BY_M16 0





//This selects whether Slave 1 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M1 1

`define AXI_V_S1_BY_M1




//This selects whether Slave 1 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M2 1

`define AXI_V_S1_BY_M2




//This selects whether Slave 1 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M3 0





//This selects whether Slave 1 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M4 0





//This selects whether Slave 1 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M5 0





//This selects whether Slave 1 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M6 0





//This selects whether Slave 1 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M7 0





//This selects whether Slave 1 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M8 0





//This selects whether Slave 1 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M9 0





//This selects whether Slave 1 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M10 0





//This selects whether Slave 1 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M11 0





//This selects whether Slave 1 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M12 0





//This selects whether Slave 1 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M13 0





//This selects whether Slave 1 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M14 0





//This selects whether Slave 1 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M15 0





//This selects whether Slave 1 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S1_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S1_BY_M16 0





//This selects whether Slave 2 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M1 0





//This selects whether Slave 2 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M2 0





//This selects whether Slave 2 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M3 0





//This selects whether Slave 2 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M4 0





//This selects whether Slave 2 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M5 0





//This selects whether Slave 2 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M6 0





//This selects whether Slave 2 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M7 0





//This selects whether Slave 2 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M8 0





//This selects whether Slave 2 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M9 0





//This selects whether Slave 2 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M10 0





//This selects whether Slave 2 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M11 0





//This selects whether Slave 2 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M12 0





//This selects whether Slave 2 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M13 0





//This selects whether Slave 2 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M14 0





//This selects whether Slave 2 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M15 0





//This selects whether Slave 2 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S2_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S2_BY_M16 0





//This selects whether Slave 3 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M1 0





//This selects whether Slave 3 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M2 0





//This selects whether Slave 3 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M3 0





//This selects whether Slave 3 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M4 0





//This selects whether Slave 3 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M5 0





//This selects whether Slave 3 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M6 0





//This selects whether Slave 3 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M7 0





//This selects whether Slave 3 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M8 0





//This selects whether Slave 3 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M9 0





//This selects whether Slave 3 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M10 0





//This selects whether Slave 3 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M11 0





//This selects whether Slave 3 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M12 0





//This selects whether Slave 3 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M13 0





//This selects whether Slave 3 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M14 0





//This selects whether Slave 3 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M15 0





//This selects whether Slave 3 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S3_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S3_BY_M16 0





//This selects whether Slave 4 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M1 0





//This selects whether Slave 4 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M2 0





//This selects whether Slave 4 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M3 0





//This selects whether Slave 4 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M4 0





//This selects whether Slave 4 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M5 0





//This selects whether Slave 4 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M6 0





//This selects whether Slave 4 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M7 0





//This selects whether Slave 4 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M8 0





//This selects whether Slave 4 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M9 0





//This selects whether Slave 4 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M10 0





//This selects whether Slave 4 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M11 0





//This selects whether Slave 4 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M12 0





//This selects whether Slave 4 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M13 0





//This selects whether Slave 4 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M14 0





//This selects whether Slave 4 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M15 0





//This selects whether Slave 4 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S4_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S4_BY_M16 0





//This selects whether Slave 5 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M1 0





//This selects whether Slave 5 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M2 0





//This selects whether Slave 5 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M3 0





//This selects whether Slave 5 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M4 0





//This selects whether Slave 5 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M5 0





//This selects whether Slave 5 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M6 0





//This selects whether Slave 5 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M7 0





//This selects whether Slave 5 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M8 0





//This selects whether Slave 5 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M9 0





//This selects whether Slave 5 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M10 0





//This selects whether Slave 5 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M11 0





//This selects whether Slave 5 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M12 0





//This selects whether Slave 5 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M13 0





//This selects whether Slave 5 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M14 0





//This selects whether Slave 5 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M15 0





//This selects whether Slave 5 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S5_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S5_BY_M16 0





//This selects whether Slave 6 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M1 0





//This selects whether Slave 6 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M2 0





//This selects whether Slave 6 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M3 0





//This selects whether Slave 6 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M4 0





//This selects whether Slave 6 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M5 0





//This selects whether Slave 6 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M6 0





//This selects whether Slave 6 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M7 0





//This selects whether Slave 6 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M8 0





//This selects whether Slave 6 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M9 0





//This selects whether Slave 6 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M10 0





//This selects whether Slave 6 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M11 0





//This selects whether Slave 6 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M12 0





//This selects whether Slave 6 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M13 0





//This selects whether Slave 6 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M14 0





//This selects whether Slave 6 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M15 0





//This selects whether Slave 6 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S6_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S6_BY_M16 0





//This selects whether Slave 7 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M1 0





//This selects whether Slave 7 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M2 0





//This selects whether Slave 7 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M3 0





//This selects whether Slave 7 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M4 0





//This selects whether Slave 7 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M5 0





//This selects whether Slave 7 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M6 0





//This selects whether Slave 7 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M7 0





//This selects whether Slave 7 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M8 0





//This selects whether Slave 7 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M9 0





//This selects whether Slave 7 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M10 0





//This selects whether Slave 7 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M11 0





//This selects whether Slave 7 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M12 0





//This selects whether Slave 7 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M13 0





//This selects whether Slave 7 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M14 0





//This selects whether Slave 7 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M15 0





//This selects whether Slave 7 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S7_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S7_BY_M16 0





//This selects whether Slave 8 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M1 0





//This selects whether Slave 8 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M2 0





//This selects whether Slave 8 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M3 0





//This selects whether Slave 8 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M4 0





//This selects whether Slave 8 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M5 0





//This selects whether Slave 8 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M6 0





//This selects whether Slave 8 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M7 0





//This selects whether Slave 8 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M8 0





//This selects whether Slave 8 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M9 0





//This selects whether Slave 8 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M10 0





//This selects whether Slave 8 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M11 0





//This selects whether Slave 8 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M12 0





//This selects whether Slave 8 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M13 0





//This selects whether Slave 8 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M14 0





//This selects whether Slave 8 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M15 0





//This selects whether Slave 8 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S8_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S8_BY_M16 0





//This selects whether Slave 9 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M1 0





//This selects whether Slave 9 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M2 0





//This selects whether Slave 9 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M3 0





//This selects whether Slave 9 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M4 0





//This selects whether Slave 9 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M5 0





//This selects whether Slave 9 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M6 0





//This selects whether Slave 9 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M7 0





//This selects whether Slave 9 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M8 0





//This selects whether Slave 9 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M9 0





//This selects whether Slave 9 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M10 0





//This selects whether Slave 9 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M11 0





//This selects whether Slave 9 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M12 0





//This selects whether Slave 9 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M13 0





//This selects whether Slave 9 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M14 0





//This selects whether Slave 9 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M15 0





//This selects whether Slave 9 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S9_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S9_BY_M16 0





//This selects whether Slave 10 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M1 0





//This selects whether Slave 10 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M2 0





//This selects whether Slave 10 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M3 0





//This selects whether Slave 10 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M4 0





//This selects whether Slave 10 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M5 0





//This selects whether Slave 10 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M6 0





//This selects whether Slave 10 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M7 0





//This selects whether Slave 10 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M8 0





//This selects whether Slave 10 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M9 0





//This selects whether Slave 10 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M10 0





//This selects whether Slave 10 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M11 0





//This selects whether Slave 10 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M12 0





//This selects whether Slave 10 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M13 0





//This selects whether Slave 10 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M14 0





//This selects whether Slave 10 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M15 0





//This selects whether Slave 10 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S10_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S10_BY_M16 0





//This selects whether Slave 11 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M1 0





//This selects whether Slave 11 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M2 0





//This selects whether Slave 11 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M3 0





//This selects whether Slave 11 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M4 0





//This selects whether Slave 11 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M5 0





//This selects whether Slave 11 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M6 0





//This selects whether Slave 11 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M7 0





//This selects whether Slave 11 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M8 0





//This selects whether Slave 11 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M9 0





//This selects whether Slave 11 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M10 0





//This selects whether Slave 11 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M11 0





//This selects whether Slave 11 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M12 0





//This selects whether Slave 11 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M13 0





//This selects whether Slave 11 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M14 0





//This selects whether Slave 11 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M15 0





//This selects whether Slave 11 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S11_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S11_BY_M16 0





//This selects whether Slave 12 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M1 0





//This selects whether Slave 12 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M2 0





//This selects whether Slave 12 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M3 0





//This selects whether Slave 12 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M4 0





//This selects whether Slave 12 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M5 0





//This selects whether Slave 12 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M6 0





//This selects whether Slave 12 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M7 0





//This selects whether Slave 12 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M8 0





//This selects whether Slave 12 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M9 0





//This selects whether Slave 12 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M10 0





//This selects whether Slave 12 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M11 0





//This selects whether Slave 12 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M12 0





//This selects whether Slave 12 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M13 0





//This selects whether Slave 12 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M14 0





//This selects whether Slave 12 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M15 0





//This selects whether Slave 12 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S12_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S12_BY_M16 0





//This selects whether Slave 13 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M1 0





//This selects whether Slave 13 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M2 0





//This selects whether Slave 13 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M3 0





//This selects whether Slave 13 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M4 0





//This selects whether Slave 13 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M5 0





//This selects whether Slave 13 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M6 0





//This selects whether Slave 13 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M7 0





//This selects whether Slave 13 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M8 0





//This selects whether Slave 13 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M9 0





//This selects whether Slave 13 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M10 0





//This selects whether Slave 13 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M11 0





//This selects whether Slave 13 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M12 0





//This selects whether Slave 13 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M13 0





//This selects whether Slave 13 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M14 0





//This selects whether Slave 13 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M15 0





//This selects whether Slave 13 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S13_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S13_BY_M16 0





//This selects whether Slave 14 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M1 0





//This selects whether Slave 14 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M2 0





//This selects whether Slave 14 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M3 0





//This selects whether Slave 14 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M4 0





//This selects whether Slave 14 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M5 0





//This selects whether Slave 14 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M6 0





//This selects whether Slave 14 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M7 0





//This selects whether Slave 14 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M8 0





//This selects whether Slave 14 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M9 0





//This selects whether Slave 14 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M10 0





//This selects whether Slave 14 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M11 0





//This selects whether Slave 14 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M12 0





//This selects whether Slave 14 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M13 0





//This selects whether Slave 14 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M14 0





//This selects whether Slave 14 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M15 0





//This selects whether Slave 14 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S14_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S14_BY_M16 0





//This selects whether Slave 15 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M1 0





//This selects whether Slave 15 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M2 0





//This selects whether Slave 15 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M3 0





//This selects whether Slave 15 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M4 0





//This selects whether Slave 15 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M5 0





//This selects whether Slave 15 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M6 0





//This selects whether Slave 15 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M7 0





//This selects whether Slave 15 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M8 0





//This selects whether Slave 15 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M9 0





//This selects whether Slave 15 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M10 0





//This selects whether Slave 15 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M11 0





//This selects whether Slave 15 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M12 0





//This selects whether Slave 15 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M13 0





//This selects whether Slave 15 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M14 0





//This selects whether Slave 15 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M15 0





//This selects whether Slave 15 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S15_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S15_BY_M16 0





//This selects whether Slave 16 is visible by Master 1 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M1 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M1 0





//This selects whether Slave 16 is visible by Master 2 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M2 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M2 0





//This selects whether Slave 16 is visible by Master 3 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M3 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M3 0





//This selects whether Slave 16 is visible by Master 4 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M4 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M4 0





//This selects whether Slave 16 is visible by Master 5 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M5 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M5 0





//This selects whether Slave 16 is visible by Master 6 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M6 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M6 0





//This selects whether Slave 16 is visible by Master 7 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M7 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M7 0





//This selects whether Slave 16 is visible by Master 8 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M8 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M8 0





//This selects whether Slave 16 is visible by Master 9 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M9 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M9 0





//This selects whether Slave 16 is visible by Master 10 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M10 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M10 0





//This selects whether Slave 16 is visible by Master 11 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M11 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M11 0





//This selects whether Slave 16 is visible by Master 12 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M12 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M12 0





//This selects whether Slave 16 is visible by Master 13 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M13 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M13 0





//This selects whether Slave 16 is visible by Master 14 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M14 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M14 0





//This selects whether Slave 16 is visible by Master 15 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M15 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M15 0





//This selects whether Slave 16 is visible by Master 16 in Either Address Mode,
//If the Boot Mode is not selected then this matches the AXI_NV_S16_BY_M16 parameter.
//For slaves greater than the number of slaves this is 0.
//For masters greater than the number of masters this is 0.

`define AXI_VV_S16_BY_M16 0





//This is the number of Master that have access to Slave 1

`define AXI_NMV_S1 2

//This is the number of Master that have access to Slave 1
`define AXI_LOG2_NMV_S1 1


`define AXI_LOG2_NMP1V_S1 2

//This is the number of Master that have access to Slave 2

`define AXI_NMV_S2 1

//This is the number of Master that have access to Slave 2
`define AXI_LOG2_NMV_S2 1


`define AXI_LOG2_NMP1V_S2 1

//This is the number of Master that have access to Slave 3

`define AXI_NMV_S3 1

//This is the number of Master that have access to Slave 3
`define AXI_LOG2_NMV_S3 1


`define AXI_LOG2_NMP1V_S3 1

//This is the number of Master that have access to Slave 4

`define AXI_NMV_S4 1

//This is the number of Master that have access to Slave 4
`define AXI_LOG2_NMV_S4 1


`define AXI_LOG2_NMP1V_S4 1

//This is the number of Master that have access to Slave 5

`define AXI_NMV_S5 1

//This is the number of Master that have access to Slave 5
`define AXI_LOG2_NMV_S5 1


`define AXI_LOG2_NMP1V_S5 1

//This is the number of Master that have access to Slave 6

`define AXI_NMV_S6 1

//This is the number of Master that have access to Slave 6
`define AXI_LOG2_NMV_S6 1


`define AXI_LOG2_NMP1V_S6 1

//This is the number of Master that have access to Slave 7

`define AXI_NMV_S7 1

//This is the number of Master that have access to Slave 7
`define AXI_LOG2_NMV_S7 1


`define AXI_LOG2_NMP1V_S7 1

//This is the number of Master that have access to Slave 8

`define AXI_NMV_S8 1

//This is the number of Master that have access to Slave 8
`define AXI_LOG2_NMV_S8 1


`define AXI_LOG2_NMP1V_S8 1

//This is the number of Master that have access to Slave 9

`define AXI_NMV_S9 1

//This is the number of Master that have access to Slave 9
`define AXI_LOG2_NMV_S9 1


`define AXI_LOG2_NMP1V_S9 1

//This is the number of Master that have access to Slave 10

`define AXI_NMV_S10 1

//This is the number of Master that have access to Slave 10
`define AXI_LOG2_NMV_S10 1


`define AXI_LOG2_NMP1V_S10 1

//This is the number of Master that have access to Slave 11

`define AXI_NMV_S11 1

//This is the number of Master that have access to Slave 11
`define AXI_LOG2_NMV_S11 1


`define AXI_LOG2_NMP1V_S11 1

//This is the number of Master that have access to Slave 12

`define AXI_NMV_S12 1

//This is the number of Master that have access to Slave 12
`define AXI_LOG2_NMV_S12 1


`define AXI_LOG2_NMP1V_S12 1

//This is the number of Master that have access to Slave 13

`define AXI_NMV_S13 1

//This is the number of Master that have access to Slave 13
`define AXI_LOG2_NMV_S13 1


`define AXI_LOG2_NMP1V_S13 1

//This is the number of Master that have access to Slave 14

`define AXI_NMV_S14 1

//This is the number of Master that have access to Slave 14
`define AXI_LOG2_NMV_S14 1


`define AXI_LOG2_NMP1V_S14 1

//This is the number of Master that have access to Slave 15

`define AXI_NMV_S15 1

//This is the number of Master that have access to Slave 15
`define AXI_LOG2_NMV_S15 1


`define AXI_LOG2_NMP1V_S15 1

//This is the number of Master that have access to Slave 16

`define AXI_NMV_S16 1

//This is the number of Master that have access to Slave 16
`define AXI_LOG2_NMV_S16 1


`define AXI_LOG2_NMP1V_S16 1

//This is the number of Slave that are visible by Master 1

`define AXI_NSV_M1 1

//This is the number of Slave that are visible by Master 1
`define AXI_LOG2_NSV_M1 1



//This is the number of Slave that are visible by Master 2

`define AXI_NSV_M2 1

//This is the number of Slave that are visible by Master 2
`define AXI_LOG2_NSV_M2 1



//This is the number of Slave that are visible by Master 3

`define AXI_NSV_M3 1

//This is the number of Slave that are visible by Master 3
`define AXI_LOG2_NSV_M3 1



//This is the number of Slave that are visible by Master 4

`define AXI_NSV_M4 1

//This is the number of Slave that are visible by Master 4
`define AXI_LOG2_NSV_M4 1



//This is the number of Slave that are visible by Master 5

`define AXI_NSV_M5 1

//This is the number of Slave that are visible by Master 5
`define AXI_LOG2_NSV_M5 1



//This is the number of Slave that are visible by Master 6

`define AXI_NSV_M6 1

//This is the number of Slave that are visible by Master 6
`define AXI_LOG2_NSV_M6 1



//This is the number of Slave that are visible by Master 7

`define AXI_NSV_M7 1

//This is the number of Slave that are visible by Master 7
`define AXI_LOG2_NSV_M7 1



//This is the number of Slave that are visible by Master 8

`define AXI_NSV_M8 1

//This is the number of Slave that are visible by Master 8
`define AXI_LOG2_NSV_M8 1



//This is the number of Slave that are visible by Master 9

`define AXI_NSV_M9 1

//This is the number of Slave that are visible by Master 9
`define AXI_LOG2_NSV_M9 1



//This is the number of Slave that are visible by Master 10

`define AXI_NSV_M10 1

//This is the number of Slave that are visible by Master 10
`define AXI_LOG2_NSV_M10 1



//This is the number of Slave that are visible by Master 11

`define AXI_NSV_M11 1

//This is the number of Slave that are visible by Master 11
`define AXI_LOG2_NSV_M11 1



//This is the number of Slave that are visible by Master 12

`define AXI_NSV_M12 1

//This is the number of Slave that are visible by Master 12
`define AXI_LOG2_NSV_M12 1



//This is the number of Slave that are visible by Master 13

`define AXI_NSV_M13 1

//This is the number of Slave that are visible by Master 13
`define AXI_LOG2_NSV_M13 1



//This is the number of Slave that are visible by Master 14

`define AXI_NSV_M14 1

//This is the number of Slave that are visible by Master 14
`define AXI_LOG2_NSV_M14 1



//This is the number of Slave that are visible by Master 15

`define AXI_NSV_M15 1

//This is the number of Slave that are visible by Master 15
`define AXI_LOG2_NSV_M15 1



//This is the number of Slave that are visible by Master 16

`define AXI_NSV_M16 1

//This is the number of Slave that are visible by Master 16
`define AXI_LOG2_NSV_M16 1



//This is the number of masters that are visible to slave 1
//in normal address mode.

`define AXI_NNMV_S1 2

//This is the number of masters that are visible to slave 1
//in boot address mode.

`define AXI_BNMV_S1 2


//This is the number of masters that are visible to slave 2
//in normal address mode.

`define AXI_NNMV_S2 0

//This is the number of masters that are visible to slave 2
//in boot address mode.

`define AXI_BNMV_S2 0


//This is the number of masters that are visible to slave 3
//in normal address mode.

`define AXI_NNMV_S3 0

//This is the number of masters that are visible to slave 3
//in boot address mode.

`define AXI_BNMV_S3 0


//This is the number of masters that are visible to slave 4
//in normal address mode.

`define AXI_NNMV_S4 0

//This is the number of masters that are visible to slave 4
//in boot address mode.

`define AXI_BNMV_S4 0


//This is the number of masters that are visible to slave 5
//in normal address mode.

`define AXI_NNMV_S5 0

//This is the number of masters that are visible to slave 5
//in boot address mode.

`define AXI_BNMV_S5 0


//This is the number of masters that are visible to slave 6
//in normal address mode.

`define AXI_NNMV_S6 0

//This is the number of masters that are visible to slave 6
//in boot address mode.

`define AXI_BNMV_S6 0


//This is the number of masters that are visible to slave 7
//in normal address mode.

`define AXI_NNMV_S7 0

//This is the number of masters that are visible to slave 7
//in boot address mode.

`define AXI_BNMV_S7 0


//This is the number of masters that are visible to slave 8
//in normal address mode.

`define AXI_NNMV_S8 0

//This is the number of masters that are visible to slave 8
//in boot address mode.

`define AXI_BNMV_S8 0


//This is the number of masters that are visible to slave 9
//in normal address mode.

`define AXI_NNMV_S9 0

//This is the number of masters that are visible to slave 9
//in boot address mode.

`define AXI_BNMV_S9 0


//This is the number of masters that are visible to slave 10
//in normal address mode.

`define AXI_NNMV_S10 0

//This is the number of masters that are visible to slave 10
//in boot address mode.

`define AXI_BNMV_S10 0


//This is the number of masters that are visible to slave 11
//in normal address mode.

`define AXI_NNMV_S11 0

//This is the number of masters that are visible to slave 11
//in boot address mode.

`define AXI_BNMV_S11 0


//This is the number of masters that are visible to slave 12
//in normal address mode.

`define AXI_NNMV_S12 0

//This is the number of masters that are visible to slave 12
//in boot address mode.

`define AXI_BNMV_S12 0


//This is the number of masters that are visible to slave 13
//in normal address mode.

`define AXI_NNMV_S13 0

//This is the number of masters that are visible to slave 13
//in boot address mode.

`define AXI_BNMV_S13 0


//This is the number of masters that are visible to slave 14
//in normal address mode.

`define AXI_NNMV_S14 0

//This is the number of masters that are visible to slave 14
//in boot address mode.

`define AXI_BNMV_S14 0


//This is the number of masters that are visible to slave 15
//in normal address mode.

`define AXI_NNMV_S15 0

//This is the number of masters that are visible to slave 15
//in boot address mode.

`define AXI_BNMV_S15 0


//This is the number of masters that are visible to slave 16
//in normal address mode.

`define AXI_NNMV_S16 0

//This is the number of masters that are visible to slave 16
//in boot address mode.

`define AXI_BNMV_S16 0


//This is the number of Slaves (plus 1) that are visible by Master 1
//This includes the default slave.

`define AXI_NSP1V_M1 2

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 1
//This includes the default slave.
`define AXI_LOG2_NSP1V_M1 1

`define AXI_LOG2_NSP2V_M1 2



//This is the number of Slaves (plus 1) that are visible by Master 2
//This includes the default slave.

`define AXI_NSP1V_M2 2

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 2
//This includes the default slave.
`define AXI_LOG2_NSP1V_M2 1

`define AXI_LOG2_NSP2V_M2 2



//This is the number of Slaves (plus 1) that are visible by Master 3
//This includes the default slave.

`define AXI_NSP1V_M3 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 3
//This includes the default slave.
`define AXI_LOG2_NSP1V_M3 1

`define AXI_LOG2_NSP2V_M3 2



//This is the number of Slaves (plus 1) that are visible by Master 4
//This includes the default slave.

`define AXI_NSP1V_M4 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 4
//This includes the default slave.
`define AXI_LOG2_NSP1V_M4 1

`define AXI_LOG2_NSP2V_M4 2



//This is the number of Slaves (plus 1) that are visible by Master 5
//This includes the default slave.

`define AXI_NSP1V_M5 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 5
//This includes the default slave.
`define AXI_LOG2_NSP1V_M5 1

`define AXI_LOG2_NSP2V_M5 2



//This is the number of Slaves (plus 1) that are visible by Master 6
//This includes the default slave.

`define AXI_NSP1V_M6 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 6
//This includes the default slave.
`define AXI_LOG2_NSP1V_M6 1

`define AXI_LOG2_NSP2V_M6 2



//This is the number of Slaves (plus 1) that are visible by Master 7
//This includes the default slave.

`define AXI_NSP1V_M7 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 7
//This includes the default slave.
`define AXI_LOG2_NSP1V_M7 1

`define AXI_LOG2_NSP2V_M7 2



//This is the number of Slaves (plus 1) that are visible by Master 8
//This includes the default slave.

`define AXI_NSP1V_M8 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 8
//This includes the default slave.
`define AXI_LOG2_NSP1V_M8 1

`define AXI_LOG2_NSP2V_M8 2



//This is the number of Slaves (plus 1) that are visible by Master 9
//This includes the default slave.

`define AXI_NSP1V_M9 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 9
//This includes the default slave.
`define AXI_LOG2_NSP1V_M9 1

`define AXI_LOG2_NSP2V_M9 2



//This is the number of Slaves (plus 1) that are visible by Master 10
//This includes the default slave.

`define AXI_NSP1V_M10 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 10
//This includes the default slave.
`define AXI_LOG2_NSP1V_M10 1

`define AXI_LOG2_NSP2V_M10 2



//This is the number of Slaves (plus 1) that are visible by Master 11
//This includes the default slave.

`define AXI_NSP1V_M11 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 11
//This includes the default slave.
`define AXI_LOG2_NSP1V_M11 1

`define AXI_LOG2_NSP2V_M11 2



//This is the number of Slaves (plus 1) that are visible by Master 12
//This includes the default slave.

`define AXI_NSP1V_M12 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 12
//This includes the default slave.
`define AXI_LOG2_NSP1V_M12 1

`define AXI_LOG2_NSP2V_M12 2



//This is the number of Slaves (plus 1) that are visible by Master 13
//This includes the default slave.

`define AXI_NSP1V_M13 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 13
//This includes the default slave.
`define AXI_LOG2_NSP1V_M13 1

`define AXI_LOG2_NSP2V_M13 2



//This is the number of Slaves (plus 1) that are visible by Master 14
//This includes the default slave.

`define AXI_NSP1V_M14 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 14
//This includes the default slave.
`define AXI_LOG2_NSP1V_M14 1

`define AXI_LOG2_NSP2V_M14 2



//This is the number of Slaves (plus 1) that are visible by Master 15
//This includes the default slave.

`define AXI_NSP1V_M15 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 15
//This includes the default slave.
`define AXI_LOG2_NSP1V_M15 1

`define AXI_LOG2_NSP2V_M15 2



//This is the number of Slaves (plus 1) that are visible by Master 16
//This includes the default slave.

`define AXI_NSP1V_M16 1

//This is the log2 of the number of Slaves (plus 1) that are visible by Master 16
//This includes the default slave.
`define AXI_LOG2_NSP1V_M16 1

`define AXI_LOG2_NSP2V_M16 2



// Name:         AXI_ALL_AR_LAYER_SHARED
// Default:      false
// Values:       false (0), true (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_ALL_AR_LAYER_SHARED : 
//  Choose to make the read address channel shared to all master slave links by default. 
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1).
`define AXI_ALL_AR_LAYER_SHARED 0
      


// Name:         AXI_AR_LAYER_S0_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M1 0




// Name:         AXI_AR_LAYER_S0_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M2 0




// Name:         AXI_AR_LAYER_S0_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M3 0




// Name:         AXI_AR_LAYER_S0_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M4 0




// Name:         AXI_AR_LAYER_S0_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M5 0




// Name:         AXI_AR_LAYER_S0_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M6 0




// Name:         AXI_AR_LAYER_S0_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M7 0




// Name:         AXI_AR_LAYER_S0_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M8 0




// Name:         AXI_AR_LAYER_S0_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M9 0




// Name:         AXI_AR_LAYER_S0_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M10 0




// Name:         AXI_AR_LAYER_S0_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M11 0




// Name:         AXI_AR_LAYER_S0_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M12 0




// Name:         AXI_AR_LAYER_S0_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M13 0




// Name:         AXI_AR_LAYER_S0_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M14 0




// Name:         AXI_AR_LAYER_S0_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M15 0




// Name:         AXI_AR_LAYER_S0_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S0_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 0. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 0 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 0 read address channel will only have to compete with  
//                     other masters accessing slave 0 read address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 read address channel (if masters connect to 
//                     slave 0 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 0 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 0 read address 
//                     via a shared read address channel. This means that to access slave 0 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 0 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S0_M16 0



// Name:         AXI_ALL_AW_LAYER_SHARED
// Default:      false
// Values:       false (0), true (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_ALL_AW_LAYER_SHARED : 
//  Choose to make the write address channel shared to all master slave links by default. 
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1).
`define AXI_ALL_AW_LAYER_SHARED 0
      


// Name:         AXI_AW_LAYER_S0_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M1 0




// Name:         AXI_AW_LAYER_S0_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M2 0




// Name:         AXI_AW_LAYER_S0_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M3 0




// Name:         AXI_AW_LAYER_S0_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M4 0




// Name:         AXI_AW_LAYER_S0_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M5 0




// Name:         AXI_AW_LAYER_S0_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M6 0




// Name:         AXI_AW_LAYER_S0_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M7 0




// Name:         AXI_AW_LAYER_S0_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M8 0




// Name:         AXI_AW_LAYER_S0_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M9 0




// Name:         AXI_AW_LAYER_S0_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M10 0




// Name:         AXI_AW_LAYER_S0_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M11 0




// Name:         AXI_AW_LAYER_S0_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M12 0




// Name:         AXI_AW_LAYER_S0_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M13 0




// Name:         AXI_AW_LAYER_S0_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M14 0




// Name:         AXI_AW_LAYER_S0_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M15 0




// Name:         AXI_AW_LAYER_S0_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S0_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 0. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 0 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 0 write address channel will only have to compete with  
//                     other masters accessing slave 0 write address channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write address channel (if masters connect to 
//                     slave 0 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 0 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 0 write address 
//                     via a shared write address channel. This means that to access slave 0 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 0 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S0_M16 0



// Name:         AXI_ALL_W_LAYER_SHARED
// Default:      false
// Values:       false (0), true (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_ALL_W_LAYER_SHARED : 
//  Choose to make the write data channel shared to all master slave links by default. 
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1).
`define AXI_ALL_W_LAYER_SHARED 0
      


// Name:         AXI_W_LAYER_S0_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M1 0




// Name:         AXI_W_LAYER_S0_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M2 0




// Name:         AXI_W_LAYER_S0_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M3 0




// Name:         AXI_W_LAYER_S0_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M4 0




// Name:         AXI_W_LAYER_S0_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M5 0




// Name:         AXI_W_LAYER_S0_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M6 0




// Name:         AXI_W_LAYER_S0_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M7 0




// Name:         AXI_W_LAYER_S0_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M8 0




// Name:         AXI_W_LAYER_S0_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M9 0




// Name:         AXI_W_LAYER_S0_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M10 0




// Name:         AXI_W_LAYER_S0_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M11 0




// Name:         AXI_W_LAYER_S0_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M12 0




// Name:         AXI_W_LAYER_S0_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M13 0




// Name:         AXI_W_LAYER_S0_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M14 0




// Name:         AXI_W_LAYER_S0_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M15 0




// Name:         AXI_W_LAYER_S0_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S0_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 0. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 0 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 0 write data channel will only have to compete with  
//                     other masters accessing slave 0 write data channel via slave 
//                     0's dedicated layer, and with masters on the shared layer  
//                     accessing slave 0 write data channel (if masters connect to 
//                     slave 0 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 0 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 0 write data 
//                     via a shared write data channel. This means that to access slave 0 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 0 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S0_M16 0




// Name:         AXI_AR_LAYER_S1_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M1 0




// Name:         AXI_AR_LAYER_S1_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M2 0




// Name:         AXI_AR_LAYER_S1_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M3 0




// Name:         AXI_AR_LAYER_S1_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M4 0




// Name:         AXI_AR_LAYER_S1_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M5 0




// Name:         AXI_AR_LAYER_S1_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M6 0




// Name:         AXI_AR_LAYER_S1_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M7 0




// Name:         AXI_AR_LAYER_S1_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M8 0




// Name:         AXI_AR_LAYER_S1_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M9 0




// Name:         AXI_AR_LAYER_S1_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M10 0




// Name:         AXI_AR_LAYER_S1_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M11 0




// Name:         AXI_AR_LAYER_S1_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M12 0




// Name:         AXI_AR_LAYER_S1_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M13 0




// Name:         AXI_AR_LAYER_S1_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M14 0




// Name:         AXI_AR_LAYER_S1_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M15 0




// Name:         AXI_AR_LAYER_S1_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S1_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 1. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 1 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 1 read address channel will only have to compete with  
//                     other masters accessing slave 1 read address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 read address channel (if masters connect to 
//                     slave 1 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 1 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 1 read address 
//                     via a shared read address channel. This means that to access slave 1 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 1 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S1_M16 0




// Name:         AXI_AW_LAYER_S1_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M1 0




// Name:         AXI_AW_LAYER_S1_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M2 0




// Name:         AXI_AW_LAYER_S1_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M3 0




// Name:         AXI_AW_LAYER_S1_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M4 0




// Name:         AXI_AW_LAYER_S1_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M5 0




// Name:         AXI_AW_LAYER_S1_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M6 0




// Name:         AXI_AW_LAYER_S1_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M7 0




// Name:         AXI_AW_LAYER_S1_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M8 0




// Name:         AXI_AW_LAYER_S1_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M9 0




// Name:         AXI_AW_LAYER_S1_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M10 0




// Name:         AXI_AW_LAYER_S1_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M11 0




// Name:         AXI_AW_LAYER_S1_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M12 0




// Name:         AXI_AW_LAYER_S1_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M13 0




// Name:         AXI_AW_LAYER_S1_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M14 0




// Name:         AXI_AW_LAYER_S1_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M15 0




// Name:         AXI_AW_LAYER_S1_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S1_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 1. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 1 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 1 write address channel will only have to compete with  
//                     other masters accessing slave 1 write address channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write address channel (if masters connect to 
//                     slave 1 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 1 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 1 write address 
//                     via a shared write address channel. This means that to access slave 1 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 1 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S1_M16 0




// Name:         AXI_W_LAYER_S1_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M1 0




// Name:         AXI_W_LAYER_S1_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M2 0




// Name:         AXI_W_LAYER_S1_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M3 0




// Name:         AXI_W_LAYER_S1_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M4 0




// Name:         AXI_W_LAYER_S1_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M5 0




// Name:         AXI_W_LAYER_S1_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M6 0




// Name:         AXI_W_LAYER_S1_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M7 0




// Name:         AXI_W_LAYER_S1_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M8 0




// Name:         AXI_W_LAYER_S1_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M9 0




// Name:         AXI_W_LAYER_S1_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M10 0




// Name:         AXI_W_LAYER_S1_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M11 0




// Name:         AXI_W_LAYER_S1_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M12 0




// Name:         AXI_W_LAYER_S1_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M13 0




// Name:         AXI_W_LAYER_S1_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M14 0




// Name:         AXI_W_LAYER_S1_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M15 0




// Name:         AXI_W_LAYER_S1_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S1_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 1. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 1 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 1 write data channel will only have to compete with  
//                     other masters accessing slave 1 write data channel via slave 
//                     1's dedicated layer, and with masters on the shared layer  
//                     accessing slave 1 write data channel (if masters connect to 
//                     slave 1 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 1 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 1 write data 
//                     via a shared write data channel. This means that to access slave 1 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 1 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S1_M16 0




// Name:         AXI_AR_LAYER_S2_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M1 0




// Name:         AXI_AR_LAYER_S2_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M2 0




// Name:         AXI_AR_LAYER_S2_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M3 0




// Name:         AXI_AR_LAYER_S2_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M4 0




// Name:         AXI_AR_LAYER_S2_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M5 0




// Name:         AXI_AR_LAYER_S2_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M6 0




// Name:         AXI_AR_LAYER_S2_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M7 0




// Name:         AXI_AR_LAYER_S2_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M8 0




// Name:         AXI_AR_LAYER_S2_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M9 0




// Name:         AXI_AR_LAYER_S2_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M10 0




// Name:         AXI_AR_LAYER_S2_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M11 0




// Name:         AXI_AR_LAYER_S2_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M12 0




// Name:         AXI_AR_LAYER_S2_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M13 0




// Name:         AXI_AR_LAYER_S2_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M14 0




// Name:         AXI_AR_LAYER_S2_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M15 0




// Name:         AXI_AR_LAYER_S2_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S2_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 2. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 2 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 2 read address channel will only have to compete with  
//                     other masters accessing slave 2 read address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 read address channel (if masters connect to 
//                     slave 2 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 2 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 2 read address 
//                     via a shared read address channel. This means that to access slave 2 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 2 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S2_M16 0




// Name:         AXI_AW_LAYER_S2_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M1 0




// Name:         AXI_AW_LAYER_S2_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M2 0




// Name:         AXI_AW_LAYER_S2_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M3 0




// Name:         AXI_AW_LAYER_S2_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M4 0




// Name:         AXI_AW_LAYER_S2_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M5 0




// Name:         AXI_AW_LAYER_S2_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M6 0




// Name:         AXI_AW_LAYER_S2_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M7 0




// Name:         AXI_AW_LAYER_S2_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M8 0




// Name:         AXI_AW_LAYER_S2_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M9 0




// Name:         AXI_AW_LAYER_S2_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M10 0




// Name:         AXI_AW_LAYER_S2_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M11 0




// Name:         AXI_AW_LAYER_S2_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M12 0




// Name:         AXI_AW_LAYER_S2_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M13 0




// Name:         AXI_AW_LAYER_S2_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M14 0




// Name:         AXI_AW_LAYER_S2_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M15 0




// Name:         AXI_AW_LAYER_S2_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S2_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 2. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 2 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 2 write address channel will only have to compete with  
//                     other masters accessing slave 2 write address channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write address channel (if masters connect to 
//                     slave 2 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 2 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 2 write address 
//                     via a shared write address channel. This means that to access slave 2 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 2 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S2_M16 0




// Name:         AXI_W_LAYER_S2_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M1 0




// Name:         AXI_W_LAYER_S2_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M2 0




// Name:         AXI_W_LAYER_S2_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M3 0




// Name:         AXI_W_LAYER_S2_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M4 0




// Name:         AXI_W_LAYER_S2_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M5 0




// Name:         AXI_W_LAYER_S2_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M6 0




// Name:         AXI_W_LAYER_S2_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M7 0




// Name:         AXI_W_LAYER_S2_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M8 0




// Name:         AXI_W_LAYER_S2_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M9 0




// Name:         AXI_W_LAYER_S2_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M10 0




// Name:         AXI_W_LAYER_S2_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M11 0




// Name:         AXI_W_LAYER_S2_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M12 0




// Name:         AXI_W_LAYER_S2_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M13 0




// Name:         AXI_W_LAYER_S2_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M14 0




// Name:         AXI_W_LAYER_S2_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M15 0




// Name:         AXI_W_LAYER_S2_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S2_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 2. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 2 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 2 write data channel will only have to compete with  
//                     other masters accessing slave 2 write data channel via slave 
//                     2's dedicated layer, and with masters on the shared layer  
//                     accessing slave 2 write data channel (if masters connect to 
//                     slave 2 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 2 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 2 write data 
//                     via a shared write data channel. This means that to access slave 2 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 2 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S2_M16 0




// Name:         AXI_AR_LAYER_S3_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M1 0




// Name:         AXI_AR_LAYER_S3_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M2 0




// Name:         AXI_AR_LAYER_S3_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M3 0




// Name:         AXI_AR_LAYER_S3_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M4 0




// Name:         AXI_AR_LAYER_S3_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M5 0




// Name:         AXI_AR_LAYER_S3_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M6 0




// Name:         AXI_AR_LAYER_S3_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M7 0




// Name:         AXI_AR_LAYER_S3_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M8 0




// Name:         AXI_AR_LAYER_S3_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M9 0




// Name:         AXI_AR_LAYER_S3_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M10 0




// Name:         AXI_AR_LAYER_S3_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M11 0




// Name:         AXI_AR_LAYER_S3_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M12 0




// Name:         AXI_AR_LAYER_S3_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M13 0




// Name:         AXI_AR_LAYER_S3_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M14 0




// Name:         AXI_AR_LAYER_S3_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M15 0




// Name:         AXI_AR_LAYER_S3_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S3_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 3. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 3 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 3 read address channel will only have to compete with  
//                     other masters accessing slave 3 read address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 read address channel (if masters connect to 
//                     slave 3 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 3 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 3 read address 
//                     via a shared read address channel. This means that to access slave 3 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 3 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S3_M16 0




// Name:         AXI_AW_LAYER_S3_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M1 0




// Name:         AXI_AW_LAYER_S3_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M2 0




// Name:         AXI_AW_LAYER_S3_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M3 0




// Name:         AXI_AW_LAYER_S3_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M4 0




// Name:         AXI_AW_LAYER_S3_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M5 0




// Name:         AXI_AW_LAYER_S3_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M6 0




// Name:         AXI_AW_LAYER_S3_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M7 0




// Name:         AXI_AW_LAYER_S3_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M8 0




// Name:         AXI_AW_LAYER_S3_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M9 0




// Name:         AXI_AW_LAYER_S3_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M10 0




// Name:         AXI_AW_LAYER_S3_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M11 0




// Name:         AXI_AW_LAYER_S3_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M12 0




// Name:         AXI_AW_LAYER_S3_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M13 0




// Name:         AXI_AW_LAYER_S3_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M14 0




// Name:         AXI_AW_LAYER_S3_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M15 0




// Name:         AXI_AW_LAYER_S3_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S3_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 3. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 3 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 3 write address channel will only have to compete with  
//                     other masters accessing slave 3 write address channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write address channel (if masters connect to 
//                     slave 3 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 3 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 3 write address 
//                     via a shared write address channel. This means that to access slave 3 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 3 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S3_M16 0




// Name:         AXI_W_LAYER_S3_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M1 0




// Name:         AXI_W_LAYER_S3_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M2 0




// Name:         AXI_W_LAYER_S3_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M3 0




// Name:         AXI_W_LAYER_S3_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M4 0




// Name:         AXI_W_LAYER_S3_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M5 0




// Name:         AXI_W_LAYER_S3_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M6 0




// Name:         AXI_W_LAYER_S3_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M7 0




// Name:         AXI_W_LAYER_S3_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M8 0




// Name:         AXI_W_LAYER_S3_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M9 0




// Name:         AXI_W_LAYER_S3_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M10 0




// Name:         AXI_W_LAYER_S3_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M11 0




// Name:         AXI_W_LAYER_S3_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M12 0




// Name:         AXI_W_LAYER_S3_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M13 0




// Name:         AXI_W_LAYER_S3_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M14 0




// Name:         AXI_W_LAYER_S3_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M15 0




// Name:         AXI_W_LAYER_S3_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S3_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 3. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 3 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 3 write data channel will only have to compete with  
//                     other masters accessing slave 3 write data channel via slave 
//                     3's dedicated layer, and with masters on the shared layer  
//                     accessing slave 3 write data channel (if masters connect to 
//                     slave 3 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 3 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 3 write data 
//                     via a shared write data channel. This means that to access slave 3 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 3 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S3_M16 0




// Name:         AXI_AR_LAYER_S4_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M1 0




// Name:         AXI_AR_LAYER_S4_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M2 0




// Name:         AXI_AR_LAYER_S4_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M3 0




// Name:         AXI_AR_LAYER_S4_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M4 0




// Name:         AXI_AR_LAYER_S4_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M5 0




// Name:         AXI_AR_LAYER_S4_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M6 0




// Name:         AXI_AR_LAYER_S4_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M7 0




// Name:         AXI_AR_LAYER_S4_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M8 0




// Name:         AXI_AR_LAYER_S4_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M9 0




// Name:         AXI_AR_LAYER_S4_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M10 0




// Name:         AXI_AR_LAYER_S4_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M11 0




// Name:         AXI_AR_LAYER_S4_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M12 0




// Name:         AXI_AR_LAYER_S4_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M13 0




// Name:         AXI_AR_LAYER_S4_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M14 0




// Name:         AXI_AR_LAYER_S4_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M15 0




// Name:         AXI_AR_LAYER_S4_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S4_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 4. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 4 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 4 read address channel will only have to compete with  
//                     other masters accessing slave 4 read address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 read address channel (if masters connect to 
//                     slave 4 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 4 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 4 read address 
//                     via a shared read address channel. This means that to access slave 4 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 4 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S4_M16 0




// Name:         AXI_AW_LAYER_S4_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M1 0




// Name:         AXI_AW_LAYER_S4_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M2 0




// Name:         AXI_AW_LAYER_S4_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M3 0




// Name:         AXI_AW_LAYER_S4_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M4 0




// Name:         AXI_AW_LAYER_S4_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M5 0




// Name:         AXI_AW_LAYER_S4_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M6 0




// Name:         AXI_AW_LAYER_S4_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M7 0




// Name:         AXI_AW_LAYER_S4_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M8 0




// Name:         AXI_AW_LAYER_S4_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M9 0




// Name:         AXI_AW_LAYER_S4_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M10 0




// Name:         AXI_AW_LAYER_S4_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M11 0




// Name:         AXI_AW_LAYER_S4_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M12 0




// Name:         AXI_AW_LAYER_S4_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M13 0




// Name:         AXI_AW_LAYER_S4_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M14 0




// Name:         AXI_AW_LAYER_S4_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M15 0




// Name:         AXI_AW_LAYER_S4_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S4_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 4. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 4 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 4 write address channel will only have to compete with  
//                     other masters accessing slave 4 write address channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write address channel (if masters connect to 
//                     slave 4 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 4 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 4 write address 
//                     via a shared write address channel. This means that to access slave 4 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 4 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S4_M16 0




// Name:         AXI_W_LAYER_S4_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M1 0




// Name:         AXI_W_LAYER_S4_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M2 0




// Name:         AXI_W_LAYER_S4_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M3 0




// Name:         AXI_W_LAYER_S4_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M4 0




// Name:         AXI_W_LAYER_S4_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M5 0




// Name:         AXI_W_LAYER_S4_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M6 0




// Name:         AXI_W_LAYER_S4_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M7 0




// Name:         AXI_W_LAYER_S4_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M8 0




// Name:         AXI_W_LAYER_S4_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M9 0




// Name:         AXI_W_LAYER_S4_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M10 0




// Name:         AXI_W_LAYER_S4_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M11 0




// Name:         AXI_W_LAYER_S4_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M12 0




// Name:         AXI_W_LAYER_S4_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M13 0




// Name:         AXI_W_LAYER_S4_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M14 0




// Name:         AXI_W_LAYER_S4_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M15 0




// Name:         AXI_W_LAYER_S4_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S4_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 4. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 4 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 4 write data channel will only have to compete with  
//                     other masters accessing slave 4 write data channel via slave 
//                     4's dedicated layer, and with masters on the shared layer  
//                     accessing slave 4 write data channel (if masters connect to 
//                     slave 4 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 4 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 4 write data 
//                     via a shared write data channel. This means that to access slave 4 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 4 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S4_M16 0




// Name:         AXI_AR_LAYER_S5_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M1 0




// Name:         AXI_AR_LAYER_S5_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M2 0




// Name:         AXI_AR_LAYER_S5_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M3 0




// Name:         AXI_AR_LAYER_S5_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M4 0




// Name:         AXI_AR_LAYER_S5_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M5 0




// Name:         AXI_AR_LAYER_S5_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M6 0




// Name:         AXI_AR_LAYER_S5_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M7 0




// Name:         AXI_AR_LAYER_S5_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M8 0




// Name:         AXI_AR_LAYER_S5_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M9 0




// Name:         AXI_AR_LAYER_S5_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M10 0




// Name:         AXI_AR_LAYER_S5_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M11 0




// Name:         AXI_AR_LAYER_S5_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M12 0




// Name:         AXI_AR_LAYER_S5_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M13 0




// Name:         AXI_AR_LAYER_S5_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M14 0




// Name:         AXI_AR_LAYER_S5_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M15 0




// Name:         AXI_AR_LAYER_S5_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S5_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 5. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 5 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 5 read address channel will only have to compete with  
//                     other masters accessing slave 5 read address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 read address channel (if masters connect to 
//                     slave 5 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 5 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 5 read address 
//                     via a shared read address channel. This means that to access slave 5 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 5 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S5_M16 0




// Name:         AXI_AW_LAYER_S5_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M1 0




// Name:         AXI_AW_LAYER_S5_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M2 0




// Name:         AXI_AW_LAYER_S5_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M3 0




// Name:         AXI_AW_LAYER_S5_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M4 0




// Name:         AXI_AW_LAYER_S5_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M5 0




// Name:         AXI_AW_LAYER_S5_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M6 0




// Name:         AXI_AW_LAYER_S5_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M7 0




// Name:         AXI_AW_LAYER_S5_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M8 0




// Name:         AXI_AW_LAYER_S5_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M9 0




// Name:         AXI_AW_LAYER_S5_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M10 0




// Name:         AXI_AW_LAYER_S5_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M11 0




// Name:         AXI_AW_LAYER_S5_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M12 0




// Name:         AXI_AW_LAYER_S5_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M13 0




// Name:         AXI_AW_LAYER_S5_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M14 0




// Name:         AXI_AW_LAYER_S5_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M15 0




// Name:         AXI_AW_LAYER_S5_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S5_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 5. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 5 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 5 write address channel will only have to compete with  
//                     other masters accessing slave 5 write address channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write address channel (if masters connect to 
//                     slave 5 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 5 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 5 write address 
//                     via a shared write address channel. This means that to access slave 5 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 5 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S5_M16 0




// Name:         AXI_W_LAYER_S5_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M1 0




// Name:         AXI_W_LAYER_S5_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M2 0




// Name:         AXI_W_LAYER_S5_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M3 0




// Name:         AXI_W_LAYER_S5_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M4 0




// Name:         AXI_W_LAYER_S5_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M5 0




// Name:         AXI_W_LAYER_S5_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M6 0




// Name:         AXI_W_LAYER_S5_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M7 0




// Name:         AXI_W_LAYER_S5_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M8 0




// Name:         AXI_W_LAYER_S5_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M9 0




// Name:         AXI_W_LAYER_S5_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M10 0




// Name:         AXI_W_LAYER_S5_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M11 0




// Name:         AXI_W_LAYER_S5_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M12 0




// Name:         AXI_W_LAYER_S5_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M13 0




// Name:         AXI_W_LAYER_S5_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M14 0




// Name:         AXI_W_LAYER_S5_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M15 0




// Name:         AXI_W_LAYER_S5_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S5_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 5. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 5 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 5 write data channel will only have to compete with  
//                     other masters accessing slave 5 write data channel via slave 
//                     5's dedicated layer, and with masters on the shared layer  
//                     accessing slave 5 write data channel (if masters connect to 
//                     slave 5 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 5 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 5 write data 
//                     via a shared write data channel. This means that to access slave 5 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 5 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S5_M16 0




// Name:         AXI_AR_LAYER_S6_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M1 0




// Name:         AXI_AR_LAYER_S6_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M2 0




// Name:         AXI_AR_LAYER_S6_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M3 0




// Name:         AXI_AR_LAYER_S6_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M4 0




// Name:         AXI_AR_LAYER_S6_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M5 0




// Name:         AXI_AR_LAYER_S6_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M6 0




// Name:         AXI_AR_LAYER_S6_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M7 0




// Name:         AXI_AR_LAYER_S6_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M8 0




// Name:         AXI_AR_LAYER_S6_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M9 0




// Name:         AXI_AR_LAYER_S6_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M10 0




// Name:         AXI_AR_LAYER_S6_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M11 0




// Name:         AXI_AR_LAYER_S6_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M12 0




// Name:         AXI_AR_LAYER_S6_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M13 0




// Name:         AXI_AR_LAYER_S6_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M14 0




// Name:         AXI_AR_LAYER_S6_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M15 0




// Name:         AXI_AR_LAYER_S6_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S6_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 6. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 6 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 6 read address channel will only have to compete with  
//                     other masters accessing slave 6 read address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 read address channel (if masters connect to 
//                     slave 6 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 6 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 6 read address 
//                     via a shared read address channel. This means that to access slave 6 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 6 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S6_M16 0




// Name:         AXI_AW_LAYER_S6_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M1 0




// Name:         AXI_AW_LAYER_S6_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M2 0




// Name:         AXI_AW_LAYER_S6_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M3 0




// Name:         AXI_AW_LAYER_S6_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M4 0




// Name:         AXI_AW_LAYER_S6_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M5 0




// Name:         AXI_AW_LAYER_S6_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M6 0




// Name:         AXI_AW_LAYER_S6_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M7 0




// Name:         AXI_AW_LAYER_S6_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M8 0




// Name:         AXI_AW_LAYER_S6_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M9 0




// Name:         AXI_AW_LAYER_S6_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M10 0




// Name:         AXI_AW_LAYER_S6_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M11 0




// Name:         AXI_AW_LAYER_S6_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M12 0




// Name:         AXI_AW_LAYER_S6_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M13 0




// Name:         AXI_AW_LAYER_S6_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M14 0




// Name:         AXI_AW_LAYER_S6_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M15 0




// Name:         AXI_AW_LAYER_S6_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S6_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 6. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 6 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 6 write address channel will only have to compete with  
//                     other masters accessing slave 6 write address channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write address channel (if masters connect to 
//                     slave 6 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 6 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 6 write address 
//                     via a shared write address channel. This means that to access slave 6 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 6 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S6_M16 0




// Name:         AXI_W_LAYER_S6_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M1 0




// Name:         AXI_W_LAYER_S6_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M2 0




// Name:         AXI_W_LAYER_S6_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M3 0




// Name:         AXI_W_LAYER_S6_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M4 0




// Name:         AXI_W_LAYER_S6_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M5 0




// Name:         AXI_W_LAYER_S6_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M6 0




// Name:         AXI_W_LAYER_S6_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M7 0




// Name:         AXI_W_LAYER_S6_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M8 0




// Name:         AXI_W_LAYER_S6_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M9 0




// Name:         AXI_W_LAYER_S6_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M10 0




// Name:         AXI_W_LAYER_S6_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M11 0




// Name:         AXI_W_LAYER_S6_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M12 0




// Name:         AXI_W_LAYER_S6_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M13 0




// Name:         AXI_W_LAYER_S6_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M14 0




// Name:         AXI_W_LAYER_S6_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M15 0




// Name:         AXI_W_LAYER_S6_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S6_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 6. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 6 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 6 write data channel will only have to compete with  
//                     other masters accessing slave 6 write data channel via slave 
//                     6's dedicated layer, and with masters on the shared layer  
//                     accessing slave 6 write data channel (if masters connect to 
//                     slave 6 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 6 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 6 write data 
//                     via a shared write data channel. This means that to access slave 6 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 6 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S6_M16 0




// Name:         AXI_AR_LAYER_S7_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M1 0




// Name:         AXI_AR_LAYER_S7_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M2 0




// Name:         AXI_AR_LAYER_S7_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M3 0




// Name:         AXI_AR_LAYER_S7_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M4 0




// Name:         AXI_AR_LAYER_S7_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M5 0




// Name:         AXI_AR_LAYER_S7_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M6 0




// Name:         AXI_AR_LAYER_S7_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M7 0




// Name:         AXI_AR_LAYER_S7_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M8 0




// Name:         AXI_AR_LAYER_S7_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M9 0




// Name:         AXI_AR_LAYER_S7_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M10 0




// Name:         AXI_AR_LAYER_S7_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M11 0




// Name:         AXI_AR_LAYER_S7_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M12 0




// Name:         AXI_AR_LAYER_S7_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M13 0




// Name:         AXI_AR_LAYER_S7_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M14 0




// Name:         AXI_AR_LAYER_S7_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M15 0




// Name:         AXI_AR_LAYER_S7_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S7_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 7. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 7 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 7 read address channel will only have to compete with  
//                     other masters accessing slave 7 read address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 read address channel (if masters connect to 
//                     slave 7 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 7 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 7 read address 
//                     via a shared read address channel. This means that to access slave 7 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 7 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S7_M16 0




// Name:         AXI_AW_LAYER_S7_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M1 0




// Name:         AXI_AW_LAYER_S7_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M2 0




// Name:         AXI_AW_LAYER_S7_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M3 0




// Name:         AXI_AW_LAYER_S7_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M4 0




// Name:         AXI_AW_LAYER_S7_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M5 0




// Name:         AXI_AW_LAYER_S7_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M6 0




// Name:         AXI_AW_LAYER_S7_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M7 0




// Name:         AXI_AW_LAYER_S7_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M8 0




// Name:         AXI_AW_LAYER_S7_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M9 0




// Name:         AXI_AW_LAYER_S7_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M10 0




// Name:         AXI_AW_LAYER_S7_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M11 0




// Name:         AXI_AW_LAYER_S7_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M12 0




// Name:         AXI_AW_LAYER_S7_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M13 0




// Name:         AXI_AW_LAYER_S7_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M14 0




// Name:         AXI_AW_LAYER_S7_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M15 0




// Name:         AXI_AW_LAYER_S7_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S7_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 7. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 7 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 7 write address channel will only have to compete with  
//                     other masters accessing slave 7 write address channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write address channel (if masters connect to 
//                     slave 7 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 7 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 7 write address 
//                     via a shared write address channel. This means that to access slave 7 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 7 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S7_M16 0




// Name:         AXI_W_LAYER_S7_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M1 0




// Name:         AXI_W_LAYER_S7_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M2 0




// Name:         AXI_W_LAYER_S7_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M3 0




// Name:         AXI_W_LAYER_S7_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M4 0




// Name:         AXI_W_LAYER_S7_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M5 0




// Name:         AXI_W_LAYER_S7_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M6 0




// Name:         AXI_W_LAYER_S7_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M7 0




// Name:         AXI_W_LAYER_S7_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M8 0




// Name:         AXI_W_LAYER_S7_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M9 0




// Name:         AXI_W_LAYER_S7_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M10 0




// Name:         AXI_W_LAYER_S7_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M11 0




// Name:         AXI_W_LAYER_S7_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M12 0




// Name:         AXI_W_LAYER_S7_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M13 0




// Name:         AXI_W_LAYER_S7_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M14 0




// Name:         AXI_W_LAYER_S7_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M15 0




// Name:         AXI_W_LAYER_S7_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S7_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 7. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 7 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 7 write data channel will only have to compete with  
//                     other masters accessing slave 7 write data channel via slave 
//                     7's dedicated layer, and with masters on the shared layer  
//                     accessing slave 7 write data channel (if masters connect to 
//                     slave 7 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 7 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 7 write data 
//                     via a shared write data channel. This means that to access slave 7 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 7 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S7_M16 0




// Name:         AXI_AR_LAYER_S8_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M1 0




// Name:         AXI_AR_LAYER_S8_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M2 0




// Name:         AXI_AR_LAYER_S8_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M3 0




// Name:         AXI_AR_LAYER_S8_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M4 0




// Name:         AXI_AR_LAYER_S8_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M5 0




// Name:         AXI_AR_LAYER_S8_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M6 0




// Name:         AXI_AR_LAYER_S8_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M7 0




// Name:         AXI_AR_LAYER_S8_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M8 0




// Name:         AXI_AR_LAYER_S8_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M9 0




// Name:         AXI_AR_LAYER_S8_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M10 0




// Name:         AXI_AR_LAYER_S8_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M11 0




// Name:         AXI_AR_LAYER_S8_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M12 0




// Name:         AXI_AR_LAYER_S8_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M13 0




// Name:         AXI_AR_LAYER_S8_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M14 0




// Name:         AXI_AR_LAYER_S8_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M15 0




// Name:         AXI_AR_LAYER_S8_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S8_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 8. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 8 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 8 read address channel will only have to compete with  
//                     other masters accessing slave 8 read address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 read address channel (if masters connect to 
//                     slave 8 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 8 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 8 read address 
//                     via a shared read address channel. This means that to access slave 8 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 8 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S8_M16 0




// Name:         AXI_AW_LAYER_S8_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M1 0




// Name:         AXI_AW_LAYER_S8_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M2 0




// Name:         AXI_AW_LAYER_S8_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M3 0




// Name:         AXI_AW_LAYER_S8_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M4 0




// Name:         AXI_AW_LAYER_S8_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M5 0




// Name:         AXI_AW_LAYER_S8_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M6 0




// Name:         AXI_AW_LAYER_S8_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M7 0




// Name:         AXI_AW_LAYER_S8_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M8 0




// Name:         AXI_AW_LAYER_S8_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M9 0




// Name:         AXI_AW_LAYER_S8_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M10 0




// Name:         AXI_AW_LAYER_S8_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M11 0




// Name:         AXI_AW_LAYER_S8_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M12 0




// Name:         AXI_AW_LAYER_S8_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M13 0




// Name:         AXI_AW_LAYER_S8_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M14 0




// Name:         AXI_AW_LAYER_S8_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M15 0




// Name:         AXI_AW_LAYER_S8_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S8_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 8. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 8 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 8 write address channel will only have to compete with  
//                     other masters accessing slave 8 write address channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write address channel (if masters connect to 
//                     slave 8 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 8 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 8 write address 
//                     via a shared write address channel. This means that to access slave 8 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 8 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S8_M16 0




// Name:         AXI_W_LAYER_S8_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M1 0




// Name:         AXI_W_LAYER_S8_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M2 0




// Name:         AXI_W_LAYER_S8_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M3 0




// Name:         AXI_W_LAYER_S8_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M4 0




// Name:         AXI_W_LAYER_S8_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M5 0




// Name:         AXI_W_LAYER_S8_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M6 0




// Name:         AXI_W_LAYER_S8_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M7 0




// Name:         AXI_W_LAYER_S8_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M8 0




// Name:         AXI_W_LAYER_S8_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M9 0




// Name:         AXI_W_LAYER_S8_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M10 0




// Name:         AXI_W_LAYER_S8_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M11 0




// Name:         AXI_W_LAYER_S8_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M12 0




// Name:         AXI_W_LAYER_S8_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M13 0




// Name:         AXI_W_LAYER_S8_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M14 0




// Name:         AXI_W_LAYER_S8_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M15 0




// Name:         AXI_W_LAYER_S8_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S8_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 8. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 8 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 8 write data channel will only have to compete with  
//                     other masters accessing slave 8 write data channel via slave 
//                     8's dedicated layer, and with masters on the shared layer  
//                     accessing slave 8 write data channel (if masters connect to 
//                     slave 8 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 8 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 8 write data 
//                     via a shared write data channel. This means that to access slave 8 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 8 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S8_M16 0




// Name:         AXI_AR_LAYER_S9_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M1 0




// Name:         AXI_AR_LAYER_S9_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M2 0




// Name:         AXI_AR_LAYER_S9_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M3 0




// Name:         AXI_AR_LAYER_S9_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M4 0




// Name:         AXI_AR_LAYER_S9_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M5 0




// Name:         AXI_AR_LAYER_S9_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M6 0




// Name:         AXI_AR_LAYER_S9_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M7 0




// Name:         AXI_AR_LAYER_S9_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M8 0




// Name:         AXI_AR_LAYER_S9_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M9 0




// Name:         AXI_AR_LAYER_S9_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M10 0




// Name:         AXI_AR_LAYER_S9_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M11 0




// Name:         AXI_AR_LAYER_S9_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M12 0




// Name:         AXI_AR_LAYER_S9_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M13 0




// Name:         AXI_AR_LAYER_S9_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M14 0




// Name:         AXI_AR_LAYER_S9_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M15 0




// Name:         AXI_AR_LAYER_S9_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S9_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 9. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 9 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 9 read address channel will only have to compete with  
//                     other masters accessing slave 9 read address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 read address channel (if masters connect to 
//                     slave 9 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 9 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 9 read address 
//                     via a shared read address channel. This means that to access slave 9 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 9 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S9_M16 0




// Name:         AXI_AW_LAYER_S9_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M1 0




// Name:         AXI_AW_LAYER_S9_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M2 0




// Name:         AXI_AW_LAYER_S9_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M3 0




// Name:         AXI_AW_LAYER_S9_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M4 0




// Name:         AXI_AW_LAYER_S9_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M5 0




// Name:         AXI_AW_LAYER_S9_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M6 0




// Name:         AXI_AW_LAYER_S9_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M7 0




// Name:         AXI_AW_LAYER_S9_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M8 0




// Name:         AXI_AW_LAYER_S9_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M9 0




// Name:         AXI_AW_LAYER_S9_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M10 0




// Name:         AXI_AW_LAYER_S9_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M11 0




// Name:         AXI_AW_LAYER_S9_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M12 0




// Name:         AXI_AW_LAYER_S9_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M13 0




// Name:         AXI_AW_LAYER_S9_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M14 0




// Name:         AXI_AW_LAYER_S9_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M15 0




// Name:         AXI_AW_LAYER_S9_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S9_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 9. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 9 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 9 write address channel will only have to compete with  
//                     other masters accessing slave 9 write address channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write address channel (if masters connect to 
//                     slave 9 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 9 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 9 write address 
//                     via a shared write address channel. This means that to access slave 9 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 9 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S9_M16 0




// Name:         AXI_W_LAYER_S9_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M1 0




// Name:         AXI_W_LAYER_S9_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M2 0




// Name:         AXI_W_LAYER_S9_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M3 0




// Name:         AXI_W_LAYER_S9_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M4 0




// Name:         AXI_W_LAYER_S9_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M5 0




// Name:         AXI_W_LAYER_S9_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M6 0




// Name:         AXI_W_LAYER_S9_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M7 0




// Name:         AXI_W_LAYER_S9_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M8 0




// Name:         AXI_W_LAYER_S9_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M9 0




// Name:         AXI_W_LAYER_S9_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M10 0




// Name:         AXI_W_LAYER_S9_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M11 0




// Name:         AXI_W_LAYER_S9_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M12 0




// Name:         AXI_W_LAYER_S9_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M13 0




// Name:         AXI_W_LAYER_S9_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M14 0




// Name:         AXI_W_LAYER_S9_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M15 0




// Name:         AXI_W_LAYER_S9_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S9_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 9. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 9 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 9 write data channel will only have to compete with  
//                     other masters accessing slave 9 write data channel via slave 
//                     9's dedicated layer, and with masters on the shared layer  
//                     accessing slave 9 write data channel (if masters connect to 
//                     slave 9 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 9 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 9 write data 
//                     via a shared write data channel. This means that to access slave 9 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 9 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S9_M16 0




// Name:         AXI_AR_LAYER_S10_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M1 0




// Name:         AXI_AR_LAYER_S10_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M2 0




// Name:         AXI_AR_LAYER_S10_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M3 0




// Name:         AXI_AR_LAYER_S10_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M4 0




// Name:         AXI_AR_LAYER_S10_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M5 0




// Name:         AXI_AR_LAYER_S10_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M6 0




// Name:         AXI_AR_LAYER_S10_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M7 0




// Name:         AXI_AR_LAYER_S10_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M8 0




// Name:         AXI_AR_LAYER_S10_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M9 0




// Name:         AXI_AR_LAYER_S10_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M10 0




// Name:         AXI_AR_LAYER_S10_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M11 0




// Name:         AXI_AR_LAYER_S10_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M12 0




// Name:         AXI_AR_LAYER_S10_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M13 0




// Name:         AXI_AR_LAYER_S10_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M14 0




// Name:         AXI_AR_LAYER_S10_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M15 0




// Name:         AXI_AR_LAYER_S10_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S10_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 10. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 10 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 10 read address channel will only have to compete with  
//                     other masters accessing slave 10 read address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 read address channel (if masters connect to 
//                     slave 10 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 10 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 10 read address 
//                     via a shared read address channel. This means that to access slave 10 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 10 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S10_M16 0




// Name:         AXI_AW_LAYER_S10_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M1 0




// Name:         AXI_AW_LAYER_S10_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M2 0




// Name:         AXI_AW_LAYER_S10_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M3 0




// Name:         AXI_AW_LAYER_S10_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M4 0




// Name:         AXI_AW_LAYER_S10_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M5 0




// Name:         AXI_AW_LAYER_S10_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M6 0




// Name:         AXI_AW_LAYER_S10_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M7 0




// Name:         AXI_AW_LAYER_S10_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M8 0




// Name:         AXI_AW_LAYER_S10_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M9 0




// Name:         AXI_AW_LAYER_S10_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M10 0




// Name:         AXI_AW_LAYER_S10_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M11 0




// Name:         AXI_AW_LAYER_S10_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M12 0




// Name:         AXI_AW_LAYER_S10_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M13 0




// Name:         AXI_AW_LAYER_S10_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M14 0




// Name:         AXI_AW_LAYER_S10_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M15 0




// Name:         AXI_AW_LAYER_S10_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S10_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 10. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 10 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 10 write address channel will only have to compete with  
//                     other masters accessing slave 10 write address channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write address channel (if masters connect to 
//                     slave 10 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 10 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 10 write address 
//                     via a shared write address channel. This means that to access slave 10 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 10 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S10_M16 0




// Name:         AXI_W_LAYER_S10_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M1 0




// Name:         AXI_W_LAYER_S10_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M2 0




// Name:         AXI_W_LAYER_S10_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M3 0




// Name:         AXI_W_LAYER_S10_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M4 0




// Name:         AXI_W_LAYER_S10_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M5 0




// Name:         AXI_W_LAYER_S10_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M6 0




// Name:         AXI_W_LAYER_S10_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M7 0




// Name:         AXI_W_LAYER_S10_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M8 0




// Name:         AXI_W_LAYER_S10_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M9 0




// Name:         AXI_W_LAYER_S10_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M10 0




// Name:         AXI_W_LAYER_S10_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M11 0




// Name:         AXI_W_LAYER_S10_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M12 0




// Name:         AXI_W_LAYER_S10_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M13 0




// Name:         AXI_W_LAYER_S10_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M14 0




// Name:         AXI_W_LAYER_S10_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M15 0




// Name:         AXI_W_LAYER_S10_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S10_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 10. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 10 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 10 write data channel will only have to compete with  
//                     other masters accessing slave 10 write data channel via slave 
//                     10's dedicated layer, and with masters on the shared layer  
//                     accessing slave 10 write data channel (if masters connect to 
//                     slave 10 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 10 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 10 write data 
//                     via a shared write data channel. This means that to access slave 10 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 10 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S10_M16 0




// Name:         AXI_AR_LAYER_S11_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M1 0




// Name:         AXI_AR_LAYER_S11_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M2 0




// Name:         AXI_AR_LAYER_S11_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M3 0




// Name:         AXI_AR_LAYER_S11_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M4 0




// Name:         AXI_AR_LAYER_S11_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M5 0




// Name:         AXI_AR_LAYER_S11_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M6 0




// Name:         AXI_AR_LAYER_S11_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M7 0




// Name:         AXI_AR_LAYER_S11_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M8 0




// Name:         AXI_AR_LAYER_S11_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M9 0




// Name:         AXI_AR_LAYER_S11_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M10 0




// Name:         AXI_AR_LAYER_S11_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M11 0




// Name:         AXI_AR_LAYER_S11_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M12 0




// Name:         AXI_AR_LAYER_S11_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M13 0




// Name:         AXI_AR_LAYER_S11_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M14 0




// Name:         AXI_AR_LAYER_S11_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M15 0




// Name:         AXI_AR_LAYER_S11_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S11_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 11. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 11 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 11 read address channel will only have to compete with  
//                     other masters accessing slave 11 read address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 read address channel (if masters connect to 
//                     slave 11 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 11 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 11 read address 
//                     via a shared read address channel. This means that to access slave 11 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 11 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S11_M16 0




// Name:         AXI_AW_LAYER_S11_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M1 0




// Name:         AXI_AW_LAYER_S11_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M2 0




// Name:         AXI_AW_LAYER_S11_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M3 0




// Name:         AXI_AW_LAYER_S11_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M4 0




// Name:         AXI_AW_LAYER_S11_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M5 0




// Name:         AXI_AW_LAYER_S11_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M6 0




// Name:         AXI_AW_LAYER_S11_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M7 0




// Name:         AXI_AW_LAYER_S11_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M8 0




// Name:         AXI_AW_LAYER_S11_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M9 0




// Name:         AXI_AW_LAYER_S11_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M10 0




// Name:         AXI_AW_LAYER_S11_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M11 0




// Name:         AXI_AW_LAYER_S11_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M12 0




// Name:         AXI_AW_LAYER_S11_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M13 0




// Name:         AXI_AW_LAYER_S11_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M14 0




// Name:         AXI_AW_LAYER_S11_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M15 0




// Name:         AXI_AW_LAYER_S11_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S11_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 11. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 11 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 11 write address channel will only have to compete with  
//                     other masters accessing slave 11 write address channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write address channel (if masters connect to 
//                     slave 11 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 11 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 11 write address 
//                     via a shared write address channel. This means that to access slave 11 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 11 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S11_M16 0




// Name:         AXI_W_LAYER_S11_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M1 0




// Name:         AXI_W_LAYER_S11_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M2 0




// Name:         AXI_W_LAYER_S11_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M3 0




// Name:         AXI_W_LAYER_S11_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M4 0




// Name:         AXI_W_LAYER_S11_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M5 0




// Name:         AXI_W_LAYER_S11_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M6 0




// Name:         AXI_W_LAYER_S11_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M7 0




// Name:         AXI_W_LAYER_S11_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M8 0




// Name:         AXI_W_LAYER_S11_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M9 0




// Name:         AXI_W_LAYER_S11_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M10 0




// Name:         AXI_W_LAYER_S11_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M11 0




// Name:         AXI_W_LAYER_S11_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M12 0




// Name:         AXI_W_LAYER_S11_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M13 0




// Name:         AXI_W_LAYER_S11_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M14 0




// Name:         AXI_W_LAYER_S11_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M15 0




// Name:         AXI_W_LAYER_S11_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S11_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 11. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 11 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 11 write data channel will only have to compete with  
//                     other masters accessing slave 11 write data channel via slave 
//                     11's dedicated layer, and with masters on the shared layer  
//                     accessing slave 11 write data channel (if masters connect to 
//                     slave 11 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 11 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 11 write data 
//                     via a shared write data channel. This means that to access slave 11 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 11 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S11_M16 0




// Name:         AXI_AR_LAYER_S12_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M1 0




// Name:         AXI_AR_LAYER_S12_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M2 0




// Name:         AXI_AR_LAYER_S12_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M3 0




// Name:         AXI_AR_LAYER_S12_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M4 0




// Name:         AXI_AR_LAYER_S12_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M5 0




// Name:         AXI_AR_LAYER_S12_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M6 0




// Name:         AXI_AR_LAYER_S12_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M7 0




// Name:         AXI_AR_LAYER_S12_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M8 0




// Name:         AXI_AR_LAYER_S12_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M9 0




// Name:         AXI_AR_LAYER_S12_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M10 0




// Name:         AXI_AR_LAYER_S12_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M11 0




// Name:         AXI_AR_LAYER_S12_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M12 0




// Name:         AXI_AR_LAYER_S12_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M13 0




// Name:         AXI_AR_LAYER_S12_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M14 0




// Name:         AXI_AR_LAYER_S12_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M15 0




// Name:         AXI_AR_LAYER_S12_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S12_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 12. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 12 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 12 read address channel will only have to compete with  
//                     other masters accessing slave 12 read address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 read address channel (if masters connect to 
//                     slave 12 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 12 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 12 read address 
//                     via a shared read address channel. This means that to access slave 12 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 12 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S12_M16 0




// Name:         AXI_AW_LAYER_S12_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M1 0




// Name:         AXI_AW_LAYER_S12_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M2 0




// Name:         AXI_AW_LAYER_S12_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M3 0




// Name:         AXI_AW_LAYER_S12_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M4 0




// Name:         AXI_AW_LAYER_S12_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M5 0




// Name:         AXI_AW_LAYER_S12_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M6 0




// Name:         AXI_AW_LAYER_S12_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M7 0




// Name:         AXI_AW_LAYER_S12_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M8 0




// Name:         AXI_AW_LAYER_S12_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M9 0




// Name:         AXI_AW_LAYER_S12_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M10 0




// Name:         AXI_AW_LAYER_S12_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M11 0




// Name:         AXI_AW_LAYER_S12_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M12 0




// Name:         AXI_AW_LAYER_S12_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M13 0




// Name:         AXI_AW_LAYER_S12_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M14 0




// Name:         AXI_AW_LAYER_S12_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M15 0




// Name:         AXI_AW_LAYER_S12_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S12_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 12. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 12 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 12 write address channel will only have to compete with  
//                     other masters accessing slave 12 write address channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write address channel (if masters connect to 
//                     slave 12 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 12 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 12 write address 
//                     via a shared write address channel. This means that to access slave 12 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 12 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S12_M16 0




// Name:         AXI_W_LAYER_S12_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M1 0




// Name:         AXI_W_LAYER_S12_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M2 0




// Name:         AXI_W_LAYER_S12_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M3 0




// Name:         AXI_W_LAYER_S12_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M4 0




// Name:         AXI_W_LAYER_S12_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M5 0




// Name:         AXI_W_LAYER_S12_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M6 0




// Name:         AXI_W_LAYER_S12_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M7 0




// Name:         AXI_W_LAYER_S12_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M8 0




// Name:         AXI_W_LAYER_S12_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M9 0




// Name:         AXI_W_LAYER_S12_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M10 0




// Name:         AXI_W_LAYER_S12_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M11 0




// Name:         AXI_W_LAYER_S12_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M12 0




// Name:         AXI_W_LAYER_S12_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M13 0




// Name:         AXI_W_LAYER_S12_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M14 0




// Name:         AXI_W_LAYER_S12_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M15 0




// Name:         AXI_W_LAYER_S12_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S12_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 12. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 12 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 12 write data channel will only have to compete with  
//                     other masters accessing slave 12 write data channel via slave 
//                     12's dedicated layer, and with masters on the shared layer  
//                     accessing slave 12 write data channel (if masters connect to 
//                     slave 12 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 12 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 12 write data 
//                     via a shared write data channel. This means that to access slave 12 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 12 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S12_M16 0




// Name:         AXI_AR_LAYER_S13_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M1 0




// Name:         AXI_AR_LAYER_S13_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M2 0




// Name:         AXI_AR_LAYER_S13_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M3 0




// Name:         AXI_AR_LAYER_S13_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M4 0




// Name:         AXI_AR_LAYER_S13_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M5 0




// Name:         AXI_AR_LAYER_S13_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M6 0




// Name:         AXI_AR_LAYER_S13_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M7 0




// Name:         AXI_AR_LAYER_S13_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M8 0




// Name:         AXI_AR_LAYER_S13_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M9 0




// Name:         AXI_AR_LAYER_S13_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M10 0




// Name:         AXI_AR_LAYER_S13_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M11 0




// Name:         AXI_AR_LAYER_S13_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M12 0




// Name:         AXI_AR_LAYER_S13_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M13 0




// Name:         AXI_AR_LAYER_S13_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M14 0




// Name:         AXI_AR_LAYER_S13_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M15 0




// Name:         AXI_AR_LAYER_S13_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S13_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 13. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 13 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 13 read address channel will only have to compete with  
//                     other masters accessing slave 13 read address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 read address channel (if masters connect to 
//                     slave 13 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 13 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 13 read address 
//                     via a shared read address channel. This means that to access slave 13 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 13 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S13_M16 0




// Name:         AXI_AW_LAYER_S13_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M1 0




// Name:         AXI_AW_LAYER_S13_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M2 0




// Name:         AXI_AW_LAYER_S13_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M3 0




// Name:         AXI_AW_LAYER_S13_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M4 0




// Name:         AXI_AW_LAYER_S13_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M5 0




// Name:         AXI_AW_LAYER_S13_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M6 0




// Name:         AXI_AW_LAYER_S13_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M7 0




// Name:         AXI_AW_LAYER_S13_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M8 0




// Name:         AXI_AW_LAYER_S13_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M9 0




// Name:         AXI_AW_LAYER_S13_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M10 0




// Name:         AXI_AW_LAYER_S13_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M11 0




// Name:         AXI_AW_LAYER_S13_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M12 0




// Name:         AXI_AW_LAYER_S13_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M13 0




// Name:         AXI_AW_LAYER_S13_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M14 0




// Name:         AXI_AW_LAYER_S13_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M15 0




// Name:         AXI_AW_LAYER_S13_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S13_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 13. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 13 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 13 write address channel will only have to compete with  
//                     other masters accessing slave 13 write address channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write address channel (if masters connect to 
//                     slave 13 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 13 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 13 write address 
//                     via a shared write address channel. This means that to access slave 13 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 13 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S13_M16 0




// Name:         AXI_W_LAYER_S13_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M1 0




// Name:         AXI_W_LAYER_S13_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M2 0




// Name:         AXI_W_LAYER_S13_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M3 0




// Name:         AXI_W_LAYER_S13_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M4 0




// Name:         AXI_W_LAYER_S13_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M5 0




// Name:         AXI_W_LAYER_S13_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M6 0




// Name:         AXI_W_LAYER_S13_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M7 0




// Name:         AXI_W_LAYER_S13_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M8 0




// Name:         AXI_W_LAYER_S13_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M9 0




// Name:         AXI_W_LAYER_S13_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M10 0




// Name:         AXI_W_LAYER_S13_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M11 0




// Name:         AXI_W_LAYER_S13_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M12 0




// Name:         AXI_W_LAYER_S13_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M13 0




// Name:         AXI_W_LAYER_S13_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M14 0




// Name:         AXI_W_LAYER_S13_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M15 0




// Name:         AXI_W_LAYER_S13_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S13_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 13. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 13 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 13 write data channel will only have to compete with  
//                     other masters accessing slave 13 write data channel via slave 
//                     13's dedicated layer, and with masters on the shared layer  
//                     accessing slave 13 write data channel (if masters connect to 
//                     slave 13 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 13 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 13 write data 
//                     via a shared write data channel. This means that to access slave 13 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 13 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S13_M16 0




// Name:         AXI_AR_LAYER_S14_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M1 0




// Name:         AXI_AR_LAYER_S14_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M2 0




// Name:         AXI_AR_LAYER_S14_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M3 0




// Name:         AXI_AR_LAYER_S14_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M4 0




// Name:         AXI_AR_LAYER_S14_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M5 0




// Name:         AXI_AR_LAYER_S14_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M6 0




// Name:         AXI_AR_LAYER_S14_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M7 0




// Name:         AXI_AR_LAYER_S14_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M8 0




// Name:         AXI_AR_LAYER_S14_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M9 0




// Name:         AXI_AR_LAYER_S14_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M10 0




// Name:         AXI_AR_LAYER_S14_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M11 0




// Name:         AXI_AR_LAYER_S14_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M12 0




// Name:         AXI_AR_LAYER_S14_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M13 0




// Name:         AXI_AR_LAYER_S14_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M14 0




// Name:         AXI_AR_LAYER_S14_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M15 0




// Name:         AXI_AR_LAYER_S14_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S14_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 14. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 14 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 14 read address channel will only have to compete with  
//                     other masters accessing slave 14 read address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 read address channel (if masters connect to 
//                     slave 14 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 14 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 14 read address 
//                     via a shared read address channel. This means that to access slave 14 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 14 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S14_M16 0




// Name:         AXI_AW_LAYER_S14_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M1 0




// Name:         AXI_AW_LAYER_S14_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M2 0




// Name:         AXI_AW_LAYER_S14_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M3 0




// Name:         AXI_AW_LAYER_S14_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M4 0




// Name:         AXI_AW_LAYER_S14_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M5 0




// Name:         AXI_AW_LAYER_S14_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M6 0




// Name:         AXI_AW_LAYER_S14_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M7 0




// Name:         AXI_AW_LAYER_S14_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M8 0




// Name:         AXI_AW_LAYER_S14_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M9 0




// Name:         AXI_AW_LAYER_S14_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M10 0




// Name:         AXI_AW_LAYER_S14_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M11 0




// Name:         AXI_AW_LAYER_S14_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M12 0




// Name:         AXI_AW_LAYER_S14_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M13 0




// Name:         AXI_AW_LAYER_S14_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M14 0




// Name:         AXI_AW_LAYER_S14_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M15 0




// Name:         AXI_AW_LAYER_S14_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S14_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 14. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 14 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 14 write address channel will only have to compete with  
//                     other masters accessing slave 14 write address channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write address channel (if masters connect to 
//                     slave 14 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 14 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 14 write address 
//                     via a shared write address channel. This means that to access slave 14 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 14 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S14_M16 0




// Name:         AXI_W_LAYER_S14_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M1 0




// Name:         AXI_W_LAYER_S14_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M2 0




// Name:         AXI_W_LAYER_S14_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M3 0




// Name:         AXI_W_LAYER_S14_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M4 0




// Name:         AXI_W_LAYER_S14_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M5 0




// Name:         AXI_W_LAYER_S14_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M6 0




// Name:         AXI_W_LAYER_S14_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M7 0




// Name:         AXI_W_LAYER_S14_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M8 0




// Name:         AXI_W_LAYER_S14_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M9 0




// Name:         AXI_W_LAYER_S14_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M10 0




// Name:         AXI_W_LAYER_S14_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M11 0




// Name:         AXI_W_LAYER_S14_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M12 0




// Name:         AXI_W_LAYER_S14_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M13 0




// Name:         AXI_W_LAYER_S14_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M14 0




// Name:         AXI_W_LAYER_S14_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M15 0




// Name:         AXI_W_LAYER_S14_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S14_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 14. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 14 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 14 write data channel will only have to compete with  
//                     other masters accessing slave 14 write data channel via slave 
//                     14's dedicated layer, and with masters on the shared layer  
//                     accessing slave 14 write data channel (if masters connect to 
//                     slave 14 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 14 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 14 write data 
//                     via a shared write data channel. This means that to access slave 14 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 14 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S14_M16 0




// Name:         AXI_AR_LAYER_S15_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M1 0




// Name:         AXI_AR_LAYER_S15_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M2 0




// Name:         AXI_AR_LAYER_S15_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M3 0




// Name:         AXI_AR_LAYER_S15_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M4 0




// Name:         AXI_AR_LAYER_S15_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M5 0




// Name:         AXI_AR_LAYER_S15_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M6 0




// Name:         AXI_AR_LAYER_S15_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M7 0




// Name:         AXI_AR_LAYER_S15_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M8 0




// Name:         AXI_AR_LAYER_S15_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M9 0




// Name:         AXI_AR_LAYER_S15_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M10 0




// Name:         AXI_AR_LAYER_S15_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M11 0




// Name:         AXI_AR_LAYER_S15_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M12 0




// Name:         AXI_AR_LAYER_S15_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M13 0




// Name:         AXI_AR_LAYER_S15_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M14 0




// Name:         AXI_AR_LAYER_S15_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M15 0




// Name:         AXI_AR_LAYER_S15_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S15_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 15. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 15 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 15 read address channel will only have to compete with  
//                     other masters accessing slave 15 read address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 read address channel (if masters connect to 
//                     slave 15 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 15 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 15 read address 
//                     via a shared read address channel. This means that to access slave 15 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 15 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S15_M16 0




// Name:         AXI_AW_LAYER_S15_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M1 0




// Name:         AXI_AW_LAYER_S15_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M2 0




// Name:         AXI_AW_LAYER_S15_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M3 0




// Name:         AXI_AW_LAYER_S15_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M4 0




// Name:         AXI_AW_LAYER_S15_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M5 0




// Name:         AXI_AW_LAYER_S15_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M6 0




// Name:         AXI_AW_LAYER_S15_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M7 0




// Name:         AXI_AW_LAYER_S15_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M8 0




// Name:         AXI_AW_LAYER_S15_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M9 0




// Name:         AXI_AW_LAYER_S15_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M10 0




// Name:         AXI_AW_LAYER_S15_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M11 0




// Name:         AXI_AW_LAYER_S15_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M12 0




// Name:         AXI_AW_LAYER_S15_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M13 0




// Name:         AXI_AW_LAYER_S15_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M14 0




// Name:         AXI_AW_LAYER_S15_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M15 0




// Name:         AXI_AW_LAYER_S15_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S15_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 15. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 15 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 15 write address channel will only have to compete with  
//                     other masters accessing slave 15 write address channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write address channel (if masters connect to 
//                     slave 15 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 15 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 15 write address 
//                     via a shared write address channel. This means that to access slave 15 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 15 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S15_M16 0




// Name:         AXI_W_LAYER_S15_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M1 0




// Name:         AXI_W_LAYER_S15_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M2 0




// Name:         AXI_W_LAYER_S15_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M3 0




// Name:         AXI_W_LAYER_S15_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M4 0




// Name:         AXI_W_LAYER_S15_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M5 0




// Name:         AXI_W_LAYER_S15_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M6 0




// Name:         AXI_W_LAYER_S15_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M7 0




// Name:         AXI_W_LAYER_S15_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M8 0




// Name:         AXI_W_LAYER_S15_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M9 0




// Name:         AXI_W_LAYER_S15_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M10 0




// Name:         AXI_W_LAYER_S15_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M11 0




// Name:         AXI_W_LAYER_S15_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M12 0




// Name:         AXI_W_LAYER_S15_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M13 0




// Name:         AXI_W_LAYER_S15_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M14 0




// Name:         AXI_W_LAYER_S15_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M15 0




// Name:         AXI_W_LAYER_S15_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S15_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 15. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 15 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 15 write data channel will only have to compete with  
//                     other masters accessing slave 15 write data channel via slave 
//                     15's dedicated layer, and with masters on the shared layer  
//                     accessing slave 15 write data channel (if masters connect to 
//                     slave 15 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 15 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 15 write data 
//                     via a shared write data channel. This means that to access slave 15 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 15 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S15_M16 0




// Name:         AXI_AR_LAYER_S16_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 1 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 1 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 1 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M1 0




// Name:         AXI_AR_LAYER_S16_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 2 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 2 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 2 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M2 0




// Name:         AXI_AR_LAYER_S16_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 3 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 3 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 3 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M3 0




// Name:         AXI_AR_LAYER_S16_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 4 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 4 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 4 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M4 0




// Name:         AXI_AR_LAYER_S16_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 5 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 5 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 5 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M5 0




// Name:         AXI_AR_LAYER_S16_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 6 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 6 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 6 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M6 0




// Name:         AXI_AR_LAYER_S16_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 7 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 7 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 7 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M7 0




// Name:         AXI_AR_LAYER_S16_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 8 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 8 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 8 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M8 0




// Name:         AXI_AR_LAYER_S16_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 9 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 9 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 9 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M9 0




// Name:         AXI_AR_LAYER_S16_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 10 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 10 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 10 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M10 0




// Name:         AXI_AR_LAYER_S16_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 11 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 11 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 11 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M11 0




// Name:         AXI_AR_LAYER_S16_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 12 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 12 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 12 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M12 0




// Name:         AXI_AR_LAYER_S16_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 13 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 13 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 13 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M13 0




// Name:         AXI_AR_LAYER_S16_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 14 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 14 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 14 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M14 0




// Name:         AXI_AR_LAYER_S16_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 15 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 15 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 15 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M15 0




// Name:         AXI_AR_LAYER_S16_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AR_LAYER_S16_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the read address channel of slave port 16. 
//  
//  Dedicated Layer => Master 16 read address channel connects directly to the  
//                     slave 16 read address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 16 read address channel will only have to compete with  
//                     other masters accessing slave 16 read address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 read address channel (if masters connect to 
//                     slave 16 read address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 16 on the  
//                     read address channel. 
//  
//  Shared Layer    => Master 16 read address channel connects to slave 16 read address 
//                     via a shared read address channel. This means that to access slave 16 
//                     read address channel, master 16 will have to compete with all 
//                     masters which access any slaves read address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 16 on the  
//                     read address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AR_LAYER_S16_M16 0




// Name:         AXI_AW_LAYER_S16_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 1 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 1 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 1 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M1 0




// Name:         AXI_AW_LAYER_S16_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 2 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 2 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 2 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M2 0




// Name:         AXI_AW_LAYER_S16_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 3 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 3 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 3 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M3 0




// Name:         AXI_AW_LAYER_S16_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 4 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 4 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 4 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M4 0




// Name:         AXI_AW_LAYER_S16_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 5 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 5 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 5 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M5 0




// Name:         AXI_AW_LAYER_S16_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 6 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 6 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 6 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M6 0




// Name:         AXI_AW_LAYER_S16_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 7 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 7 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 7 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M7 0




// Name:         AXI_AW_LAYER_S16_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 8 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 8 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 8 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M8 0




// Name:         AXI_AW_LAYER_S16_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 9 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 9 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 9 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M9 0




// Name:         AXI_AW_LAYER_S16_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 10 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 10 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 10 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M10 0




// Name:         AXI_AW_LAYER_S16_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 11 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 11 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 11 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M11 0




// Name:         AXI_AW_LAYER_S16_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 12 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 12 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 12 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M12 0




// Name:         AXI_AW_LAYER_S16_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 13 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 13 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 13 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M13 0




// Name:         AXI_AW_LAYER_S16_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 14 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 14 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 14 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M14 0




// Name:         AXI_AW_LAYER_S16_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 15 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 15 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 15 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M15 0




// Name:         AXI_AW_LAYER_S16_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_AW_LAYER_S16_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write address channel of slave port 16. 
//  
//  Dedicated Layer => Master 16 write address channel connects directly to the  
//                     slave 16 write address dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 16 write address channel will only have to compete with  
//                     other masters accessing slave 16 write address channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write address channel (if masters connect to 
//                     slave 16 write address channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 16 on the  
//                     write address channel. 
//  
//  Shared Layer    => Master 16 write address channel connects to slave 16 write address 
//                     via a shared write address channel. This means that to access slave 16 
//                     write address channel, master 16 will have to compete with all 
//                     masters which access any slaves write address channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 16 on the  
//                     write address channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_AW_LAYER_S16_M16 0




// Name:         AXI_W_LAYER_S16_M1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M1 :  
//  
//  Selects which layer master 1 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 1 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 1 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 1 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 1 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 1 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 1 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M1 0




// Name:         AXI_W_LAYER_S16_M2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M2 :  
//  
//  Selects which layer master 2 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 2 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 2 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 2 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 2 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 2 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 2 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M2 0




// Name:         AXI_W_LAYER_S16_M3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M3 :  
//  
//  Selects which layer master 3 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 3 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 3 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 3 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 3 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 3 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 3 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M3 0




// Name:         AXI_W_LAYER_S16_M4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M4 :  
//  
//  Selects which layer master 4 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 4 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 4 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 4 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 4 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 4 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 4 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M4 0




// Name:         AXI_W_LAYER_S16_M5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M5 :  
//  
//  Selects which layer master 5 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 5 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 5 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 5 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 5 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 5 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 5 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M5 0




// Name:         AXI_W_LAYER_S16_M6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M6 :  
//  
//  Selects which layer master 6 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 6 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 6 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 6 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 6 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 6 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 6 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M6 0




// Name:         AXI_W_LAYER_S16_M7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M7 :  
//  
//  Selects which layer master 7 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 7 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 7 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 7 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 7 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 7 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 7 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M7 0




// Name:         AXI_W_LAYER_S16_M8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M8 :  
//  
//  Selects which layer master 8 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 8 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 8 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 8 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 8 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 8 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 8 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M8 0




// Name:         AXI_W_LAYER_S16_M9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M9 :  
//  
//  Selects which layer master 9 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 9 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 9 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 9 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 9 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 9 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 9 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M9 0




// Name:         AXI_W_LAYER_S16_M10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M10 :  
//  
//  Selects which layer master 10 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 10 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 10 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 10 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 10 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 10 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 10 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M10 0




// Name:         AXI_W_LAYER_S16_M11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M11 :  
//  
//  Selects which layer master 11 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 11 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 11 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 11 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 11 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 11 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 11 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M11 0




// Name:         AXI_W_LAYER_S16_M12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M12 :  
//  
//  Selects which layer master 12 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 12 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 12 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 12 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 12 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 12 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 12 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M12 0




// Name:         AXI_W_LAYER_S16_M13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M13 :  
//  
//  Selects which layer master 13 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 13 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 13 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 13 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 13 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 13 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 13 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M13 0




// Name:         AXI_W_LAYER_S16_M14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M14 :  
//  
//  Selects which layer master 14 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 14 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 14 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 14 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 14 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 14 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 14 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M14 0




// Name:         AXI_W_LAYER_S16_M15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M15 :  
//  
//  Selects which layer master 15 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 15 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 15 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 15 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 15 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 15 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 15 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M15 0




// Name:         AXI_W_LAYER_S16_M16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_W_LAYER_S16_M16 :  
//  
//  Selects which layer master 16 will connect  
//  to the write data channel of slave port 16. 
//  
//  Dedicated Layer => Master 16 write data channel connects directly to the  
//                     slave 16 write data dedicated channel.  
//                     Connecting via the dedicated channel means master 16 accessing 
//                     slave 16 write data channel will only have to compete with  
//                     other masters accessing slave 16 write data channel via slave 
//                     16's dedicated layer, and with masters on the shared layer  
//                     accessing slave 16 write data channel (if masters connect to 
//                     slave 16 write data channel from both the shared and dedicated  
//                     layers. 
//  
//                     This option should be used when there is a low latency or high bandwidth 
//                     requirement between master 16 and slave 16 on the  
//                     write data channel. 
//  
//  Shared Layer    => Master 16 write data channel connects to slave 16 write data 
//                     via a shared write data channel. This means that to access slave 16 
//                     write data channel, master 16 will have to compete with all 
//                     masters which access any slaves write data channel via the shared layer. 
//  
//                     This option should be used when there is a high latency or low bandwidth 
//                     requirement between master 16 and slave 16 on the  
//                     write data channel. 
//  
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  
// 
`define AXI_W_LAYER_S16_M16 0



// Name:         AXI_ALL_R_LAYER_SHARED
// Default:      false
// Values:       false (0), true (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_ALL_R_LAYER_SHARED : 
//  Choose to make the read data channel shared to all master slave links by default. 
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1).
`define AXI_ALL_R_LAYER_SHARED 0
      


// Name:         AXI_R_LAYER_M1_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S0 0




// Name:         AXI_R_LAYER_M1_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S1 0




// Name:         AXI_R_LAYER_M1_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S2 0




// Name:         AXI_R_LAYER_M1_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S3 0




// Name:         AXI_R_LAYER_M1_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S4 0




// Name:         AXI_R_LAYER_M1_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S5 0




// Name:         AXI_R_LAYER_M1_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S6 0




// Name:         AXI_R_LAYER_M1_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S7 0




// Name:         AXI_R_LAYER_M1_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S8 0




// Name:         AXI_R_LAYER_M1_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S9 0




// Name:         AXI_R_LAYER_M1_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S10 0




// Name:         AXI_R_LAYER_M1_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S11 0




// Name:         AXI_R_LAYER_M1_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S12 0




// Name:         AXI_R_LAYER_M1_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S13 0




// Name:         AXI_R_LAYER_M1_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S14 0




// Name:         AXI_R_LAYER_M1_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S15 0




// Name:         AXI_R_LAYER_M1_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M1_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 1 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 1 read data channel will only have to compete with  
//  //                    other masters accessing master 1 read data channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 read data channel (if slaves connect to 
//  //                    master 1 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 1 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    1 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 1 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M1_S16 0



// Name:         AXI_ALL_B_LAYER_SHARED
// Default:      false
// Values:       false (0), true (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_ALL_B_LAYER_SHARED : 
//  Choose to make the burst response channel shared to all master slave links by default. 
//  
//  This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  
//  This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1).
`define AXI_ALL_B_LAYER_SHARED 0
      


// Name:         AXI_B_LAYER_M1_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S0 0




// Name:         AXI_B_LAYER_M1_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S1 0




// Name:         AXI_B_LAYER_M1_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S2 0




// Name:         AXI_B_LAYER_M1_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S3 0




// Name:         AXI_B_LAYER_M1_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S4 0




// Name:         AXI_B_LAYER_M1_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S5 0




// Name:         AXI_B_LAYER_M1_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S6 0




// Name:         AXI_B_LAYER_M1_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S7 0




// Name:         AXI_B_LAYER_M1_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S8 0




// Name:         AXI_B_LAYER_M1_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S9 0




// Name:         AXI_B_LAYER_M1_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S10 0




// Name:         AXI_B_LAYER_M1_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S11 0




// Name:         AXI_B_LAYER_M1_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S12 0




// Name:         AXI_B_LAYER_M1_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S13 0




// Name:         AXI_B_LAYER_M1_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S14 0




// Name:         AXI_B_LAYER_M1_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S15 0




// Name:         AXI_B_LAYER_M1_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M1_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 1. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 1 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 1 burst response channel will only have to compete with  
//  //                    other masters accessing master 1 burst response channel via master 
//  //                    1's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 1 burst response channel (if slaves connect to 
//  //                    master 1 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 1 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    1 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 1 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M1_S16 0




// Name:         AXI_R_LAYER_M2_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S0 0




// Name:         AXI_R_LAYER_M2_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S1 0




// Name:         AXI_R_LAYER_M2_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S2 0




// Name:         AXI_R_LAYER_M2_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S3 0




// Name:         AXI_R_LAYER_M2_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S4 0




// Name:         AXI_R_LAYER_M2_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S5 0




// Name:         AXI_R_LAYER_M2_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S6 0




// Name:         AXI_R_LAYER_M2_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S7 0




// Name:         AXI_R_LAYER_M2_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S8 0




// Name:         AXI_R_LAYER_M2_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S9 0




// Name:         AXI_R_LAYER_M2_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S10 0




// Name:         AXI_R_LAYER_M2_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S11 0




// Name:         AXI_R_LAYER_M2_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S12 0




// Name:         AXI_R_LAYER_M2_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S13 0




// Name:         AXI_R_LAYER_M2_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S14 0




// Name:         AXI_R_LAYER_M2_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S15 0




// Name:         AXI_R_LAYER_M2_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M2_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 2 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 2 read data channel will only have to compete with  
//  //                    other masters accessing master 2 read data channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 read data channel (if slaves connect to 
//  //                    master 2 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 2 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    2 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 2 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M2_S16 0




// Name:         AXI_B_LAYER_M2_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S0 0




// Name:         AXI_B_LAYER_M2_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      1 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S1 0




// Name:         AXI_B_LAYER_M2_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S2 0




// Name:         AXI_B_LAYER_M2_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S3 0




// Name:         AXI_B_LAYER_M2_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S4 0




// Name:         AXI_B_LAYER_M2_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S5 0




// Name:         AXI_B_LAYER_M2_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S6 0




// Name:         AXI_B_LAYER_M2_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S7 0




// Name:         AXI_B_LAYER_M2_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S8 0




// Name:         AXI_B_LAYER_M2_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S9 0




// Name:         AXI_B_LAYER_M2_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S10 0




// Name:         AXI_B_LAYER_M2_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S11 0




// Name:         AXI_B_LAYER_M2_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S12 0




// Name:         AXI_B_LAYER_M2_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S13 0




// Name:         AXI_B_LAYER_M2_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S14 0




// Name:         AXI_B_LAYER_M2_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S15 0




// Name:         AXI_B_LAYER_M2_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M2_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 2. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 2 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 2 burst response channel will only have to compete with  
//  //                    other masters accessing master 2 burst response channel via master 
//  //                    2's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 2 burst response channel (if slaves connect to 
//  //                    master 2 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 2 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    2 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 2 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M2_S16 0




// Name:         AXI_R_LAYER_M3_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S0 0




// Name:         AXI_R_LAYER_M3_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S1 0




// Name:         AXI_R_LAYER_M3_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S2 0




// Name:         AXI_R_LAYER_M3_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S3 0




// Name:         AXI_R_LAYER_M3_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S4 0




// Name:         AXI_R_LAYER_M3_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S5 0




// Name:         AXI_R_LAYER_M3_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S6 0




// Name:         AXI_R_LAYER_M3_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S7 0




// Name:         AXI_R_LAYER_M3_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S8 0




// Name:         AXI_R_LAYER_M3_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S9 0




// Name:         AXI_R_LAYER_M3_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S10 0




// Name:         AXI_R_LAYER_M3_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S11 0




// Name:         AXI_R_LAYER_M3_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S12 0




// Name:         AXI_R_LAYER_M3_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S13 0




// Name:         AXI_R_LAYER_M3_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S14 0




// Name:         AXI_R_LAYER_M3_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S15 0




// Name:         AXI_R_LAYER_M3_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M3_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 3 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 3 read data channel will only have to compete with  
//  //                    other masters accessing master 3 read data channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 read data channel (if slaves connect to 
//  //                    master 3 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 3 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    3 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 3 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M3_S16 0




// Name:         AXI_B_LAYER_M3_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S0 0




// Name:         AXI_B_LAYER_M3_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S1 0




// Name:         AXI_B_LAYER_M3_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S2 0




// Name:         AXI_B_LAYER_M3_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S3 0




// Name:         AXI_B_LAYER_M3_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S4 0




// Name:         AXI_B_LAYER_M3_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S5 0




// Name:         AXI_B_LAYER_M3_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S6 0




// Name:         AXI_B_LAYER_M3_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S7 0




// Name:         AXI_B_LAYER_M3_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S8 0




// Name:         AXI_B_LAYER_M3_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S9 0




// Name:         AXI_B_LAYER_M3_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S10 0




// Name:         AXI_B_LAYER_M3_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S11 0




// Name:         AXI_B_LAYER_M3_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S12 0




// Name:         AXI_B_LAYER_M3_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S13 0




// Name:         AXI_B_LAYER_M3_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S14 0




// Name:         AXI_B_LAYER_M3_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S15 0




// Name:         AXI_B_LAYER_M3_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M3_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 3. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 3 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 3 burst response channel will only have to compete with  
//  //                    other masters accessing master 3 burst response channel via master 
//  //                    3's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 3 burst response channel (if slaves connect to 
//  //                    master 3 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 3 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    3 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 3 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M3_S16 0




// Name:         AXI_R_LAYER_M4_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S0 0




// Name:         AXI_R_LAYER_M4_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S1 0




// Name:         AXI_R_LAYER_M4_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S2 0




// Name:         AXI_R_LAYER_M4_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S3 0




// Name:         AXI_R_LAYER_M4_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S4 0




// Name:         AXI_R_LAYER_M4_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S5 0




// Name:         AXI_R_LAYER_M4_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S6 0




// Name:         AXI_R_LAYER_M4_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S7 0




// Name:         AXI_R_LAYER_M4_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S8 0




// Name:         AXI_R_LAYER_M4_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S9 0




// Name:         AXI_R_LAYER_M4_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S10 0




// Name:         AXI_R_LAYER_M4_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S11 0




// Name:         AXI_R_LAYER_M4_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S12 0




// Name:         AXI_R_LAYER_M4_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S13 0




// Name:         AXI_R_LAYER_M4_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S14 0




// Name:         AXI_R_LAYER_M4_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S15 0




// Name:         AXI_R_LAYER_M4_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M4_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 4 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 4 read data channel will only have to compete with  
//  //                    other masters accessing master 4 read data channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 read data channel (if slaves connect to 
//  //                    master 4 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 4 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    4 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 4 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M4_S16 0




// Name:         AXI_B_LAYER_M4_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S0 0




// Name:         AXI_B_LAYER_M4_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S1 0




// Name:         AXI_B_LAYER_M4_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S2 0




// Name:         AXI_B_LAYER_M4_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S3 0




// Name:         AXI_B_LAYER_M4_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S4 0




// Name:         AXI_B_LAYER_M4_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S5 0




// Name:         AXI_B_LAYER_M4_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S6 0




// Name:         AXI_B_LAYER_M4_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S7 0




// Name:         AXI_B_LAYER_M4_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S8 0




// Name:         AXI_B_LAYER_M4_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S9 0




// Name:         AXI_B_LAYER_M4_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S10 0




// Name:         AXI_B_LAYER_M4_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S11 0




// Name:         AXI_B_LAYER_M4_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S12 0




// Name:         AXI_B_LAYER_M4_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S13 0




// Name:         AXI_B_LAYER_M4_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S14 0




// Name:         AXI_B_LAYER_M4_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S15 0




// Name:         AXI_B_LAYER_M4_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M4_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 4. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 4 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 4 burst response channel will only have to compete with  
//  //                    other masters accessing master 4 burst response channel via master 
//  //                    4's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 4 burst response channel (if slaves connect to 
//  //                    master 4 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 4 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    4 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 4 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M4_S16 0




// Name:         AXI_R_LAYER_M5_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S0 0




// Name:         AXI_R_LAYER_M5_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S1 0




// Name:         AXI_R_LAYER_M5_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S2 0




// Name:         AXI_R_LAYER_M5_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S3 0




// Name:         AXI_R_LAYER_M5_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S4 0




// Name:         AXI_R_LAYER_M5_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S5 0




// Name:         AXI_R_LAYER_M5_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S6 0




// Name:         AXI_R_LAYER_M5_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S7 0




// Name:         AXI_R_LAYER_M5_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S8 0




// Name:         AXI_R_LAYER_M5_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S9 0




// Name:         AXI_R_LAYER_M5_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S10 0




// Name:         AXI_R_LAYER_M5_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S11 0




// Name:         AXI_R_LAYER_M5_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S12 0




// Name:         AXI_R_LAYER_M5_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S13 0




// Name:         AXI_R_LAYER_M5_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S14 0




// Name:         AXI_R_LAYER_M5_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S15 0




// Name:         AXI_R_LAYER_M5_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M5_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 5 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 5 read data channel will only have to compete with  
//  //                    other masters accessing master 5 read data channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 read data channel (if slaves connect to 
//  //                    master 5 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 5 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    5 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 5 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M5_S16 0




// Name:         AXI_B_LAYER_M5_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S0 0




// Name:         AXI_B_LAYER_M5_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S1 0




// Name:         AXI_B_LAYER_M5_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S2 0




// Name:         AXI_B_LAYER_M5_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S3 0




// Name:         AXI_B_LAYER_M5_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S4 0




// Name:         AXI_B_LAYER_M5_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S5 0




// Name:         AXI_B_LAYER_M5_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S6 0




// Name:         AXI_B_LAYER_M5_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S7 0




// Name:         AXI_B_LAYER_M5_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S8 0




// Name:         AXI_B_LAYER_M5_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S9 0




// Name:         AXI_B_LAYER_M5_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S10 0




// Name:         AXI_B_LAYER_M5_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S11 0




// Name:         AXI_B_LAYER_M5_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S12 0




// Name:         AXI_B_LAYER_M5_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S13 0




// Name:         AXI_B_LAYER_M5_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S14 0




// Name:         AXI_B_LAYER_M5_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S15 0




// Name:         AXI_B_LAYER_M5_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M5_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 5. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 5 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 5 burst response channel will only have to compete with  
//  //                    other masters accessing master 5 burst response channel via master 
//  //                    5's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 5 burst response channel (if slaves connect to 
//  //                    master 5 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 5 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    5 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 5 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M5_S16 0




// Name:         AXI_R_LAYER_M6_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S0 0




// Name:         AXI_R_LAYER_M6_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S1 0




// Name:         AXI_R_LAYER_M6_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S2 0




// Name:         AXI_R_LAYER_M6_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S3 0




// Name:         AXI_R_LAYER_M6_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S4 0




// Name:         AXI_R_LAYER_M6_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S5 0




// Name:         AXI_R_LAYER_M6_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S6 0




// Name:         AXI_R_LAYER_M6_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S7 0




// Name:         AXI_R_LAYER_M6_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S8 0




// Name:         AXI_R_LAYER_M6_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S9 0




// Name:         AXI_R_LAYER_M6_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S10 0




// Name:         AXI_R_LAYER_M6_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S11 0




// Name:         AXI_R_LAYER_M6_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S12 0




// Name:         AXI_R_LAYER_M6_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S13 0




// Name:         AXI_R_LAYER_M6_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S14 0




// Name:         AXI_R_LAYER_M6_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S15 0




// Name:         AXI_R_LAYER_M6_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M6_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 6 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 6 read data channel will only have to compete with  
//  //                    other masters accessing master 6 read data channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 read data channel (if slaves connect to 
//  //                    master 6 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 6 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    6 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 6 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M6_S16 0




// Name:         AXI_B_LAYER_M6_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S0 0




// Name:         AXI_B_LAYER_M6_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S1 0




// Name:         AXI_B_LAYER_M6_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S2 0




// Name:         AXI_B_LAYER_M6_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S3 0




// Name:         AXI_B_LAYER_M6_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S4 0




// Name:         AXI_B_LAYER_M6_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S5 0




// Name:         AXI_B_LAYER_M6_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S6 0




// Name:         AXI_B_LAYER_M6_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S7 0




// Name:         AXI_B_LAYER_M6_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S8 0




// Name:         AXI_B_LAYER_M6_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S9 0




// Name:         AXI_B_LAYER_M6_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S10 0




// Name:         AXI_B_LAYER_M6_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S11 0




// Name:         AXI_B_LAYER_M6_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S12 0




// Name:         AXI_B_LAYER_M6_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S13 0




// Name:         AXI_B_LAYER_M6_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S14 0




// Name:         AXI_B_LAYER_M6_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S15 0




// Name:         AXI_B_LAYER_M6_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M6_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 6. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 6 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 6 burst response channel will only have to compete with  
//  //                    other masters accessing master 6 burst response channel via master 
//  //                    6's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 6 burst response channel (if slaves connect to 
//  //                    master 6 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 6 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    6 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 6 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M6_S16 0




// Name:         AXI_R_LAYER_M7_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S0 0




// Name:         AXI_R_LAYER_M7_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S1 0




// Name:         AXI_R_LAYER_M7_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S2 0




// Name:         AXI_R_LAYER_M7_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S3 0




// Name:         AXI_R_LAYER_M7_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S4 0




// Name:         AXI_R_LAYER_M7_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S5 0




// Name:         AXI_R_LAYER_M7_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S6 0




// Name:         AXI_R_LAYER_M7_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S7 0




// Name:         AXI_R_LAYER_M7_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S8 0




// Name:         AXI_R_LAYER_M7_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S9 0




// Name:         AXI_R_LAYER_M7_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S10 0




// Name:         AXI_R_LAYER_M7_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S11 0




// Name:         AXI_R_LAYER_M7_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S12 0




// Name:         AXI_R_LAYER_M7_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S13 0




// Name:         AXI_R_LAYER_M7_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S14 0




// Name:         AXI_R_LAYER_M7_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S15 0




// Name:         AXI_R_LAYER_M7_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M7_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 7 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 7 read data channel will only have to compete with  
//  //                    other masters accessing master 7 read data channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 read data channel (if slaves connect to 
//  //                    master 7 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 7 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    7 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 7 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M7_S16 0




// Name:         AXI_B_LAYER_M7_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S0 0




// Name:         AXI_B_LAYER_M7_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S1 0




// Name:         AXI_B_LAYER_M7_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S2 0




// Name:         AXI_B_LAYER_M7_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S3 0




// Name:         AXI_B_LAYER_M7_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S4 0




// Name:         AXI_B_LAYER_M7_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S5 0




// Name:         AXI_B_LAYER_M7_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S6 0




// Name:         AXI_B_LAYER_M7_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S7 0




// Name:         AXI_B_LAYER_M7_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S8 0




// Name:         AXI_B_LAYER_M7_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S9 0




// Name:         AXI_B_LAYER_M7_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S10 0




// Name:         AXI_B_LAYER_M7_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S11 0




// Name:         AXI_B_LAYER_M7_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S12 0




// Name:         AXI_B_LAYER_M7_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S13 0




// Name:         AXI_B_LAYER_M7_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S14 0




// Name:         AXI_B_LAYER_M7_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S15 0




// Name:         AXI_B_LAYER_M7_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M7_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 7. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 7 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 7 burst response channel will only have to compete with  
//  //                    other masters accessing master 7 burst response channel via master 
//  //                    7's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 7 burst response channel (if slaves connect to 
//  //                    master 7 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 7 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    7 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 7 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M7_S16 0




// Name:         AXI_R_LAYER_M8_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S0 0




// Name:         AXI_R_LAYER_M8_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S1 0




// Name:         AXI_R_LAYER_M8_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S2 0




// Name:         AXI_R_LAYER_M8_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S3 0




// Name:         AXI_R_LAYER_M8_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S4 0




// Name:         AXI_R_LAYER_M8_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S5 0




// Name:         AXI_R_LAYER_M8_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S6 0




// Name:         AXI_R_LAYER_M8_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S7 0




// Name:         AXI_R_LAYER_M8_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S8 0




// Name:         AXI_R_LAYER_M8_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S9 0




// Name:         AXI_R_LAYER_M8_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S10 0




// Name:         AXI_R_LAYER_M8_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S11 0




// Name:         AXI_R_LAYER_M8_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S12 0




// Name:         AXI_R_LAYER_M8_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S13 0




// Name:         AXI_R_LAYER_M8_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S14 0




// Name:         AXI_R_LAYER_M8_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S15 0




// Name:         AXI_R_LAYER_M8_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M8_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 8 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 8 read data channel will only have to compete with  
//  //                    other masters accessing master 8 read data channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 read data channel (if slaves connect to 
//  //                    master 8 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 8 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    8 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 8 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M8_S16 0




// Name:         AXI_B_LAYER_M8_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S0 0




// Name:         AXI_B_LAYER_M8_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S1 0




// Name:         AXI_B_LAYER_M8_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S2 0




// Name:         AXI_B_LAYER_M8_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S3 0




// Name:         AXI_B_LAYER_M8_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S4 0




// Name:         AXI_B_LAYER_M8_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S5 0




// Name:         AXI_B_LAYER_M8_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S6 0




// Name:         AXI_B_LAYER_M8_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S7 0




// Name:         AXI_B_LAYER_M8_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S8 0




// Name:         AXI_B_LAYER_M8_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S9 0




// Name:         AXI_B_LAYER_M8_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S10 0




// Name:         AXI_B_LAYER_M8_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S11 0




// Name:         AXI_B_LAYER_M8_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S12 0




// Name:         AXI_B_LAYER_M8_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S13 0




// Name:         AXI_B_LAYER_M8_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S14 0




// Name:         AXI_B_LAYER_M8_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S15 0




// Name:         AXI_B_LAYER_M8_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M8_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 8. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 8 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 8 burst response channel will only have to compete with  
//  //                    other masters accessing master 8 burst response channel via master 
//  //                    8's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 8 burst response channel (if slaves connect to 
//  //                    master 8 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 8 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    8 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 8 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M8_S16 0




// Name:         AXI_R_LAYER_M9_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S0 0




// Name:         AXI_R_LAYER_M9_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S1 0




// Name:         AXI_R_LAYER_M9_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S2 0




// Name:         AXI_R_LAYER_M9_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S3 0




// Name:         AXI_R_LAYER_M9_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S4 0




// Name:         AXI_R_LAYER_M9_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S5 0




// Name:         AXI_R_LAYER_M9_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S6 0




// Name:         AXI_R_LAYER_M9_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S7 0




// Name:         AXI_R_LAYER_M9_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S8 0




// Name:         AXI_R_LAYER_M9_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S9 0




// Name:         AXI_R_LAYER_M9_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S10 0




// Name:         AXI_R_LAYER_M9_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S11 0




// Name:         AXI_R_LAYER_M9_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S12 0




// Name:         AXI_R_LAYER_M9_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S13 0




// Name:         AXI_R_LAYER_M9_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S14 0




// Name:         AXI_R_LAYER_M9_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S15 0




// Name:         AXI_R_LAYER_M9_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M9_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 9 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 9 read data channel will only have to compete with  
//  //                    other masters accessing master 9 read data channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 read data channel (if slaves connect to 
//  //                    master 9 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 9 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    9 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 9 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M9_S16 0




// Name:         AXI_B_LAYER_M9_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S0 0




// Name:         AXI_B_LAYER_M9_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S1 0




// Name:         AXI_B_LAYER_M9_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S2 0




// Name:         AXI_B_LAYER_M9_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S3 0




// Name:         AXI_B_LAYER_M9_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S4 0




// Name:         AXI_B_LAYER_M9_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S5 0




// Name:         AXI_B_LAYER_M9_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S6 0




// Name:         AXI_B_LAYER_M9_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S7 0




// Name:         AXI_B_LAYER_M9_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S8 0




// Name:         AXI_B_LAYER_M9_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S9 0




// Name:         AXI_B_LAYER_M9_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S10 0




// Name:         AXI_B_LAYER_M9_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S11 0




// Name:         AXI_B_LAYER_M9_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S12 0




// Name:         AXI_B_LAYER_M9_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S13 0




// Name:         AXI_B_LAYER_M9_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S14 0




// Name:         AXI_B_LAYER_M9_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S15 0




// Name:         AXI_B_LAYER_M9_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M9_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 9. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 9 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 9 burst response channel will only have to compete with  
//  //                    other masters accessing master 9 burst response channel via master 
//  //                    9's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 9 burst response channel (if slaves connect to 
//  //                    master 9 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 9 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    9 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 9 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M9_S16 0




// Name:         AXI_R_LAYER_M10_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S0 0




// Name:         AXI_R_LAYER_M10_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S1 0




// Name:         AXI_R_LAYER_M10_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S2 0




// Name:         AXI_R_LAYER_M10_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S3 0




// Name:         AXI_R_LAYER_M10_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S4 0




// Name:         AXI_R_LAYER_M10_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S5 0




// Name:         AXI_R_LAYER_M10_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S6 0




// Name:         AXI_R_LAYER_M10_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S7 0




// Name:         AXI_R_LAYER_M10_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S8 0




// Name:         AXI_R_LAYER_M10_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S9 0




// Name:         AXI_R_LAYER_M10_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S10 0




// Name:         AXI_R_LAYER_M10_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S11 0




// Name:         AXI_R_LAYER_M10_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S12 0




// Name:         AXI_R_LAYER_M10_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S13 0




// Name:         AXI_R_LAYER_M10_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S14 0




// Name:         AXI_R_LAYER_M10_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S15 0




// Name:         AXI_R_LAYER_M10_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M10_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 10 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 10 read data channel will only have to compete with  
//  //                    other masters accessing master 10 read data channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 read data channel (if slaves connect to 
//  //                    master 10 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 10 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    10 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 10 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M10_S16 0




// Name:         AXI_B_LAYER_M10_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S0 0




// Name:         AXI_B_LAYER_M10_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S1 0




// Name:         AXI_B_LAYER_M10_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S2 0




// Name:         AXI_B_LAYER_M10_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S3 0




// Name:         AXI_B_LAYER_M10_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S4 0




// Name:         AXI_B_LAYER_M10_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S5 0




// Name:         AXI_B_LAYER_M10_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S6 0




// Name:         AXI_B_LAYER_M10_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S7 0




// Name:         AXI_B_LAYER_M10_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S8 0




// Name:         AXI_B_LAYER_M10_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S9 0




// Name:         AXI_B_LAYER_M10_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S10 0




// Name:         AXI_B_LAYER_M10_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S11 0




// Name:         AXI_B_LAYER_M10_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S12 0




// Name:         AXI_B_LAYER_M10_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S13 0




// Name:         AXI_B_LAYER_M10_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S14 0




// Name:         AXI_B_LAYER_M10_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S15 0




// Name:         AXI_B_LAYER_M10_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M10_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 10. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 10 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 10 burst response channel will only have to compete with  
//  //                    other masters accessing master 10 burst response channel via master 
//  //                    10's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 10 burst response channel (if slaves connect to 
//  //                    master 10 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 10 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    10 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 10 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M10_S16 0




// Name:         AXI_R_LAYER_M11_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S0 0




// Name:         AXI_R_LAYER_M11_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S1 0




// Name:         AXI_R_LAYER_M11_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S2 0




// Name:         AXI_R_LAYER_M11_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S3 0




// Name:         AXI_R_LAYER_M11_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S4 0




// Name:         AXI_R_LAYER_M11_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S5 0




// Name:         AXI_R_LAYER_M11_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S6 0




// Name:         AXI_R_LAYER_M11_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S7 0




// Name:         AXI_R_LAYER_M11_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S8 0




// Name:         AXI_R_LAYER_M11_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S9 0




// Name:         AXI_R_LAYER_M11_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S10 0




// Name:         AXI_R_LAYER_M11_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S11 0




// Name:         AXI_R_LAYER_M11_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S12 0




// Name:         AXI_R_LAYER_M11_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S13 0




// Name:         AXI_R_LAYER_M11_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S14 0




// Name:         AXI_R_LAYER_M11_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S15 0




// Name:         AXI_R_LAYER_M11_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M11_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 11 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 11 read data channel will only have to compete with  
//  //                    other masters accessing master 11 read data channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 read data channel (if slaves connect to 
//  //                    master 11 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 11 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    11 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 11 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M11_S16 0




// Name:         AXI_B_LAYER_M11_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S0 0




// Name:         AXI_B_LAYER_M11_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S1 0




// Name:         AXI_B_LAYER_M11_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S2 0




// Name:         AXI_B_LAYER_M11_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S3 0




// Name:         AXI_B_LAYER_M11_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S4 0




// Name:         AXI_B_LAYER_M11_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S5 0




// Name:         AXI_B_LAYER_M11_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S6 0




// Name:         AXI_B_LAYER_M11_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S7 0




// Name:         AXI_B_LAYER_M11_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S8 0




// Name:         AXI_B_LAYER_M11_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S9 0




// Name:         AXI_B_LAYER_M11_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S10 0




// Name:         AXI_B_LAYER_M11_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S11 0




// Name:         AXI_B_LAYER_M11_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S12 0




// Name:         AXI_B_LAYER_M11_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S13 0




// Name:         AXI_B_LAYER_M11_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S14 0




// Name:         AXI_B_LAYER_M11_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S15 0




// Name:         AXI_B_LAYER_M11_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M11_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 11. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 11 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 11 burst response channel will only have to compete with  
//  //                    other masters accessing master 11 burst response channel via master 
//  //                    11's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 11 burst response channel (if slaves connect to 
//  //                    master 11 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 11 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    11 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 11 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M11_S16 0




// Name:         AXI_R_LAYER_M12_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S0 0




// Name:         AXI_R_LAYER_M12_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S1 0




// Name:         AXI_R_LAYER_M12_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S2 0




// Name:         AXI_R_LAYER_M12_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S3 0




// Name:         AXI_R_LAYER_M12_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S4 0




// Name:         AXI_R_LAYER_M12_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S5 0




// Name:         AXI_R_LAYER_M12_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S6 0




// Name:         AXI_R_LAYER_M12_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S7 0




// Name:         AXI_R_LAYER_M12_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S8 0




// Name:         AXI_R_LAYER_M12_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S9 0




// Name:         AXI_R_LAYER_M12_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S10 0




// Name:         AXI_R_LAYER_M12_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S11 0




// Name:         AXI_R_LAYER_M12_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S12 0




// Name:         AXI_R_LAYER_M12_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S13 0




// Name:         AXI_R_LAYER_M12_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S14 0




// Name:         AXI_R_LAYER_M12_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S15 0




// Name:         AXI_R_LAYER_M12_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M12_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 12 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 12 read data channel will only have to compete with  
//  //                    other masters accessing master 12 read data channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 read data channel (if slaves connect to 
//  //                    master 12 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 12 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    12 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 12 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M12_S16 0




// Name:         AXI_B_LAYER_M12_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S0 0




// Name:         AXI_B_LAYER_M12_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S1 0




// Name:         AXI_B_LAYER_M12_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S2 0




// Name:         AXI_B_LAYER_M12_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S3 0




// Name:         AXI_B_LAYER_M12_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S4 0




// Name:         AXI_B_LAYER_M12_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S5 0




// Name:         AXI_B_LAYER_M12_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S6 0




// Name:         AXI_B_LAYER_M12_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S7 0




// Name:         AXI_B_LAYER_M12_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S8 0




// Name:         AXI_B_LAYER_M12_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S9 0




// Name:         AXI_B_LAYER_M12_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S10 0




// Name:         AXI_B_LAYER_M12_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S11 0




// Name:         AXI_B_LAYER_M12_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S12 0




// Name:         AXI_B_LAYER_M12_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S13 0




// Name:         AXI_B_LAYER_M12_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S14 0




// Name:         AXI_B_LAYER_M12_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S15 0




// Name:         AXI_B_LAYER_M12_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M12_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 12. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 12 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 12 burst response channel will only have to compete with  
//  //                    other masters accessing master 12 burst response channel via master 
//  //                    12's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 12 burst response channel (if slaves connect to 
//  //                    master 12 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 12 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    12 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 12 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M12_S16 0




// Name:         AXI_R_LAYER_M13_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S0 0




// Name:         AXI_R_LAYER_M13_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S1 0




// Name:         AXI_R_LAYER_M13_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S2 0




// Name:         AXI_R_LAYER_M13_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S3 0




// Name:         AXI_R_LAYER_M13_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S4 0




// Name:         AXI_R_LAYER_M13_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S5 0




// Name:         AXI_R_LAYER_M13_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S6 0




// Name:         AXI_R_LAYER_M13_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S7 0




// Name:         AXI_R_LAYER_M13_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S8 0




// Name:         AXI_R_LAYER_M13_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S9 0




// Name:         AXI_R_LAYER_M13_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S10 0




// Name:         AXI_R_LAYER_M13_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S11 0




// Name:         AXI_R_LAYER_M13_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S12 0




// Name:         AXI_R_LAYER_M13_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S13 0




// Name:         AXI_R_LAYER_M13_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S14 0




// Name:         AXI_R_LAYER_M13_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S15 0




// Name:         AXI_R_LAYER_M13_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M13_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 13 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 13 read data channel will only have to compete with  
//  //                    other masters accessing master 13 read data channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 read data channel (if slaves connect to 
//  //                    master 13 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 13 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    13 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 13 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M13_S16 0




// Name:         AXI_B_LAYER_M13_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S0 0




// Name:         AXI_B_LAYER_M13_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S1 0




// Name:         AXI_B_LAYER_M13_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S2 0




// Name:         AXI_B_LAYER_M13_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S3 0




// Name:         AXI_B_LAYER_M13_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S4 0




// Name:         AXI_B_LAYER_M13_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S5 0




// Name:         AXI_B_LAYER_M13_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S6 0




// Name:         AXI_B_LAYER_M13_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S7 0




// Name:         AXI_B_LAYER_M13_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S8 0




// Name:         AXI_B_LAYER_M13_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S9 0




// Name:         AXI_B_LAYER_M13_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S10 0




// Name:         AXI_B_LAYER_M13_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S11 0




// Name:         AXI_B_LAYER_M13_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S12 0




// Name:         AXI_B_LAYER_M13_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S13 0




// Name:         AXI_B_LAYER_M13_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S14 0




// Name:         AXI_B_LAYER_M13_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S15 0




// Name:         AXI_B_LAYER_M13_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M13_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 13. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 13 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 13 burst response channel will only have to compete with  
//  //                    other masters accessing master 13 burst response channel via master 
//  //                    13's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 13 burst response channel (if slaves connect to 
//  //                    master 13 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 13 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    13 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 13 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M13_S16 0




// Name:         AXI_R_LAYER_M14_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S0 0




// Name:         AXI_R_LAYER_M14_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S1 0




// Name:         AXI_R_LAYER_M14_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S2 0




// Name:         AXI_R_LAYER_M14_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S3 0




// Name:         AXI_R_LAYER_M14_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S4 0




// Name:         AXI_R_LAYER_M14_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S5 0




// Name:         AXI_R_LAYER_M14_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S6 0




// Name:         AXI_R_LAYER_M14_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S7 0




// Name:         AXI_R_LAYER_M14_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S8 0




// Name:         AXI_R_LAYER_M14_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S9 0




// Name:         AXI_R_LAYER_M14_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S10 0




// Name:         AXI_R_LAYER_M14_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S11 0




// Name:         AXI_R_LAYER_M14_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S12 0




// Name:         AXI_R_LAYER_M14_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S13 0




// Name:         AXI_R_LAYER_M14_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S14 0




// Name:         AXI_R_LAYER_M14_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S15 0




// Name:         AXI_R_LAYER_M14_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M14_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 14 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 14 read data channel will only have to compete with  
//  //                    other masters accessing master 14 read data channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 read data channel (if slaves connect to 
//  //                    master 14 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 14 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    14 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 14 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M14_S16 0




// Name:         AXI_B_LAYER_M14_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S0 0




// Name:         AXI_B_LAYER_M14_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S1 0




// Name:         AXI_B_LAYER_M14_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S2 0




// Name:         AXI_B_LAYER_M14_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S3 0




// Name:         AXI_B_LAYER_M14_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S4 0




// Name:         AXI_B_LAYER_M14_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S5 0




// Name:         AXI_B_LAYER_M14_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S6 0




// Name:         AXI_B_LAYER_M14_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S7 0




// Name:         AXI_B_LAYER_M14_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S8 0




// Name:         AXI_B_LAYER_M14_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S9 0




// Name:         AXI_B_LAYER_M14_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S10 0




// Name:         AXI_B_LAYER_M14_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S11 0




// Name:         AXI_B_LAYER_M14_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S12 0




// Name:         AXI_B_LAYER_M14_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S13 0




// Name:         AXI_B_LAYER_M14_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S14 0




// Name:         AXI_B_LAYER_M14_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S15 0




// Name:         AXI_B_LAYER_M14_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M14_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 14. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 14 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 14 burst response channel will only have to compete with  
//  //                    other masters accessing master 14 burst response channel via master 
//  //                    14's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 14 burst response channel (if slaves connect to 
//  //                    master 14 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 14 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    14 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 14 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M14_S16 0




// Name:         AXI_R_LAYER_M15_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S0 0




// Name:         AXI_R_LAYER_M15_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S1 0




// Name:         AXI_R_LAYER_M15_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S2 0




// Name:         AXI_R_LAYER_M15_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S3 0




// Name:         AXI_R_LAYER_M15_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S4 0




// Name:         AXI_R_LAYER_M15_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S5 0




// Name:         AXI_R_LAYER_M15_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S6 0




// Name:         AXI_R_LAYER_M15_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S7 0




// Name:         AXI_R_LAYER_M15_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S8 0




// Name:         AXI_R_LAYER_M15_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S9 0




// Name:         AXI_R_LAYER_M15_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S10 0




// Name:         AXI_R_LAYER_M15_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S11 0




// Name:         AXI_R_LAYER_M15_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S12 0




// Name:         AXI_R_LAYER_M15_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S13 0




// Name:         AXI_R_LAYER_M15_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S14 0




// Name:         AXI_R_LAYER_M15_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S15 0




// Name:         AXI_R_LAYER_M15_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M15_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 15 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 15 read data channel will only have to compete with  
//  //                    other masters accessing master 15 read data channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 read data channel (if slaves connect to 
//  //                    master 15 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 15 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    15 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 15 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M15_S16 0




// Name:         AXI_B_LAYER_M15_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S0 0




// Name:         AXI_B_LAYER_M15_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S1 0




// Name:         AXI_B_LAYER_M15_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S2 0




// Name:         AXI_B_LAYER_M15_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S3 0




// Name:         AXI_B_LAYER_M15_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S4 0




// Name:         AXI_B_LAYER_M15_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S5 0




// Name:         AXI_B_LAYER_M15_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S6 0




// Name:         AXI_B_LAYER_M15_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S7 0




// Name:         AXI_B_LAYER_M15_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S8 0




// Name:         AXI_B_LAYER_M15_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S9 0




// Name:         AXI_B_LAYER_M15_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S10 0




// Name:         AXI_B_LAYER_M15_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S11 0




// Name:         AXI_B_LAYER_M15_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S12 0




// Name:         AXI_B_LAYER_M15_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S13 0




// Name:         AXI_B_LAYER_M15_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S14 0




// Name:         AXI_B_LAYER_M15_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S15 0




// Name:         AXI_B_LAYER_M15_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M15_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 15. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 15 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 15 burst response channel will only have to compete with  
//  //                    other masters accessing master 15 burst response channel via master 
//  //                    15's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 15 burst response channel (if slaves connect to 
//  //                    master 15 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 15 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    15 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 15 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M15_S16 0




// Name:         AXI_R_LAYER_M16_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 0 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 0 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S0 0




// Name:         AXI_R_LAYER_M16_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 1 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 1 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S1 0




// Name:         AXI_R_LAYER_M16_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 2 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 2 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S2 0




// Name:         AXI_R_LAYER_M16_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 3 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 3 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S3 0




// Name:         AXI_R_LAYER_M16_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 4 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 4 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S4 0




// Name:         AXI_R_LAYER_M16_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 5 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 5 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S5 0




// Name:         AXI_R_LAYER_M16_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 6 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 6 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S6 0




// Name:         AXI_R_LAYER_M16_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 7 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 7 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S7 0




// Name:         AXI_R_LAYER_M16_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 8 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 8 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S8 0




// Name:         AXI_R_LAYER_M16_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 9 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 9 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S9 0




// Name:         AXI_R_LAYER_M16_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 10 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 10 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S10 0




// Name:         AXI_R_LAYER_M16_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 11 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 11 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S11 0




// Name:         AXI_R_LAYER_M16_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 12 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 12 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S12 0




// Name:         AXI_R_LAYER_M16_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 13 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 13 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S13 0




// Name:         AXI_R_LAYER_M16_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 14 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 14 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S14 0




// Name:         AXI_R_LAYER_M16_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 15 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 15 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S15 0




// Name:         AXI_R_LAYER_M16_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_R_LAYER_M16_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the read data channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 16 read data channel connects directly to the  
//  //                    master 16 read data dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 16 read data channel will only have to compete with  
//  //                    other masters accessing master 16 read data channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 read data channel (if slaves connect to 
//  //                    master 16 read data channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // Shared Layer    => Slave 16 read data channel connects to master 16 read data 
//  //                    via a shared read data channel. This means that to access master  
//  //                    16 read data channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters read data channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 16 on the  
//  //                    read data channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_R_LAYER_M16_S16 0




// Name:         AXI_B_LAYER_M16_S0
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S0 :  
//  // Selects which layer slave 0 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 0 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 0 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 0 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 0 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 0 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 0 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S0 0




// Name:         AXI_B_LAYER_M16_S1
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S1 :  
//  // Selects which layer slave 1 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 1 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 1 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 1 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 1 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 1 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 1 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S1 0




// Name:         AXI_B_LAYER_M16_S2
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S2 :  
//  // Selects which layer slave 2 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 2 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 2 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 2 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 2 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 2 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 2 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S2 0




// Name:         AXI_B_LAYER_M16_S3
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S3 :  
//  // Selects which layer slave 3 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 3 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 3 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 3 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 3 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 3 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 3 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S3 0




// Name:         AXI_B_LAYER_M16_S4
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S4 :  
//  // Selects which layer slave 4 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 4 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 4 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 4 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 4 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 4 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 4 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S4 0




// Name:         AXI_B_LAYER_M16_S5
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S5 :  
//  // Selects which layer slave 5 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 5 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 5 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 5 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 5 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 5 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 5 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S5 0




// Name:         AXI_B_LAYER_M16_S6
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S6 :  
//  // Selects which layer slave 6 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 6 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 6 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 6 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 6 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 6 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 6 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S6 0




// Name:         AXI_B_LAYER_M16_S7
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S7 :  
//  // Selects which layer slave 7 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 7 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 7 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 7 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 7 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 7 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 7 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S7 0




// Name:         AXI_B_LAYER_M16_S8
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S8 :  
//  // Selects which layer slave 8 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 8 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 8 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 8 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 8 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 8 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 8 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S8 0




// Name:         AXI_B_LAYER_M16_S9
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S9 :  
//  // Selects which layer slave 9 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 9 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 9 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 9 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 9 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 9 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 9 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S9 0




// Name:         AXI_B_LAYER_M16_S10
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S10 :  
//  // Selects which layer slave 10 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 10 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 10 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 10 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 10 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 10 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 10 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S10 0




// Name:         AXI_B_LAYER_M16_S11
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S11 :  
//  // Selects which layer slave 11 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 11 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 11 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 11 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 11 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 11 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 11 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S11 0




// Name:         AXI_B_LAYER_M16_S12
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S12 :  
//  // Selects which layer slave 12 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 12 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 12 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 12 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 12 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 12 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 12 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S12 0




// Name:         AXI_B_LAYER_M16_S13
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S13 :  
//  // Selects which layer slave 13 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 13 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 13 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 13 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 13 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 13 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 13 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S13 0




// Name:         AXI_B_LAYER_M16_S14
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S14 :  
//  // Selects which layer slave 14 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 14 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 14 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 14 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 14 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 14 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 14 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S14 0




// Name:         AXI_B_LAYER_M16_S15
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S15 :  
//  // Selects which layer slave 15 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 15 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 15 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 15 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 15 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 15 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 15 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S15 0




// Name:         AXI_B_LAYER_M16_S16
// Default:      Dedicated
// Values:       Dedicated (0), Shared (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// AXI_B_LAYER_M16_S16 :  
//  // Selects which layer slave 16 will connect  
//  // to the burst response channel of master port 16. 
//  // 
//  // Dedicated Layer => Slave 16 burst response channel connects directly to the  
//  //                    master 16 burst response dedicated channel.  
//  //                    Connecting via the dedicated channel means slave 16 accessing 
//  //                    master 16 burst response channel will only have to compete with  
//  //                    other masters accessing master 16 burst response channel via master 
//  //                    16's dedicated layer, and with slaves on the shared layer  
//  //                    accessing master 16 burst response channel (if slaves connect to 
//  //                    master 16 burst response channel from both the shared and dedicated  
//  //                    layers. 
//  // 
//  //                    This option should be used when there is a low latency or high bandwidth 
//  //                    requirement between slave 16 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // Shared Layer    => Slave 16 burst response channel connects to master 16 burst response 
//  //                    via a shared burst response channel. This means that to access master  
//  //                    16 burst response channel, slave 16 will have to compete with all 
//  //                    slaves which access any masters burst response channel via the shared layer. 
//  // 
//  //                    This option should be used when there is a high latency or low bandwidth 
//  //                    requirement between slave 16 and master 16 on the  
//  //                    burst response channel. 
//  // 
//  // This parameter is enabled if the presence of a DWC AMBA Fabric package license is detected. 
//  // 
//  // This parameter is disabled if locking sequences are enabled (AXI_HAS_LOCKING == 1). 
//  // 
// 
`define AXI_B_LAYER_M16_S16 0



// Set to 1 if at least 2 slaves use the Read Address channel shared layer.

`define AXI_AR_HAS_SHARED_LAYER 0

// Defined if at least 2 slaves use the Read Address channel shared layer.

// `define AXI_AR_SHARED_LAYER


// Set to 1 if at least 2 slaves use the Write Address channel shared layer.

`define AXI_AW_HAS_SHARED_LAYER 0

// Defined if at least 2 slaves use the Write Address channel shared layer.

// `define AXI_AW_SHARED_LAYER


// Set to 1 if at least 2 slaves use the Write Data channel shared layer.

`define AXI_W_HAS_SHARED_LAYER 0

// Defined if at least 2 slaves use the Write Data channel shared layer.

// `define AXI_W_SHARED_LAYER


// Set to 1 if at least 2 masters use the Read Data channel shared layer.

`define AXI_R_HAS_SHARED_LAYER 0

// Defined if at least 2 masters use the Read Data channel shared layer.

// `define AXI_R_SHARED_LAYER


// Set to 1 if at least 2 masters use the Burst Response channel shared layer.

`define AXI_B_HAS_SHARED_LAYER 0

// Defined if at least 2 masters use the Burst Response channel shared layer.

// `define AXI_B_SHARED_LAYER


// Number of masters that connect to the shared Read Address layer.

`define AXI_AR_SHARED_LAYER_NM 1

// Log base 2 of AXI_AR_SHARED_LAYER_NM
`define AXI_LOG2_AR_SHARED_LAYER_NM 1

// Log base 2 of (AXI_AR_SHARED_LAYER_NM + 1)
`define AXI_LOG2_AR_SHARED_LAYER_NMP1 1

// Number of slaves that connect to the shared Read Address layer.

`define AXI_AR_SHARED_LAYER_NS 1

// Number of slaves that connect to the shared Read Address layer.
// Will be 0 when no shared Read Address exists.

`define AXI_AR_SHARED_LAYER_NS_R0 0


// Log base 2 of AXI_AR_SHARED_LAYER_NS
`define AXI_LOG2_AR_SHARED_LAYER_NS 1

// Log base 2 of (AXI_AR_SHARED_LAYER_NS + 1)
`define AXI_LOG2_AR_SHARED_LAYER_NSP1 1



// Number of masters that connect to the shared Write Address layer.

`define AXI_AW_SHARED_LAYER_NM 1

// Log base 2 of AXI_AW_SHARED_LAYER_NM
`define AXI_LOG2_AW_SHARED_LAYER_NM 1

// Log base 2 of (AXI_AW_SHARED_LAYER_NM + 1)
`define AXI_LOG2_AW_SHARED_LAYER_NMP1 1

// Number of slaves that connect to the shared Write Address layer.

`define AXI_AW_SHARED_LAYER_NS 1

// Number of slaves that connect to the shared Write Address layer.
// Will be 0 when no shared Write Address exists.

`define AXI_AW_SHARED_LAYER_NS_R0 0


// Log base 2 of AXI_AW_SHARED_LAYER_NS
`define AXI_LOG2_AW_SHARED_LAYER_NS 1

// Log base 2 of (AXI_AW_SHARED_LAYER_NS + 1)
`define AXI_LOG2_AW_SHARED_LAYER_NSP1 1



// Number of masters that connect to the shared Write Data layer.

`define AXI_W_SHARED_LAYER_NM 1

// Log base 2 of AXI_W_SHARED_LAYER_NM
`define AXI_LOG2_W_SHARED_LAYER_NM 1

// Log base 2 of (AXI_W_SHARED_LAYER_NM + 1)
`define AXI_LOG2_W_SHARED_LAYER_NMP1 1

// Number of slaves that connect to the shared Write Data layer.

`define AXI_W_SHARED_LAYER_NS 1

// Number of slaves that connect to the shared Write Data layer.
// Will be 0 when no shared Write Data exists.

`define AXI_W_SHARED_LAYER_NS_R0 0


// Log base 2 of AXI_W_SHARED_LAYER_NS
`define AXI_LOG2_W_SHARED_LAYER_NS 1

// Log base 2 of (AXI_W_SHARED_LAYER_NS + 1)
`define AXI_LOG2_W_SHARED_LAYER_NSP1 1



// Number of masters that connect to the shared Read Data layer.

`define AXI_R_SHARED_LAYER_NM 1

// Number of masters that connect to the shared Read Data layer.
// Can be 0 if no shared Read Data exists.

`define AXI_R_SHARED_LAYER_NM_R0 0


// Log base 2 of AXI_R_SHARED_LAYER_NM
`define AXI_LOG2_R_SHARED_LAYER_NM 1

// Log base 2 of (AXI_R_SHARED_LAYER_NM + 1)
`define AXI_LOG2_R_SHARED_LAYER_NMP1 1

// Number of slaves that connect to the shared Read Data layer.

`define AXI_R_SHARED_LAYER_NS 1

// Log base 2 of AXI_R_SHARED_LAYER_NS
`define AXI_LOG2_R_SHARED_LAYER_NS 1

// Log base 2 of (AXI_R_SHARED_LAYER_NS + 1)
`define AXI_LOG2_R_SHARED_LAYER_NSP1 1



// Number of masters that connect to the shared Burst Response layer.

`define AXI_B_SHARED_LAYER_NM 1

// Number of masters that connect to the shared Burst Response layer.
// Can be 0 if no shared Burst Response exists.

`define AXI_B_SHARED_LAYER_NM_R0 0


// Log base 2 of AXI_B_SHARED_LAYER_NM
`define AXI_LOG2_B_SHARED_LAYER_NM 1

// Log base 2 of (AXI_B_SHARED_LAYER_NM + 1)
`define AXI_LOG2_B_SHARED_LAYER_NMP1 1

// Number of slaves that connect to the shared Burst Response layer.

`define AXI_B_SHARED_LAYER_NS 1

// Log base 2 of AXI_B_SHARED_LAYER_NS
`define AXI_LOG2_B_SHARED_LAYER_NS 1

// Log base 2 of (AXI_B_SHARED_LAYER_NS + 1)
`define AXI_LOG2_B_SHARED_LAYER_NSP1 1



// Defined if the shared master port block is required.
// i.e. if shared R or B channels are required.

// 1 if AXI_HAS_SHARED_MP is defined.

// Defined if the shared slave port block is required.
// i.e. if shared AR, AW or W channels are required.




// Derived parameter, defined when some masters connect to slave 0
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 0 dedicated read address 
// channel block.

`define AXI_AR_S0_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S0_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S0_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 0 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S0_NMV 2

// Log base 2 of AXI_AR_S0_NMV.
`define AXI_AR_S0_NMV_LOG2 1

// Log base 2 of (AXI_AR_S0_NMV + 1).
`define AXI_AR_S0_NMV_P1_LOG2 2




// Derived parameter, defined when some masters connect to slave 0
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 0 dedicated write address 
// channel block.

`define AXI_AW_S0_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S0_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S0_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 0 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S0_NMV 2

// Log base 2 of AXI_AW_S0_NMV.
`define AXI_AW_S0_NMV_LOG2 1

// Log base 2 of (AXI_AW_S0_NMV + 1).
`define AXI_AW_S0_NMV_P1_LOG2 2




// Derived parameter, defined when some masters connect to slave 0
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 0 dedicated write data 
// channel block.

`define AXI_W_S0_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S0_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S0_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 0 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S0_NMV 2

// Log base 2 of AXI_W_S0_NMV.
`define AXI_W_S0_NMV_LOG2 1

// Log base 2 of (AXI_W_S0_NMV + 1).
`define AXI_W_S0_NMV_P1_LOG2 2




// Derived parameter, defined when some masters connect to slave 1
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 1 dedicated read address 
// channel block.

`define AXI_AR_S1_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S1_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S1_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 1 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S1_NMV 2

// Log base 2 of AXI_AR_S1_NMV.
`define AXI_AR_S1_NMV_LOG2 1

// Log base 2 of (AXI_AR_S1_NMV + 1).
`define AXI_AR_S1_NMV_P1_LOG2 2




// Derived parameter, defined when some masters connect to slave 1
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 1 dedicated write address 
// channel block.

`define AXI_AW_S1_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S1_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S1_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 1 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S1_NMV 2

// Log base 2 of AXI_AW_S1_NMV.
`define AXI_AW_S1_NMV_LOG2 1

// Log base 2 of (AXI_AW_S1_NMV + 1).
`define AXI_AW_S1_NMV_P1_LOG2 2




// Derived parameter, defined when some masters connect to slave 1
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 1 dedicated write data 
// channel block.

`define AXI_W_S1_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S1_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S1_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 1 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S1_NMV 2

// Log base 2 of AXI_W_S1_NMV.
`define AXI_W_S1_NMV_LOG2 1

// Log base 2 of (AXI_W_S1_NMV + 1).
`define AXI_W_S1_NMV_P1_LOG2 2




// Derived parameter, defined when some masters connect to slave 2
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 2 dedicated read address 
// channel block.

`define AXI_AR_S2_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S2_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S2_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 2 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S2_NMV 1

// Log base 2 of AXI_AR_S2_NMV.
`define AXI_AR_S2_NMV_LOG2 1

// Log base 2 of (AXI_AR_S2_NMV + 1).
`define AXI_AR_S2_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 2
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 2 dedicated write address 
// channel block.

`define AXI_AW_S2_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S2_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S2_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 2 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S2_NMV 1

// Log base 2 of AXI_AW_S2_NMV.
`define AXI_AW_S2_NMV_LOG2 1

// Log base 2 of (AXI_AW_S2_NMV + 1).
`define AXI_AW_S2_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 2
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 2 dedicated write data 
// channel block.

`define AXI_W_S2_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S2_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S2_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 2 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S2_NMV 1

// Log base 2 of AXI_W_S2_NMV.
`define AXI_W_S2_NMV_LOG2 1

// Log base 2 of (AXI_W_S2_NMV + 1).
`define AXI_W_S2_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 3
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 3 dedicated read address 
// channel block.

`define AXI_AR_S3_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S3_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S3_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 3 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S3_NMV 1

// Log base 2 of AXI_AR_S3_NMV.
`define AXI_AR_S3_NMV_LOG2 1

// Log base 2 of (AXI_AR_S3_NMV + 1).
`define AXI_AR_S3_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 3
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 3 dedicated write address 
// channel block.

`define AXI_AW_S3_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S3_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S3_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 3 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S3_NMV 1

// Log base 2 of AXI_AW_S3_NMV.
`define AXI_AW_S3_NMV_LOG2 1

// Log base 2 of (AXI_AW_S3_NMV + 1).
`define AXI_AW_S3_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 3
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 3 dedicated write data 
// channel block.

`define AXI_W_S3_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S3_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S3_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 3 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S3_NMV 1

// Log base 2 of AXI_W_S3_NMV.
`define AXI_W_S3_NMV_LOG2 1

// Log base 2 of (AXI_W_S3_NMV + 1).
`define AXI_W_S3_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 4
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 4 dedicated read address 
// channel block.

`define AXI_AR_S4_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S4_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S4_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 4 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S4_NMV 1

// Log base 2 of AXI_AR_S4_NMV.
`define AXI_AR_S4_NMV_LOG2 1

// Log base 2 of (AXI_AR_S4_NMV + 1).
`define AXI_AR_S4_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 4
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 4 dedicated write address 
// channel block.

`define AXI_AW_S4_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S4_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S4_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 4 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S4_NMV 1

// Log base 2 of AXI_AW_S4_NMV.
`define AXI_AW_S4_NMV_LOG2 1

// Log base 2 of (AXI_AW_S4_NMV + 1).
`define AXI_AW_S4_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 4
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 4 dedicated write data 
// channel block.

`define AXI_W_S4_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S4_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S4_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 4 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S4_NMV 1

// Log base 2 of AXI_W_S4_NMV.
`define AXI_W_S4_NMV_LOG2 1

// Log base 2 of (AXI_W_S4_NMV + 1).
`define AXI_W_S4_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 5
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 5 dedicated read address 
// channel block.

`define AXI_AR_S5_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S5_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S5_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 5 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S5_NMV 1

// Log base 2 of AXI_AR_S5_NMV.
`define AXI_AR_S5_NMV_LOG2 1

// Log base 2 of (AXI_AR_S5_NMV + 1).
`define AXI_AR_S5_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 5
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 5 dedicated write address 
// channel block.

`define AXI_AW_S5_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S5_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S5_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 5 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S5_NMV 1

// Log base 2 of AXI_AW_S5_NMV.
`define AXI_AW_S5_NMV_LOG2 1

// Log base 2 of (AXI_AW_S5_NMV + 1).
`define AXI_AW_S5_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 5
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 5 dedicated write data 
// channel block.

`define AXI_W_S5_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S5_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S5_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 5 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S5_NMV 1

// Log base 2 of AXI_W_S5_NMV.
`define AXI_W_S5_NMV_LOG2 1

// Log base 2 of (AXI_W_S5_NMV + 1).
`define AXI_W_S5_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 6
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 6 dedicated read address 
// channel block.

`define AXI_AR_S6_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S6_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S6_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 6 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S6_NMV 1

// Log base 2 of AXI_AR_S6_NMV.
`define AXI_AR_S6_NMV_LOG2 1

// Log base 2 of (AXI_AR_S6_NMV + 1).
`define AXI_AR_S6_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 6
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 6 dedicated write address 
// channel block.

`define AXI_AW_S6_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S6_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S6_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 6 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S6_NMV 1

// Log base 2 of AXI_AW_S6_NMV.
`define AXI_AW_S6_NMV_LOG2 1

// Log base 2 of (AXI_AW_S6_NMV + 1).
`define AXI_AW_S6_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 6
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 6 dedicated write data 
// channel block.

`define AXI_W_S6_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S6_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S6_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 6 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S6_NMV 1

// Log base 2 of AXI_W_S6_NMV.
`define AXI_W_S6_NMV_LOG2 1

// Log base 2 of (AXI_W_S6_NMV + 1).
`define AXI_W_S6_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 7
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 7 dedicated read address 
// channel block.

`define AXI_AR_S7_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S7_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S7_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 7 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S7_NMV 1

// Log base 2 of AXI_AR_S7_NMV.
`define AXI_AR_S7_NMV_LOG2 1

// Log base 2 of (AXI_AR_S7_NMV + 1).
`define AXI_AR_S7_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 7
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 7 dedicated write address 
// channel block.

`define AXI_AW_S7_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S7_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S7_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 7 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S7_NMV 1

// Log base 2 of AXI_AW_S7_NMV.
`define AXI_AW_S7_NMV_LOG2 1

// Log base 2 of (AXI_AW_S7_NMV + 1).
`define AXI_AW_S7_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 7
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 7 dedicated write data 
// channel block.

`define AXI_W_S7_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S7_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S7_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 7 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S7_NMV 1

// Log base 2 of AXI_W_S7_NMV.
`define AXI_W_S7_NMV_LOG2 1

// Log base 2 of (AXI_W_S7_NMV + 1).
`define AXI_W_S7_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 8
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 8 dedicated read address 
// channel block.

`define AXI_AR_S8_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S8_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S8_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 8 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S8_NMV 1

// Log base 2 of AXI_AR_S8_NMV.
`define AXI_AR_S8_NMV_LOG2 1

// Log base 2 of (AXI_AR_S8_NMV + 1).
`define AXI_AR_S8_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 8
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 8 dedicated write address 
// channel block.

`define AXI_AW_S8_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S8_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S8_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 8 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S8_NMV 1

// Log base 2 of AXI_AW_S8_NMV.
`define AXI_AW_S8_NMV_LOG2 1

// Log base 2 of (AXI_AW_S8_NMV + 1).
`define AXI_AW_S8_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 8
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 8 dedicated write data 
// channel block.

`define AXI_W_S8_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S8_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S8_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 8 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S8_NMV 1

// Log base 2 of AXI_W_S8_NMV.
`define AXI_W_S8_NMV_LOG2 1

// Log base 2 of (AXI_W_S8_NMV + 1).
`define AXI_W_S8_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 9
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 9 dedicated read address 
// channel block.

`define AXI_AR_S9_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S9_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S9_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 9 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S9_NMV 1

// Log base 2 of AXI_AR_S9_NMV.
`define AXI_AR_S9_NMV_LOG2 1

// Log base 2 of (AXI_AR_S9_NMV + 1).
`define AXI_AR_S9_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 9
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 9 dedicated write address 
// channel block.

`define AXI_AW_S9_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S9_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S9_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 9 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S9_NMV 1

// Log base 2 of AXI_AW_S9_NMV.
`define AXI_AW_S9_NMV_LOG2 1

// Log base 2 of (AXI_AW_S9_NMV + 1).
`define AXI_AW_S9_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 9
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 9 dedicated write data 
// channel block.

`define AXI_W_S9_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S9_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S9_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 9 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S9_NMV 1

// Log base 2 of AXI_W_S9_NMV.
`define AXI_W_S9_NMV_LOG2 1

// Log base 2 of (AXI_W_S9_NMV + 1).
`define AXI_W_S9_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 10
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 10 dedicated read address 
// channel block.

`define AXI_AR_S10_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S10_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S10_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 10 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S10_NMV 1

// Log base 2 of AXI_AR_S10_NMV.
`define AXI_AR_S10_NMV_LOG2 1

// Log base 2 of (AXI_AR_S10_NMV + 1).
`define AXI_AR_S10_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 10
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 10 dedicated write address 
// channel block.

`define AXI_AW_S10_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S10_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S10_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 10 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S10_NMV 1

// Log base 2 of AXI_AW_S10_NMV.
`define AXI_AW_S10_NMV_LOG2 1

// Log base 2 of (AXI_AW_S10_NMV + 1).
`define AXI_AW_S10_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 10
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 10 dedicated write data 
// channel block.

`define AXI_W_S10_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S10_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S10_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 10 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S10_NMV 1

// Log base 2 of AXI_W_S10_NMV.
`define AXI_W_S10_NMV_LOG2 1

// Log base 2 of (AXI_W_S10_NMV + 1).
`define AXI_W_S10_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 11
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 11 dedicated read address 
// channel block.

`define AXI_AR_S11_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S11_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S11_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 11 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S11_NMV 1

// Log base 2 of AXI_AR_S11_NMV.
`define AXI_AR_S11_NMV_LOG2 1

// Log base 2 of (AXI_AR_S11_NMV + 1).
`define AXI_AR_S11_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 11
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 11 dedicated write address 
// channel block.

`define AXI_AW_S11_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S11_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S11_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 11 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S11_NMV 1

// Log base 2 of AXI_AW_S11_NMV.
`define AXI_AW_S11_NMV_LOG2 1

// Log base 2 of (AXI_AW_S11_NMV + 1).
`define AXI_AW_S11_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 11
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 11 dedicated write data 
// channel block.

`define AXI_W_S11_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S11_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S11_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 11 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S11_NMV 1

// Log base 2 of AXI_W_S11_NMV.
`define AXI_W_S11_NMV_LOG2 1

// Log base 2 of (AXI_W_S11_NMV + 1).
`define AXI_W_S11_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 12
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 12 dedicated read address 
// channel block.

`define AXI_AR_S12_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S12_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S12_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 12 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S12_NMV 1

// Log base 2 of AXI_AR_S12_NMV.
`define AXI_AR_S12_NMV_LOG2 1

// Log base 2 of (AXI_AR_S12_NMV + 1).
`define AXI_AR_S12_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 12
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 12 dedicated write address 
// channel block.

`define AXI_AW_S12_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S12_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S12_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 12 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S12_NMV 1

// Log base 2 of AXI_AW_S12_NMV.
`define AXI_AW_S12_NMV_LOG2 1

// Log base 2 of (AXI_AW_S12_NMV + 1).
`define AXI_AW_S12_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 12
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 12 dedicated write data 
// channel block.

`define AXI_W_S12_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S12_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S12_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 12 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S12_NMV 1

// Log base 2 of AXI_W_S12_NMV.
`define AXI_W_S12_NMV_LOG2 1

// Log base 2 of (AXI_W_S12_NMV + 1).
`define AXI_W_S12_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 13
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 13 dedicated read address 
// channel block.

`define AXI_AR_S13_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S13_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S13_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 13 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S13_NMV 1

// Log base 2 of AXI_AR_S13_NMV.
`define AXI_AR_S13_NMV_LOG2 1

// Log base 2 of (AXI_AR_S13_NMV + 1).
`define AXI_AR_S13_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 13
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 13 dedicated write address 
// channel block.

`define AXI_AW_S13_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S13_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S13_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 13 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S13_NMV 1

// Log base 2 of AXI_AW_S13_NMV.
`define AXI_AW_S13_NMV_LOG2 1

// Log base 2 of (AXI_AW_S13_NMV + 1).
`define AXI_AW_S13_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 13
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 13 dedicated write data 
// channel block.

`define AXI_W_S13_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S13_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S13_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 13 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S13_NMV 1

// Log base 2 of AXI_W_S13_NMV.
`define AXI_W_S13_NMV_LOG2 1

// Log base 2 of (AXI_W_S13_NMV + 1).
`define AXI_W_S13_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 14
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 14 dedicated read address 
// channel block.

`define AXI_AR_S14_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S14_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S14_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 14 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S14_NMV 1

// Log base 2 of AXI_AR_S14_NMV.
`define AXI_AR_S14_NMV_LOG2 1

// Log base 2 of (AXI_AR_S14_NMV + 1).
`define AXI_AR_S14_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 14
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 14 dedicated write address 
// channel block.

`define AXI_AW_S14_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S14_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S14_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 14 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S14_NMV 1

// Log base 2 of AXI_AW_S14_NMV.
`define AXI_AW_S14_NMV_LOG2 1

// Log base 2 of (AXI_AW_S14_NMV + 1).
`define AXI_AW_S14_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 14
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 14 dedicated write data 
// channel block.

`define AXI_W_S14_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S14_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S14_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 14 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S14_NMV 1

// Log base 2 of AXI_W_S14_NMV.
`define AXI_W_S14_NMV_LOG2 1

// Log base 2 of (AXI_W_S14_NMV + 1).
`define AXI_W_S14_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 15
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 15 dedicated read address 
// channel block.

`define AXI_AR_S15_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S15_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S15_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 15 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S15_NMV 1

// Log base 2 of AXI_AR_S15_NMV.
`define AXI_AR_S15_NMV_LOG2 1

// Log base 2 of (AXI_AR_S15_NMV + 1).
`define AXI_AR_S15_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 15
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 15 dedicated write address 
// channel block.

`define AXI_AW_S15_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S15_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S15_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 15 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S15_NMV 1

// Log base 2 of AXI_AW_S15_NMV.
`define AXI_AW_S15_NMV_LOG2 1

// Log base 2 of (AXI_AW_S15_NMV + 1).
`define AXI_AW_S15_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 15
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 15 dedicated write data 
// channel block.

`define AXI_W_S15_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S15_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S15_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 15 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S15_NMV 1

// Log base 2 of AXI_W_S15_NMV.
`define AXI_W_S15_NMV_LOG2 1

// Log base 2 of (AXI_W_S15_NMV + 1).
`define AXI_W_S15_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 16
// read address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read address channel and the slave 16 dedicated read address 
// channel block.

`define AXI_AR_S16_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AR_S16_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AR_S16_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 16 on the read address channel,
// including the shared to dedicated link if it exists.

`define AXI_AR_S16_NMV 1

// Log base 2 of AXI_AR_S16_NMV.
`define AXI_AR_S16_NMV_LOG2 1

// Log base 2 of (AXI_AR_S16_NMV + 1).
`define AXI_AR_S16_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 16
// write address channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write address channel and the slave 16 dedicated write address 
// channel block.

`define AXI_AW_S16_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_AW_S16_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_AW_S16_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 16 on the write address channel,
// including the shared to dedicated link if it exists.

`define AXI_AW_S16_NMV 1

// Log base 2 of AXI_AW_S16_NMV.
`define AXI_AW_S16_NMV_LOG2 1

// Log base 2 of (AXI_AW_S16_NMV + 1).
`define AXI_AW_S16_NMV_P1_LOG2 1




// Derived parameter, defined when some masters connect to slave 16
// write data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// write data channel and the slave 16 dedicated write data 
// channel block.

`define AXI_W_S16_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_W_S16_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_W_S16_HAS_SHRD_DDCTD_LNK

// Number of masters visible to slave 16 on the write data channel,
// including the shared to dedicated link if it exists.

`define AXI_W_S16_NMV 1

// Log base 2 of AXI_W_S16_NMV.
`define AXI_W_S16_NMV_LOG2 1

// Log base 2 of (AXI_W_S16_NMV + 1).
`define AXI_W_S16_NMV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 1
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 1 dedicated read data channel block.

`define AXI_R_M1_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M1_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M1_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 1 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M1_NSV 2

// Log base 2 of AXI_R_M1_NMV.
`define AXI_R_M1_NSV_LOG2 1

// Log base 2 of (AXI_R_M1_NMV + 1).
`define AXI_R_M1_NSV_P1_LOG2 2



// Derived parameter, defined when some slaves connect to master 1
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 1 dedicated burst response channel block.

`define AXI_B_M1_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M1_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M1_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 1 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M1_NSV 2

// Log base 2 of AXI_B_M1_NMV.
`define AXI_B_M1_NSV_LOG2 1

// Log base 2 of (AXI_B_M1_NMV + 1).
`define AXI_B_M1_NSV_P1_LOG2 2



// Derived parameter, defined when some slaves connect to master 2
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 2 dedicated read data channel block.

`define AXI_R_M2_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M2_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M2_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 2 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M2_NSV 2

// Log base 2 of AXI_R_M2_NMV.
`define AXI_R_M2_NSV_LOG2 1

// Log base 2 of (AXI_R_M2_NMV + 1).
`define AXI_R_M2_NSV_P1_LOG2 2



// Derived parameter, defined when some slaves connect to master 2
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 2 dedicated burst response channel block.

`define AXI_B_M2_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M2_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M2_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 2 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M2_NSV 2

// Log base 2 of AXI_B_M2_NMV.
`define AXI_B_M2_NSV_LOG2 1

// Log base 2 of (AXI_B_M2_NMV + 1).
`define AXI_B_M2_NSV_P1_LOG2 2



// Derived parameter, defined when some slaves connect to master 3
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 3 dedicated read data channel block.

`define AXI_R_M3_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M3_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M3_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 3 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M3_NSV 1

// Log base 2 of AXI_R_M3_NMV.
`define AXI_R_M3_NSV_LOG2 1

// Log base 2 of (AXI_R_M3_NMV + 1).
`define AXI_R_M3_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 3
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 3 dedicated burst response channel block.

`define AXI_B_M3_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M3_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M3_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 3 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M3_NSV 1

// Log base 2 of AXI_B_M3_NMV.
`define AXI_B_M3_NSV_LOG2 1

// Log base 2 of (AXI_B_M3_NMV + 1).
`define AXI_B_M3_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 4
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 4 dedicated read data channel block.

`define AXI_R_M4_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M4_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M4_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 4 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M4_NSV 1

// Log base 2 of AXI_R_M4_NMV.
`define AXI_R_M4_NSV_LOG2 1

// Log base 2 of (AXI_R_M4_NMV + 1).
`define AXI_R_M4_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 4
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 4 dedicated burst response channel block.

`define AXI_B_M4_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M4_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M4_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 4 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M4_NSV 1

// Log base 2 of AXI_B_M4_NMV.
`define AXI_B_M4_NSV_LOG2 1

// Log base 2 of (AXI_B_M4_NMV + 1).
`define AXI_B_M4_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 5
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 5 dedicated read data channel block.

`define AXI_R_M5_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M5_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M5_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 5 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M5_NSV 1

// Log base 2 of AXI_R_M5_NMV.
`define AXI_R_M5_NSV_LOG2 1

// Log base 2 of (AXI_R_M5_NMV + 1).
`define AXI_R_M5_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 5
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 5 dedicated burst response channel block.

`define AXI_B_M5_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M5_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M5_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 5 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M5_NSV 1

// Log base 2 of AXI_B_M5_NMV.
`define AXI_B_M5_NSV_LOG2 1

// Log base 2 of (AXI_B_M5_NMV + 1).
`define AXI_B_M5_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 6
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 6 dedicated read data channel block.

`define AXI_R_M6_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M6_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M6_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 6 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M6_NSV 1

// Log base 2 of AXI_R_M6_NMV.
`define AXI_R_M6_NSV_LOG2 1

// Log base 2 of (AXI_R_M6_NMV + 1).
`define AXI_R_M6_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 6
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 6 dedicated burst response channel block.

`define AXI_B_M6_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M6_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M6_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 6 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M6_NSV 1

// Log base 2 of AXI_B_M6_NMV.
`define AXI_B_M6_NSV_LOG2 1

// Log base 2 of (AXI_B_M6_NMV + 1).
`define AXI_B_M6_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 7
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 7 dedicated read data channel block.

`define AXI_R_M7_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M7_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M7_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 7 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M7_NSV 1

// Log base 2 of AXI_R_M7_NMV.
`define AXI_R_M7_NSV_LOG2 1

// Log base 2 of (AXI_R_M7_NMV + 1).
`define AXI_R_M7_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 7
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 7 dedicated burst response channel block.

`define AXI_B_M7_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M7_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M7_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 7 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M7_NSV 1

// Log base 2 of AXI_B_M7_NMV.
`define AXI_B_M7_NSV_LOG2 1

// Log base 2 of (AXI_B_M7_NMV + 1).
`define AXI_B_M7_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 8
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 8 dedicated read data channel block.

`define AXI_R_M8_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M8_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M8_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 8 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M8_NSV 1

// Log base 2 of AXI_R_M8_NMV.
`define AXI_R_M8_NSV_LOG2 1

// Log base 2 of (AXI_R_M8_NMV + 1).
`define AXI_R_M8_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 8
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 8 dedicated burst response channel block.

`define AXI_B_M8_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M8_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M8_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 8 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M8_NSV 1

// Log base 2 of AXI_B_M8_NMV.
`define AXI_B_M8_NSV_LOG2 1

// Log base 2 of (AXI_B_M8_NMV + 1).
`define AXI_B_M8_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 9
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 9 dedicated read data channel block.

`define AXI_R_M9_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M9_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M9_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 9 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M9_NSV 1

// Log base 2 of AXI_R_M9_NMV.
`define AXI_R_M9_NSV_LOG2 1

// Log base 2 of (AXI_R_M9_NMV + 1).
`define AXI_R_M9_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 9
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 9 dedicated burst response channel block.

`define AXI_B_M9_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M9_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M9_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 9 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M9_NSV 1

// Log base 2 of AXI_B_M9_NMV.
`define AXI_B_M9_NSV_LOG2 1

// Log base 2 of (AXI_B_M9_NMV + 1).
`define AXI_B_M9_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 10
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 10 dedicated read data channel block.

`define AXI_R_M10_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M10_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M10_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 10 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M10_NSV 1

// Log base 2 of AXI_R_M10_NMV.
`define AXI_R_M10_NSV_LOG2 1

// Log base 2 of (AXI_R_M10_NMV + 1).
`define AXI_R_M10_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 10
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 10 dedicated burst response channel block.

`define AXI_B_M10_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M10_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M10_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 10 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M10_NSV 1

// Log base 2 of AXI_B_M10_NMV.
`define AXI_B_M10_NSV_LOG2 1

// Log base 2 of (AXI_B_M10_NMV + 1).
`define AXI_B_M10_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 11
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 11 dedicated read data channel block.

`define AXI_R_M11_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M11_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M11_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 11 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M11_NSV 1

// Log base 2 of AXI_R_M11_NMV.
`define AXI_R_M11_NSV_LOG2 1

// Log base 2 of (AXI_R_M11_NMV + 1).
`define AXI_R_M11_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 11
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 11 dedicated burst response channel block.

`define AXI_B_M11_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M11_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M11_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 11 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M11_NSV 1

// Log base 2 of AXI_B_M11_NMV.
`define AXI_B_M11_NSV_LOG2 1

// Log base 2 of (AXI_B_M11_NMV + 1).
`define AXI_B_M11_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 12
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 12 dedicated read data channel block.

`define AXI_R_M12_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M12_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M12_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 12 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M12_NSV 1

// Log base 2 of AXI_R_M12_NMV.
`define AXI_R_M12_NSV_LOG2 1

// Log base 2 of (AXI_R_M12_NMV + 1).
`define AXI_R_M12_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 12
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 12 dedicated burst response channel block.

`define AXI_B_M12_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M12_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M12_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 12 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M12_NSV 1

// Log base 2 of AXI_B_M12_NMV.
`define AXI_B_M12_NSV_LOG2 1

// Log base 2 of (AXI_B_M12_NMV + 1).
`define AXI_B_M12_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 13
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 13 dedicated read data channel block.

`define AXI_R_M13_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M13_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M13_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 13 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M13_NSV 1

// Log base 2 of AXI_R_M13_NMV.
`define AXI_R_M13_NSV_LOG2 1

// Log base 2 of (AXI_R_M13_NMV + 1).
`define AXI_R_M13_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 13
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 13 dedicated burst response channel block.

`define AXI_B_M13_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M13_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M13_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 13 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M13_NSV 1

// Log base 2 of AXI_B_M13_NMV.
`define AXI_B_M13_NSV_LOG2 1

// Log base 2 of (AXI_B_M13_NMV + 1).
`define AXI_B_M13_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 14
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 14 dedicated read data channel block.

`define AXI_R_M14_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M14_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M14_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 14 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M14_NSV 1

// Log base 2 of AXI_R_M14_NMV.
`define AXI_R_M14_NSV_LOG2 1

// Log base 2 of (AXI_R_M14_NMV + 1).
`define AXI_R_M14_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 14
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 14 dedicated burst response channel block.

`define AXI_B_M14_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M14_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M14_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 14 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M14_NSV 1

// Log base 2 of AXI_B_M14_NMV.
`define AXI_B_M14_NSV_LOG2 1

// Log base 2 of (AXI_B_M14_NMV + 1).
`define AXI_B_M14_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 15
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 15 dedicated read data channel block.

`define AXI_R_M15_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M15_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M15_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 15 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M15_NSV 1

// Log base 2 of AXI_R_M15_NMV.
`define AXI_R_M15_NSV_LOG2 1

// Log base 2 of (AXI_R_M15_NMV + 1).
`define AXI_R_M15_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 15
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 15 dedicated burst response channel block.

`define AXI_B_M15_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M15_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M15_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 15 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M15_NSV 1

// Log base 2 of AXI_B_M15_NMV.
`define AXI_B_M15_NSV_LOG2 1

// Log base 2 of (AXI_B_M15_NMV + 1).
`define AXI_B_M15_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 16
// read data channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// read data channel and the master 16 dedicated read data channel block.

`define AXI_R_M16_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_R_M16_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_R_M16_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 16 on the read data channel,
// including the shared to dedicated link if it exists.

`define AXI_R_M16_NSV 1

// Log base 2 of AXI_R_M16_NMV.
`define AXI_R_M16_NSV_LOG2 1

// Log base 2 of (AXI_R_M16_NMV + 1).
`define AXI_R_M16_NSV_P1_LOG2 1



// Derived parameter, defined when some slaves connect to master 16
// burst response channel through its dedicated channel, and some connect 
// through the shared channel. This infers a link between the shared 
// burst response channel and the master 16 dedicated burst response channel block.

`define AXI_B_M16_HAS_SHRD_DDCTD_LNK_VAL 0

// Defined when AXI_B_M16_HAS_SHRD_DDCTD_LNK_VAL == 1.

// `define AXI_B_M16_HAS_SHRD_DDCTD_LNK

// Number of slaves visible to master 16 on the burst response channel,
// including the shared to dedicated link if it exists.

`define AXI_B_M16_NSV 1

// Log base 2 of AXI_B_M16_NMV.
`define AXI_B_M16_NSV_LOG2 1

// Log base 2 of (AXI_B_M16_NMV + 1).
`define AXI_B_M16_NSV_P1_LOG2 1



// Defined if master 1 connects to the shared read address channel.

// 1 if master 1 connects to the shared read address channel.

`define AXI_M1_ON_AR_SHARED_VAL 0



// Defined if master 2 connects to the shared read address channel.

// 1 if master 2 connects to the shared read address channel.

`define AXI_M2_ON_AR_SHARED_VAL 0



// Defined if master 3 connects to the shared read address channel.

// 1 if master 3 connects to the shared read address channel.

`define AXI_M3_ON_AR_SHARED_VAL 0



// Defined if master 4 connects to the shared read address channel.

// 1 if master 4 connects to the shared read address channel.

`define AXI_M4_ON_AR_SHARED_VAL 0



// Defined if master 5 connects to the shared read address channel.

// 1 if master 5 connects to the shared read address channel.

`define AXI_M5_ON_AR_SHARED_VAL 0



// Defined if master 6 connects to the shared read address channel.

// 1 if master 6 connects to the shared read address channel.

`define AXI_M6_ON_AR_SHARED_VAL 0



// Defined if master 7 connects to the shared read address channel.

// 1 if master 7 connects to the shared read address channel.

`define AXI_M7_ON_AR_SHARED_VAL 0



// Defined if master 8 connects to the shared read address channel.

// 1 if master 8 connects to the shared read address channel.

`define AXI_M8_ON_AR_SHARED_VAL 0



// Defined if master 9 connects to the shared read address channel.

// 1 if master 9 connects to the shared read address channel.

`define AXI_M9_ON_AR_SHARED_VAL 0



// Defined if master 10 connects to the shared read address channel.

// 1 if master 10 connects to the shared read address channel.

`define AXI_M10_ON_AR_SHARED_VAL 0



// Defined if master 11 connects to the shared read address channel.

// 1 if master 11 connects to the shared read address channel.

`define AXI_M11_ON_AR_SHARED_VAL 0



// Defined if master 12 connects to the shared read address channel.

// 1 if master 12 connects to the shared read address channel.

`define AXI_M12_ON_AR_SHARED_VAL 0



// Defined if master 13 connects to the shared read address channel.

// 1 if master 13 connects to the shared read address channel.

`define AXI_M13_ON_AR_SHARED_VAL 0



// Defined if master 14 connects to the shared read address channel.

// 1 if master 14 connects to the shared read address channel.

`define AXI_M14_ON_AR_SHARED_VAL 0



// Defined if master 15 connects to the shared read address channel.

// 1 if master 15 connects to the shared read address channel.

`define AXI_M15_ON_AR_SHARED_VAL 0



// Defined if master 16 connects to the shared read address channel.

// 1 if master 16 connects to the shared read address channel.

`define AXI_M16_ON_AR_SHARED_VAL 0



// Defined if slave 0 connects to the shared read address channel.

// 1 if slave 0 connects to the shared read address channel.

`define AXI_S0_ON_AR_SHARED_VAL 0

// Defined if slave 0 connects to only the shared read address channel.

// `define AXI_S0_ON_AR_SHARED_ONLY

// 1 if slave 0 connects to only the shared read address channel.

`define AXI_S0_ON_AR_SHARED_ONLY_VAL 0



// Defined if slave 1 connects to the shared read address channel.

// 1 if slave 1 connects to the shared read address channel.

`define AXI_S1_ON_AR_SHARED_VAL 0

// Defined if slave 1 connects to only the shared read address channel.

// `define AXI_S1_ON_AR_SHARED_ONLY

// 1 if slave 1 connects to only the shared read address channel.

`define AXI_S1_ON_AR_SHARED_ONLY_VAL 0



// Defined if slave 2 connects to the shared read address channel.

// 1 if slave 2 connects to the shared read address channel.

`define AXI_S2_ON_AR_SHARED_VAL 0

// Defined if slave 2 connects to only the shared read address channel.

`define AXI_S2_ON_AR_SHARED_ONLY

// 1 if slave 2 connects to only the shared read address channel.

`define AXI_S2_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 3 connects to the shared read address channel.

// 1 if slave 3 connects to the shared read address channel.

`define AXI_S3_ON_AR_SHARED_VAL 0

// Defined if slave 3 connects to only the shared read address channel.

`define AXI_S3_ON_AR_SHARED_ONLY

// 1 if slave 3 connects to only the shared read address channel.

`define AXI_S3_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 4 connects to the shared read address channel.

// 1 if slave 4 connects to the shared read address channel.

`define AXI_S4_ON_AR_SHARED_VAL 0

// Defined if slave 4 connects to only the shared read address channel.

`define AXI_S4_ON_AR_SHARED_ONLY

// 1 if slave 4 connects to only the shared read address channel.

`define AXI_S4_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 5 connects to the shared read address channel.

// 1 if slave 5 connects to the shared read address channel.

`define AXI_S5_ON_AR_SHARED_VAL 0

// Defined if slave 5 connects to only the shared read address channel.

`define AXI_S5_ON_AR_SHARED_ONLY

// 1 if slave 5 connects to only the shared read address channel.

`define AXI_S5_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 6 connects to the shared read address channel.

// 1 if slave 6 connects to the shared read address channel.

`define AXI_S6_ON_AR_SHARED_VAL 0

// Defined if slave 6 connects to only the shared read address channel.

`define AXI_S6_ON_AR_SHARED_ONLY

// 1 if slave 6 connects to only the shared read address channel.

`define AXI_S6_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 7 connects to the shared read address channel.

// 1 if slave 7 connects to the shared read address channel.

`define AXI_S7_ON_AR_SHARED_VAL 0

// Defined if slave 7 connects to only the shared read address channel.

`define AXI_S7_ON_AR_SHARED_ONLY

// 1 if slave 7 connects to only the shared read address channel.

`define AXI_S7_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 8 connects to the shared read address channel.

// 1 if slave 8 connects to the shared read address channel.

`define AXI_S8_ON_AR_SHARED_VAL 0

// Defined if slave 8 connects to only the shared read address channel.

`define AXI_S8_ON_AR_SHARED_ONLY

// 1 if slave 8 connects to only the shared read address channel.

`define AXI_S8_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 9 connects to the shared read address channel.

// 1 if slave 9 connects to the shared read address channel.

`define AXI_S9_ON_AR_SHARED_VAL 0

// Defined if slave 9 connects to only the shared read address channel.

`define AXI_S9_ON_AR_SHARED_ONLY

// 1 if slave 9 connects to only the shared read address channel.

`define AXI_S9_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 10 connects to the shared read address channel.

// 1 if slave 10 connects to the shared read address channel.

`define AXI_S10_ON_AR_SHARED_VAL 0

// Defined if slave 10 connects to only the shared read address channel.

`define AXI_S10_ON_AR_SHARED_ONLY

// 1 if slave 10 connects to only the shared read address channel.

`define AXI_S10_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 11 connects to the shared read address channel.

// 1 if slave 11 connects to the shared read address channel.

`define AXI_S11_ON_AR_SHARED_VAL 0

// Defined if slave 11 connects to only the shared read address channel.

`define AXI_S11_ON_AR_SHARED_ONLY

// 1 if slave 11 connects to only the shared read address channel.

`define AXI_S11_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 12 connects to the shared read address channel.

// 1 if slave 12 connects to the shared read address channel.

`define AXI_S12_ON_AR_SHARED_VAL 0

// Defined if slave 12 connects to only the shared read address channel.

`define AXI_S12_ON_AR_SHARED_ONLY

// 1 if slave 12 connects to only the shared read address channel.

`define AXI_S12_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 13 connects to the shared read address channel.

// 1 if slave 13 connects to the shared read address channel.

`define AXI_S13_ON_AR_SHARED_VAL 0

// Defined if slave 13 connects to only the shared read address channel.

`define AXI_S13_ON_AR_SHARED_ONLY

// 1 if slave 13 connects to only the shared read address channel.

`define AXI_S13_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 14 connects to the shared read address channel.

// 1 if slave 14 connects to the shared read address channel.

`define AXI_S14_ON_AR_SHARED_VAL 0

// Defined if slave 14 connects to only the shared read address channel.

`define AXI_S14_ON_AR_SHARED_ONLY

// 1 if slave 14 connects to only the shared read address channel.

`define AXI_S14_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 15 connects to the shared read address channel.

// 1 if slave 15 connects to the shared read address channel.

`define AXI_S15_ON_AR_SHARED_VAL 0

// Defined if slave 15 connects to only the shared read address channel.

`define AXI_S15_ON_AR_SHARED_ONLY

// 1 if slave 15 connects to only the shared read address channel.

`define AXI_S15_ON_AR_SHARED_ONLY_VAL 1



// Defined if slave 16 connects to the shared read address channel.

// 1 if slave 16 connects to the shared read address channel.

`define AXI_S16_ON_AR_SHARED_VAL 0

// Defined if slave 16 connects to only the shared read address channel.

`define AXI_S16_ON_AR_SHARED_ONLY

// 1 if slave 16 connects to only the shared read address channel.

`define AXI_S16_ON_AR_SHARED_ONLY_VAL 1



// Defined if master 1 connects to the shared write address channel.

// 1 if master 1 connects to the shared write address channel.

`define AXI_M1_ON_AW_SHARED_VAL 0



// Defined if master 2 connects to the shared write address channel.

// 1 if master 2 connects to the shared write address channel.

`define AXI_M2_ON_AW_SHARED_VAL 0



// Defined if master 3 connects to the shared write address channel.

// 1 if master 3 connects to the shared write address channel.

`define AXI_M3_ON_AW_SHARED_VAL 0



// Defined if master 4 connects to the shared write address channel.

// 1 if master 4 connects to the shared write address channel.

`define AXI_M4_ON_AW_SHARED_VAL 0



// Defined if master 5 connects to the shared write address channel.

// 1 if master 5 connects to the shared write address channel.

`define AXI_M5_ON_AW_SHARED_VAL 0



// Defined if master 6 connects to the shared write address channel.

// 1 if master 6 connects to the shared write address channel.

`define AXI_M6_ON_AW_SHARED_VAL 0



// Defined if master 7 connects to the shared write address channel.

// 1 if master 7 connects to the shared write address channel.

`define AXI_M7_ON_AW_SHARED_VAL 0



// Defined if master 8 connects to the shared write address channel.

// 1 if master 8 connects to the shared write address channel.

`define AXI_M8_ON_AW_SHARED_VAL 0



// Defined if master 9 connects to the shared write address channel.

// 1 if master 9 connects to the shared write address channel.

`define AXI_M9_ON_AW_SHARED_VAL 0



// Defined if master 10 connects to the shared write address channel.

// 1 if master 10 connects to the shared write address channel.

`define AXI_M10_ON_AW_SHARED_VAL 0



// Defined if master 11 connects to the shared write address channel.

// 1 if master 11 connects to the shared write address channel.

`define AXI_M11_ON_AW_SHARED_VAL 0



// Defined if master 12 connects to the shared write address channel.

// 1 if master 12 connects to the shared write address channel.

`define AXI_M12_ON_AW_SHARED_VAL 0



// Defined if master 13 connects to the shared write address channel.

// 1 if master 13 connects to the shared write address channel.

`define AXI_M13_ON_AW_SHARED_VAL 0



// Defined if master 14 connects to the shared write address channel.

// 1 if master 14 connects to the shared write address channel.

`define AXI_M14_ON_AW_SHARED_VAL 0



// Defined if master 15 connects to the shared write address channel.

// 1 if master 15 connects to the shared write address channel.

`define AXI_M15_ON_AW_SHARED_VAL 0



// Defined if master 16 connects to the shared write address channel.

// 1 if master 16 connects to the shared write address channel.

`define AXI_M16_ON_AW_SHARED_VAL 0



// Defined if slave 0 connects to the shared write address channel.

// 1 if slave 0 connects to the shared write address channel.

`define AXI_S0_ON_AW_SHARED_VAL 0

// Defined if slave 0 connects to only the shared write address channel.

// `define AXI_S0_ON_AW_SHARED_ONLY

// 1 if slave 0 connects to only the shared write address channel.

`define AXI_S0_ON_AW_SHARED_ONLY_VAL 0



// Defined if slave 1 connects to the shared write address channel.

// 1 if slave 1 connects to the shared write address channel.

`define AXI_S1_ON_AW_SHARED_VAL 0

// Defined if slave 1 connects to only the shared write address channel.

// `define AXI_S1_ON_AW_SHARED_ONLY

// 1 if slave 1 connects to only the shared write address channel.

`define AXI_S1_ON_AW_SHARED_ONLY_VAL 0



// Defined if slave 2 connects to the shared write address channel.

// 1 if slave 2 connects to the shared write address channel.

`define AXI_S2_ON_AW_SHARED_VAL 0

// Defined if slave 2 connects to only the shared write address channel.

`define AXI_S2_ON_AW_SHARED_ONLY

// 1 if slave 2 connects to only the shared write address channel.

`define AXI_S2_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 3 connects to the shared write address channel.

// 1 if slave 3 connects to the shared write address channel.

`define AXI_S3_ON_AW_SHARED_VAL 0

// Defined if slave 3 connects to only the shared write address channel.

`define AXI_S3_ON_AW_SHARED_ONLY

// 1 if slave 3 connects to only the shared write address channel.

`define AXI_S3_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 4 connects to the shared write address channel.

// 1 if slave 4 connects to the shared write address channel.

`define AXI_S4_ON_AW_SHARED_VAL 0

// Defined if slave 4 connects to only the shared write address channel.

`define AXI_S4_ON_AW_SHARED_ONLY

// 1 if slave 4 connects to only the shared write address channel.

`define AXI_S4_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 5 connects to the shared write address channel.

// 1 if slave 5 connects to the shared write address channel.

`define AXI_S5_ON_AW_SHARED_VAL 0

// Defined if slave 5 connects to only the shared write address channel.

`define AXI_S5_ON_AW_SHARED_ONLY

// 1 if slave 5 connects to only the shared write address channel.

`define AXI_S5_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 6 connects to the shared write address channel.

// 1 if slave 6 connects to the shared write address channel.

`define AXI_S6_ON_AW_SHARED_VAL 0

// Defined if slave 6 connects to only the shared write address channel.

`define AXI_S6_ON_AW_SHARED_ONLY

// 1 if slave 6 connects to only the shared write address channel.

`define AXI_S6_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 7 connects to the shared write address channel.

// 1 if slave 7 connects to the shared write address channel.

`define AXI_S7_ON_AW_SHARED_VAL 0

// Defined if slave 7 connects to only the shared write address channel.

`define AXI_S7_ON_AW_SHARED_ONLY

// 1 if slave 7 connects to only the shared write address channel.

`define AXI_S7_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 8 connects to the shared write address channel.

// 1 if slave 8 connects to the shared write address channel.

`define AXI_S8_ON_AW_SHARED_VAL 0

// Defined if slave 8 connects to only the shared write address channel.

`define AXI_S8_ON_AW_SHARED_ONLY

// 1 if slave 8 connects to only the shared write address channel.

`define AXI_S8_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 9 connects to the shared write address channel.

// 1 if slave 9 connects to the shared write address channel.

`define AXI_S9_ON_AW_SHARED_VAL 0

// Defined if slave 9 connects to only the shared write address channel.

`define AXI_S9_ON_AW_SHARED_ONLY

// 1 if slave 9 connects to only the shared write address channel.

`define AXI_S9_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 10 connects to the shared write address channel.

// 1 if slave 10 connects to the shared write address channel.

`define AXI_S10_ON_AW_SHARED_VAL 0

// Defined if slave 10 connects to only the shared write address channel.

`define AXI_S10_ON_AW_SHARED_ONLY

// 1 if slave 10 connects to only the shared write address channel.

`define AXI_S10_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 11 connects to the shared write address channel.

// 1 if slave 11 connects to the shared write address channel.

`define AXI_S11_ON_AW_SHARED_VAL 0

// Defined if slave 11 connects to only the shared write address channel.

`define AXI_S11_ON_AW_SHARED_ONLY

// 1 if slave 11 connects to only the shared write address channel.

`define AXI_S11_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 12 connects to the shared write address channel.

// 1 if slave 12 connects to the shared write address channel.

`define AXI_S12_ON_AW_SHARED_VAL 0

// Defined if slave 12 connects to only the shared write address channel.

`define AXI_S12_ON_AW_SHARED_ONLY

// 1 if slave 12 connects to only the shared write address channel.

`define AXI_S12_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 13 connects to the shared write address channel.

// 1 if slave 13 connects to the shared write address channel.

`define AXI_S13_ON_AW_SHARED_VAL 0

// Defined if slave 13 connects to only the shared write address channel.

`define AXI_S13_ON_AW_SHARED_ONLY

// 1 if slave 13 connects to only the shared write address channel.

`define AXI_S13_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 14 connects to the shared write address channel.

// 1 if slave 14 connects to the shared write address channel.

`define AXI_S14_ON_AW_SHARED_VAL 0

// Defined if slave 14 connects to only the shared write address channel.

`define AXI_S14_ON_AW_SHARED_ONLY

// 1 if slave 14 connects to only the shared write address channel.

`define AXI_S14_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 15 connects to the shared write address channel.

// 1 if slave 15 connects to the shared write address channel.

`define AXI_S15_ON_AW_SHARED_VAL 0

// Defined if slave 15 connects to only the shared write address channel.

`define AXI_S15_ON_AW_SHARED_ONLY

// 1 if slave 15 connects to only the shared write address channel.

`define AXI_S15_ON_AW_SHARED_ONLY_VAL 1



// Defined if slave 16 connects to the shared write address channel.

// 1 if slave 16 connects to the shared write address channel.

`define AXI_S16_ON_AW_SHARED_VAL 0

// Defined if slave 16 connects to only the shared write address channel.

`define AXI_S16_ON_AW_SHARED_ONLY

// 1 if slave 16 connects to only the shared write address channel.

`define AXI_S16_ON_AW_SHARED_ONLY_VAL 1



// Defined if master 1 connects to the shared write data channel.

// 1 if master 1 connects to the shared write data channel.

`define AXI_M1_ON_W_SHARED_VAL 0



// Defined if master 2 connects to the shared write data channel.

// 1 if master 2 connects to the shared write data channel.

`define AXI_M2_ON_W_SHARED_VAL 0



// Defined if master 3 connects to the shared write data channel.

// 1 if master 3 connects to the shared write data channel.

`define AXI_M3_ON_W_SHARED_VAL 0



// Defined if master 4 connects to the shared write data channel.

// 1 if master 4 connects to the shared write data channel.

`define AXI_M4_ON_W_SHARED_VAL 0



// Defined if master 5 connects to the shared write data channel.

// 1 if master 5 connects to the shared write data channel.

`define AXI_M5_ON_W_SHARED_VAL 0



// Defined if master 6 connects to the shared write data channel.

// 1 if master 6 connects to the shared write data channel.

`define AXI_M6_ON_W_SHARED_VAL 0



// Defined if master 7 connects to the shared write data channel.

// 1 if master 7 connects to the shared write data channel.

`define AXI_M7_ON_W_SHARED_VAL 0



// Defined if master 8 connects to the shared write data channel.

// 1 if master 8 connects to the shared write data channel.

`define AXI_M8_ON_W_SHARED_VAL 0



// Defined if master 9 connects to the shared write data channel.

// 1 if master 9 connects to the shared write data channel.

`define AXI_M9_ON_W_SHARED_VAL 0



// Defined if master 10 connects to the shared write data channel.

// 1 if master 10 connects to the shared write data channel.

`define AXI_M10_ON_W_SHARED_VAL 0



// Defined if master 11 connects to the shared write data channel.

// 1 if master 11 connects to the shared write data channel.

`define AXI_M11_ON_W_SHARED_VAL 0



// Defined if master 12 connects to the shared write data channel.

// 1 if master 12 connects to the shared write data channel.

`define AXI_M12_ON_W_SHARED_VAL 0



// Defined if master 13 connects to the shared write data channel.

// 1 if master 13 connects to the shared write data channel.

`define AXI_M13_ON_W_SHARED_VAL 0



// Defined if master 14 connects to the shared write data channel.

// 1 if master 14 connects to the shared write data channel.

`define AXI_M14_ON_W_SHARED_VAL 0



// Defined if master 15 connects to the shared write data channel.

// 1 if master 15 connects to the shared write data channel.

`define AXI_M15_ON_W_SHARED_VAL 0



// Defined if master 16 connects to the shared write data channel.

// 1 if master 16 connects to the shared write data channel.

`define AXI_M16_ON_W_SHARED_VAL 0



// Defined if slave 0 connects to the shared write data channel.

// 1 if slave 0 connects to the shared write data channel.

`define AXI_S0_ON_W_SHARED_VAL 0

// Defined if slave 0 connects to only the shared write data channel.

// `define AXI_S0_ON_W_SHARED_ONLY

// 1 if slave 0 connects to only the shared write data channel.

`define AXI_S0_ON_W_SHARED_ONLY_VAL 0



// Defined if slave 1 connects to the shared write data channel.

// 1 if slave 1 connects to the shared write data channel.

`define AXI_S1_ON_W_SHARED_VAL 0

// Defined if slave 1 connects to only the shared write data channel.

// `define AXI_S1_ON_W_SHARED_ONLY

// 1 if slave 1 connects to only the shared write data channel.

`define AXI_S1_ON_W_SHARED_ONLY_VAL 0



// Defined if slave 2 connects to the shared write data channel.

// 1 if slave 2 connects to the shared write data channel.

`define AXI_S2_ON_W_SHARED_VAL 0

// Defined if slave 2 connects to only the shared write data channel.

`define AXI_S2_ON_W_SHARED_ONLY

// 1 if slave 2 connects to only the shared write data channel.

`define AXI_S2_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 3 connects to the shared write data channel.

// 1 if slave 3 connects to the shared write data channel.

`define AXI_S3_ON_W_SHARED_VAL 0

// Defined if slave 3 connects to only the shared write data channel.

`define AXI_S3_ON_W_SHARED_ONLY

// 1 if slave 3 connects to only the shared write data channel.

`define AXI_S3_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 4 connects to the shared write data channel.

// 1 if slave 4 connects to the shared write data channel.

`define AXI_S4_ON_W_SHARED_VAL 0

// Defined if slave 4 connects to only the shared write data channel.

`define AXI_S4_ON_W_SHARED_ONLY

// 1 if slave 4 connects to only the shared write data channel.

`define AXI_S4_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 5 connects to the shared write data channel.

// 1 if slave 5 connects to the shared write data channel.

`define AXI_S5_ON_W_SHARED_VAL 0

// Defined if slave 5 connects to only the shared write data channel.

`define AXI_S5_ON_W_SHARED_ONLY

// 1 if slave 5 connects to only the shared write data channel.

`define AXI_S5_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 6 connects to the shared write data channel.

// 1 if slave 6 connects to the shared write data channel.

`define AXI_S6_ON_W_SHARED_VAL 0

// Defined if slave 6 connects to only the shared write data channel.

`define AXI_S6_ON_W_SHARED_ONLY

// 1 if slave 6 connects to only the shared write data channel.

`define AXI_S6_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 7 connects to the shared write data channel.

// 1 if slave 7 connects to the shared write data channel.

`define AXI_S7_ON_W_SHARED_VAL 0

// Defined if slave 7 connects to only the shared write data channel.

`define AXI_S7_ON_W_SHARED_ONLY

// 1 if slave 7 connects to only the shared write data channel.

`define AXI_S7_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 8 connects to the shared write data channel.

// 1 if slave 8 connects to the shared write data channel.

`define AXI_S8_ON_W_SHARED_VAL 0

// Defined if slave 8 connects to only the shared write data channel.

`define AXI_S8_ON_W_SHARED_ONLY

// 1 if slave 8 connects to only the shared write data channel.

`define AXI_S8_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 9 connects to the shared write data channel.

// 1 if slave 9 connects to the shared write data channel.

`define AXI_S9_ON_W_SHARED_VAL 0

// Defined if slave 9 connects to only the shared write data channel.

`define AXI_S9_ON_W_SHARED_ONLY

// 1 if slave 9 connects to only the shared write data channel.

`define AXI_S9_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 10 connects to the shared write data channel.

// 1 if slave 10 connects to the shared write data channel.

`define AXI_S10_ON_W_SHARED_VAL 0

// Defined if slave 10 connects to only the shared write data channel.

`define AXI_S10_ON_W_SHARED_ONLY

// 1 if slave 10 connects to only the shared write data channel.

`define AXI_S10_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 11 connects to the shared write data channel.

// 1 if slave 11 connects to the shared write data channel.

`define AXI_S11_ON_W_SHARED_VAL 0

// Defined if slave 11 connects to only the shared write data channel.

`define AXI_S11_ON_W_SHARED_ONLY

// 1 if slave 11 connects to only the shared write data channel.

`define AXI_S11_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 12 connects to the shared write data channel.

// 1 if slave 12 connects to the shared write data channel.

`define AXI_S12_ON_W_SHARED_VAL 0

// Defined if slave 12 connects to only the shared write data channel.

`define AXI_S12_ON_W_SHARED_ONLY

// 1 if slave 12 connects to only the shared write data channel.

`define AXI_S12_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 13 connects to the shared write data channel.

// 1 if slave 13 connects to the shared write data channel.

`define AXI_S13_ON_W_SHARED_VAL 0

// Defined if slave 13 connects to only the shared write data channel.

`define AXI_S13_ON_W_SHARED_ONLY

// 1 if slave 13 connects to only the shared write data channel.

`define AXI_S13_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 14 connects to the shared write data channel.

// 1 if slave 14 connects to the shared write data channel.

`define AXI_S14_ON_W_SHARED_VAL 0

// Defined if slave 14 connects to only the shared write data channel.

`define AXI_S14_ON_W_SHARED_ONLY

// 1 if slave 14 connects to only the shared write data channel.

`define AXI_S14_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 15 connects to the shared write data channel.

// 1 if slave 15 connects to the shared write data channel.

`define AXI_S15_ON_W_SHARED_VAL 0

// Defined if slave 15 connects to only the shared write data channel.

`define AXI_S15_ON_W_SHARED_ONLY

// 1 if slave 15 connects to only the shared write data channel.

`define AXI_S15_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 16 connects to the shared write data channel.

// 1 if slave 16 connects to the shared write data channel.

`define AXI_S16_ON_W_SHARED_VAL 0

// Defined if slave 16 connects to only the shared write data channel.

`define AXI_S16_ON_W_SHARED_ONLY

// 1 if slave 16 connects to only the shared write data channel.

`define AXI_S16_ON_W_SHARED_ONLY_VAL 1



// Defined if slave 0 connects to the shared read data channel.

// 1 if slave 0 connects to the shared read data channel.

`define AXI_S0_ON_R_SHARED_VAL 0


// Defined if slave 1 connects to the shared read data channel.

// 1 if slave 1 connects to the shared read data channel.

`define AXI_S1_ON_R_SHARED_VAL 0


// Defined if slave 2 connects to the shared read data channel.

// 1 if slave 2 connects to the shared read data channel.

`define AXI_S2_ON_R_SHARED_VAL 0


// Defined if slave 3 connects to the shared read data channel.

// 1 if slave 3 connects to the shared read data channel.

`define AXI_S3_ON_R_SHARED_VAL 0


// Defined if slave 4 connects to the shared read data channel.

// 1 if slave 4 connects to the shared read data channel.

`define AXI_S4_ON_R_SHARED_VAL 0


// Defined if slave 5 connects to the shared read data channel.

// 1 if slave 5 connects to the shared read data channel.

`define AXI_S5_ON_R_SHARED_VAL 0


// Defined if slave 6 connects to the shared read data channel.

// 1 if slave 6 connects to the shared read data channel.

`define AXI_S6_ON_R_SHARED_VAL 0


// Defined if slave 7 connects to the shared read data channel.

// 1 if slave 7 connects to the shared read data channel.

`define AXI_S7_ON_R_SHARED_VAL 0


// Defined if slave 8 connects to the shared read data channel.

// 1 if slave 8 connects to the shared read data channel.

`define AXI_S8_ON_R_SHARED_VAL 0


// Defined if slave 9 connects to the shared read data channel.

// 1 if slave 9 connects to the shared read data channel.

`define AXI_S9_ON_R_SHARED_VAL 0


// Defined if slave 10 connects to the shared read data channel.

// 1 if slave 10 connects to the shared read data channel.

`define AXI_S10_ON_R_SHARED_VAL 0


// Defined if slave 11 connects to the shared read data channel.

// 1 if slave 11 connects to the shared read data channel.

`define AXI_S11_ON_R_SHARED_VAL 0


// Defined if slave 12 connects to the shared read data channel.

// 1 if slave 12 connects to the shared read data channel.

`define AXI_S12_ON_R_SHARED_VAL 0


// Defined if slave 13 connects to the shared read data channel.

// 1 if slave 13 connects to the shared read data channel.

`define AXI_S13_ON_R_SHARED_VAL 0


// Defined if slave 14 connects to the shared read data channel.

// 1 if slave 14 connects to the shared read data channel.

`define AXI_S14_ON_R_SHARED_VAL 0


// Defined if slave 15 connects to the shared read data channel.

// 1 if slave 15 connects to the shared read data channel.

`define AXI_S15_ON_R_SHARED_VAL 0


// Defined if slave 16 connects to the shared read data channel.

// 1 if slave 16 connects to the shared read data channel.

`define AXI_S16_ON_R_SHARED_VAL 0


// Defined if master 1 connects to the shared read data channel.


`define AXI_M1_ON_R_SHARED_VAL 0

// Defined if master 1 connects to only the shared read data channel.

// `define AXI_M1_ON_R_SHARED_ONLY

// 1 if master 1 connects to only the shared read data channel.

`define AXI_M1_ON_R_SHARED_ONLY_VAL 0



// Defined if master 2 connects to the shared read data channel.


`define AXI_M2_ON_R_SHARED_VAL 0

// Defined if master 2 connects to only the shared read data channel.

// `define AXI_M2_ON_R_SHARED_ONLY

// 1 if master 2 connects to only the shared read data channel.

`define AXI_M2_ON_R_SHARED_ONLY_VAL 0



// Defined if master 3 connects to the shared read data channel.


`define AXI_M3_ON_R_SHARED_VAL 0

// Defined if master 3 connects to only the shared read data channel.

`define AXI_M3_ON_R_SHARED_ONLY

// 1 if master 3 connects to only the shared read data channel.

`define AXI_M3_ON_R_SHARED_ONLY_VAL 1



// Defined if master 4 connects to the shared read data channel.


`define AXI_M4_ON_R_SHARED_VAL 0

// Defined if master 4 connects to only the shared read data channel.

`define AXI_M4_ON_R_SHARED_ONLY

// 1 if master 4 connects to only the shared read data channel.

`define AXI_M4_ON_R_SHARED_ONLY_VAL 1



// Defined if master 5 connects to the shared read data channel.


`define AXI_M5_ON_R_SHARED_VAL 0

// Defined if master 5 connects to only the shared read data channel.

`define AXI_M5_ON_R_SHARED_ONLY

// 1 if master 5 connects to only the shared read data channel.

`define AXI_M5_ON_R_SHARED_ONLY_VAL 1



// Defined if master 6 connects to the shared read data channel.


`define AXI_M6_ON_R_SHARED_VAL 0

// Defined if master 6 connects to only the shared read data channel.

`define AXI_M6_ON_R_SHARED_ONLY

// 1 if master 6 connects to only the shared read data channel.

`define AXI_M6_ON_R_SHARED_ONLY_VAL 1



// Defined if master 7 connects to the shared read data channel.


`define AXI_M7_ON_R_SHARED_VAL 0

// Defined if master 7 connects to only the shared read data channel.

`define AXI_M7_ON_R_SHARED_ONLY

// 1 if master 7 connects to only the shared read data channel.

`define AXI_M7_ON_R_SHARED_ONLY_VAL 1



// Defined if master 8 connects to the shared read data channel.


`define AXI_M8_ON_R_SHARED_VAL 0

// Defined if master 8 connects to only the shared read data channel.

`define AXI_M8_ON_R_SHARED_ONLY

// 1 if master 8 connects to only the shared read data channel.

`define AXI_M8_ON_R_SHARED_ONLY_VAL 1



// Defined if master 9 connects to the shared read data channel.


`define AXI_M9_ON_R_SHARED_VAL 0

// Defined if master 9 connects to only the shared read data channel.

`define AXI_M9_ON_R_SHARED_ONLY

// 1 if master 9 connects to only the shared read data channel.

`define AXI_M9_ON_R_SHARED_ONLY_VAL 1



// Defined if master 10 connects to the shared read data channel.


`define AXI_M10_ON_R_SHARED_VAL 0

// Defined if master 10 connects to only the shared read data channel.

`define AXI_M10_ON_R_SHARED_ONLY

// 1 if master 10 connects to only the shared read data channel.

`define AXI_M10_ON_R_SHARED_ONLY_VAL 1



// Defined if master 11 connects to the shared read data channel.


`define AXI_M11_ON_R_SHARED_VAL 0

// Defined if master 11 connects to only the shared read data channel.

`define AXI_M11_ON_R_SHARED_ONLY

// 1 if master 11 connects to only the shared read data channel.

`define AXI_M11_ON_R_SHARED_ONLY_VAL 1



// Defined if master 12 connects to the shared read data channel.


`define AXI_M12_ON_R_SHARED_VAL 0

// Defined if master 12 connects to only the shared read data channel.

`define AXI_M12_ON_R_SHARED_ONLY

// 1 if master 12 connects to only the shared read data channel.

`define AXI_M12_ON_R_SHARED_ONLY_VAL 1



// Defined if master 13 connects to the shared read data channel.


`define AXI_M13_ON_R_SHARED_VAL 0

// Defined if master 13 connects to only the shared read data channel.

`define AXI_M13_ON_R_SHARED_ONLY

// 1 if master 13 connects to only the shared read data channel.

`define AXI_M13_ON_R_SHARED_ONLY_VAL 1



// Defined if master 14 connects to the shared read data channel.


`define AXI_M14_ON_R_SHARED_VAL 0

// Defined if master 14 connects to only the shared read data channel.

`define AXI_M14_ON_R_SHARED_ONLY

// 1 if master 14 connects to only the shared read data channel.

`define AXI_M14_ON_R_SHARED_ONLY_VAL 1



// Defined if master 15 connects to the shared read data channel.


`define AXI_M15_ON_R_SHARED_VAL 0

// Defined if master 15 connects to only the shared read data channel.

`define AXI_M15_ON_R_SHARED_ONLY

// 1 if master 15 connects to only the shared read data channel.

`define AXI_M15_ON_R_SHARED_ONLY_VAL 1



// Defined if master 16 connects to the shared read data channel.


`define AXI_M16_ON_R_SHARED_VAL 0

// Defined if master 16 connects to only the shared read data channel.

`define AXI_M16_ON_R_SHARED_ONLY

// 1 if master 16 connects to only the shared read data channel.

`define AXI_M16_ON_R_SHARED_ONLY_VAL 1



// Defined if slave 0 connects to the shared burst response channel.

// 1 if slave 0 connects to the shared burst response channel.

`define AXI_S0_ON_B_SHARED_VAL 0


// Defined if slave 1 connects to the shared burst response channel.

// 1 if slave 1 connects to the shared burst response channel.

`define AXI_S1_ON_B_SHARED_VAL 0


// Defined if slave 2 connects to the shared burst response channel.

// 1 if slave 2 connects to the shared burst response channel.

`define AXI_S2_ON_B_SHARED_VAL 0


// Defined if slave 3 connects to the shared burst response channel.

// 1 if slave 3 connects to the shared burst response channel.

`define AXI_S3_ON_B_SHARED_VAL 0


// Defined if slave 4 connects to the shared burst response channel.

// 1 if slave 4 connects to the shared burst response channel.

`define AXI_S4_ON_B_SHARED_VAL 0


// Defined if slave 5 connects to the shared burst response channel.

// 1 if slave 5 connects to the shared burst response channel.

`define AXI_S5_ON_B_SHARED_VAL 0


// Defined if slave 6 connects to the shared burst response channel.

// 1 if slave 6 connects to the shared burst response channel.

`define AXI_S6_ON_B_SHARED_VAL 0


// Defined if slave 7 connects to the shared burst response channel.

// 1 if slave 7 connects to the shared burst response channel.

`define AXI_S7_ON_B_SHARED_VAL 0


// Defined if slave 8 connects to the shared burst response channel.

// 1 if slave 8 connects to the shared burst response channel.

`define AXI_S8_ON_B_SHARED_VAL 0


// Defined if slave 9 connects to the shared burst response channel.

// 1 if slave 9 connects to the shared burst response channel.

`define AXI_S9_ON_B_SHARED_VAL 0


// Defined if slave 10 connects to the shared burst response channel.

// 1 if slave 10 connects to the shared burst response channel.

`define AXI_S10_ON_B_SHARED_VAL 0


// Defined if slave 11 connects to the shared burst response channel.

// 1 if slave 11 connects to the shared burst response channel.

`define AXI_S11_ON_B_SHARED_VAL 0


// Defined if slave 12 connects to the shared burst response channel.

// 1 if slave 12 connects to the shared burst response channel.

`define AXI_S12_ON_B_SHARED_VAL 0


// Defined if slave 13 connects to the shared burst response channel.

// 1 if slave 13 connects to the shared burst response channel.

`define AXI_S13_ON_B_SHARED_VAL 0


// Defined if slave 14 connects to the shared burst response channel.

// 1 if slave 14 connects to the shared burst response channel.

`define AXI_S14_ON_B_SHARED_VAL 0


// Defined if slave 15 connects to the shared burst response channel.

// 1 if slave 15 connects to the shared burst response channel.

`define AXI_S15_ON_B_SHARED_VAL 0


// Defined if slave 16 connects to the shared burst response channel.

// 1 if slave 16 connects to the shared burst response channel.

`define AXI_S16_ON_B_SHARED_VAL 0


// Defined if master 1 connects to the shared burst response channel.


`define AXI_M1_ON_B_SHARED_VAL 0

// Defined if master 1 connects to only the shared burst response channel.

// `define AXI_M1_ON_B_SHARED_ONLY

// 1 if master 1 connects to only the shared burst response channel.

`define AXI_M1_ON_B_SHARED_ONLY_VAL 0



// Defined if master 2 connects to the shared burst response channel.


`define AXI_M2_ON_B_SHARED_VAL 0

// Defined if master 2 connects to only the shared burst response channel.

// `define AXI_M2_ON_B_SHARED_ONLY

// 1 if master 2 connects to only the shared burst response channel.

`define AXI_M2_ON_B_SHARED_ONLY_VAL 0



// Defined if master 3 connects to the shared burst response channel.


`define AXI_M3_ON_B_SHARED_VAL 0

// Defined if master 3 connects to only the shared burst response channel.

`define AXI_M3_ON_B_SHARED_ONLY

// 1 if master 3 connects to only the shared burst response channel.

`define AXI_M3_ON_B_SHARED_ONLY_VAL 1



// Defined if master 4 connects to the shared burst response channel.


`define AXI_M4_ON_B_SHARED_VAL 0

// Defined if master 4 connects to only the shared burst response channel.

`define AXI_M4_ON_B_SHARED_ONLY

// 1 if master 4 connects to only the shared burst response channel.

`define AXI_M4_ON_B_SHARED_ONLY_VAL 1



// Defined if master 5 connects to the shared burst response channel.


`define AXI_M5_ON_B_SHARED_VAL 0

// Defined if master 5 connects to only the shared burst response channel.

`define AXI_M5_ON_B_SHARED_ONLY

// 1 if master 5 connects to only the shared burst response channel.

`define AXI_M5_ON_B_SHARED_ONLY_VAL 1



// Defined if master 6 connects to the shared burst response channel.


`define AXI_M6_ON_B_SHARED_VAL 0

// Defined if master 6 connects to only the shared burst response channel.

`define AXI_M6_ON_B_SHARED_ONLY

// 1 if master 6 connects to only the shared burst response channel.

`define AXI_M6_ON_B_SHARED_ONLY_VAL 1



// Defined if master 7 connects to the shared burst response channel.


`define AXI_M7_ON_B_SHARED_VAL 0

// Defined if master 7 connects to only the shared burst response channel.

`define AXI_M7_ON_B_SHARED_ONLY

// 1 if master 7 connects to only the shared burst response channel.

`define AXI_M7_ON_B_SHARED_ONLY_VAL 1



// Defined if master 8 connects to the shared burst response channel.


`define AXI_M8_ON_B_SHARED_VAL 0

// Defined if master 8 connects to only the shared burst response channel.

`define AXI_M8_ON_B_SHARED_ONLY

// 1 if master 8 connects to only the shared burst response channel.

`define AXI_M8_ON_B_SHARED_ONLY_VAL 1



// Defined if master 9 connects to the shared burst response channel.


`define AXI_M9_ON_B_SHARED_VAL 0

// Defined if master 9 connects to only the shared burst response channel.

`define AXI_M9_ON_B_SHARED_ONLY

// 1 if master 9 connects to only the shared burst response channel.

`define AXI_M9_ON_B_SHARED_ONLY_VAL 1



// Defined if master 10 connects to the shared burst response channel.


`define AXI_M10_ON_B_SHARED_VAL 0

// Defined if master 10 connects to only the shared burst response channel.

`define AXI_M10_ON_B_SHARED_ONLY

// 1 if master 10 connects to only the shared burst response channel.

`define AXI_M10_ON_B_SHARED_ONLY_VAL 1



// Defined if master 11 connects to the shared burst response channel.


`define AXI_M11_ON_B_SHARED_VAL 0

// Defined if master 11 connects to only the shared burst response channel.

`define AXI_M11_ON_B_SHARED_ONLY

// 1 if master 11 connects to only the shared burst response channel.

`define AXI_M11_ON_B_SHARED_ONLY_VAL 1



// Defined if master 12 connects to the shared burst response channel.


`define AXI_M12_ON_B_SHARED_VAL 0

// Defined if master 12 connects to only the shared burst response channel.

`define AXI_M12_ON_B_SHARED_ONLY

// 1 if master 12 connects to only the shared burst response channel.

`define AXI_M12_ON_B_SHARED_ONLY_VAL 1



// Defined if master 13 connects to the shared burst response channel.


`define AXI_M13_ON_B_SHARED_VAL 0

// Defined if master 13 connects to only the shared burst response channel.

`define AXI_M13_ON_B_SHARED_ONLY

// 1 if master 13 connects to only the shared burst response channel.

`define AXI_M13_ON_B_SHARED_ONLY_VAL 1



// Defined if master 14 connects to the shared burst response channel.


`define AXI_M14_ON_B_SHARED_VAL 0

// Defined if master 14 connects to only the shared burst response channel.

`define AXI_M14_ON_B_SHARED_ONLY

// 1 if master 14 connects to only the shared burst response channel.

`define AXI_M14_ON_B_SHARED_ONLY_VAL 1



// Defined if master 15 connects to the shared burst response channel.


`define AXI_M15_ON_B_SHARED_VAL 0

// Defined if master 15 connects to only the shared burst response channel.

`define AXI_M15_ON_B_SHARED_ONLY

// 1 if master 15 connects to only the shared burst response channel.

`define AXI_M15_ON_B_SHARED_ONLY_VAL 1



// Defined if master 16 connects to the shared burst response channel.


`define AXI_M16_ON_B_SHARED_VAL 0

// Defined if master 16 connects to only the shared burst response channel.

`define AXI_M16_ON_B_SHARED_ONLY

// 1 if master 16 connects to only the shared burst response channel.

`define AXI_M16_ON_B_SHARED_ONLY_VAL 1




// Name:         AXI_AW_SHARED_PL
// Default:      true
// Values:       false (0), true (1)
// Enabled:      (AXI_AW_HAS_SHARED_LAYER)
// 
// This selects whether or not to add a pipeline stage to the shared write address 
// channel. Due to the additional multiplexing in a shared channel, the combinatorial 
// paths are longer than a dedicated channel. Enabling this parameter will instantiate 
// a forward registered pipeline stage in the shared write address channel block that 
// shortens the critcal paths, allowing high clock frequencies to be reached. 
//  
// Dependencies: Enabled if the shared AW channel is present.
`define AXI_AW_SHARED_PL 1


// Name:         AXI_AR_SHARED_PL
// Default:      true
// Values:       false (0), true (1)
// Enabled:      (AXI_AR_HAS_SHARED_LAYER)
// 
// This selects whether or not to add a pipeline stage to the shared read address 
// channel. Due to the additional multiplexing in a shared channel, the combinatorial 
// paths are longer than a dedicated channel. Enabling this parameter will instantiate 
// a forward registered pipeline stage in the shared read address channel block that 
// shortens the critcal paths, allowing high clock frequencies to be reached. 
//  
// Dependencies: Enabled if the shared AR channel is present.
`define AXI_AR_SHARED_PL 1


// Name:         AXI_W_SHARED_PL
// Default:      true
// Values:       false (0), true (1)
// Enabled:      (AXI_W_HAS_SHARED_LAYER)
// 
// This selects whether or not to add a pipeline stage to the shared write data 
// channel. Due to the additional multiplexing in a shared channel, the combinatorial 
// paths are longer than a dedicated channel. Enabling this parameter will instantiate 
// a forward registered pipeline stage in the shared write data channel block that 
// shortens the critcal paths, allowing high clock frequencies to be reached. 
//  
// Enabling this parameter also adds a single pipeline register (without buffer) which  
// does not add latency but allows high clock frequencies to be reached. This register  
// comes at the expense of a single cycle after (wlast & wvalid & wready) where the  
// master and slave completing a write transaction on the shared write data channel  
// may not access each other on the write data channel. 
//  
// Dependencies: Enabled if the shared W channel is present.
`define AXI_W_SHARED_PL 1


// Name:         AXI_R_SHARED_PL
// Default:      true
// Values:       false (0), true (1)
// Enabled:      (AXI_R_HAS_SHARED_LAYER)
// 
// This selects whether or not to add a pipeline stage to the shared read data 
// channel. Due to the additional multiplexing in a shared channel, the combinatorial 
// paths are longer than a dedicated channel. Enabling this parameter will instantiate 
// a forward registered pipeline stage in the shared read data channel block that 
// shortens the critcal paths, allowing high clock frequencies to be reached. 
//  
// Dependencies: Enabled if the shared R channel is present.
`define AXI_R_SHARED_PL 1


// Name:         AXI_B_SHARED_PL
// Default:      true
// Values:       false (0), true (1)
// Enabled:      (AXI_B_HAS_SHARED_LAYER)
// 
// This selects whether or not to add a pipeline stage to the shared burst response 
// channel. Due to the additional multiplexing in a shared channel, the combinatorial 
// paths are longer than a dedicated channel. Enabling this parameter will instantiate 
// a forward registered pipeline stage in the shared burst response channel block that 
// shortens the critcal paths, allowing high clock frequencies to be reached. 
//  
// Dependencies: Enabled if the shared B channel is present.
`define AXI_B_SHARED_PL 1


// Name:         AXI_MCA_HLD_PRIOR
// Default:      false
// Values:       false (0), true (1)
// Enabled:      0 (value changes dynamically based on a command)
// 
// If external arbiter priorities and multi-cycle arbitration are being used 
// ,enable this parameter to force DW_axi to register the priority signals 
// for any arbiter where multi-cycle arbitration has been enabled. 
//  
// If the external priorities are static during run time then this option 
// does not have to be enabled. However if the external priorities are  
// changing during run time this option should be enabled for correct  
// operation of the DW_axi interconnect. 
//  
// Because multi cycle arbitration can be configured differently at each 
// arbiter, enabling this option will infer registers for the priority 
// signals at every arbiter that has an arbitration cycles value larger than 1. 
//  
// Dependancy : Enabled if (AXI_[AR/AW/W]_MCA_NC_Sx or AXI_[R/B]_MCA_NC_Mx) and 
//              AXI_HAS_EXT_PRIORITY are enabled.
`define AXI_MCA_HLD_PRIOR 0


// Name:         AXI_AR_MCA_NC_S0
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 0)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 0. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 0. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 0 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_AR_MCA_NC_S0 1

// Set to 1 if AXI_AR_MCA_NC_S0 is > 1.
`define AXI_AR_MCA_EN_S0 (`AXI_AR_MCA_NC_S0 > 1)

// Log base 2 of AXI_AR_MCA_NC_S0.
`define AXI_AR_MCA_NC_W_S0 1



// Name:         AXI_AW_MCA_NC_S0
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 0)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 0. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 0. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 0 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_AW_MCA_NC_S0 1

// Set to 1 if AXI_AW_MCA_NC_S0 is > 1.
`define AXI_AW_MCA_EN_S0 (`AXI_AW_MCA_NC_S0 > 1)

// Log base 2 of AXI_AW_MCA_NC_S0.
`define AXI_AW_MCA_NC_W_S0 1



// Name:         AXI_W_MCA_NC_S0
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 0) && (AXI_WID_S0 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 0. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 0. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 0 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S0 == 1 then AXI_W_MCA_NC_S0 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S0 1

// Set to 1 if AXI_W_MCA_NC_S0 is > 1.
`define AXI_W_MCA_EN_S0 (`AXI_W_MCA_NC_S0 > 1)

// Log base 2 of AXI_W_MCA_NC_S0.
`define AXI_W_MCA_NC_W_S0 1



// Name:         AXI_AR_MCA_NC_S1
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 1. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 1. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 1 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S1 must be equal to 0.
`define AXI_AR_MCA_NC_S1 1

// Set to 1 if AXI_AR_MCA_NC_S1 is > 1.
`define AXI_AR_MCA_EN_S1 (`AXI_AR_MCA_NC_S1 > 1)

// Log base 2 of AXI_AR_MCA_NC_S1.
`define AXI_AR_MCA_NC_W_S1 1



// Name:         AXI_AW_MCA_NC_S1
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 1. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 1. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 1 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S1 must be equal to 0.
`define AXI_AW_MCA_NC_S1 1

// Set to 1 if AXI_AW_MCA_NC_S1 is > 1.
`define AXI_AW_MCA_EN_S1 (`AXI_AW_MCA_NC_S1 > 1)

// Log base 2 of AXI_AW_MCA_NC_S1.
`define AXI_AW_MCA_NC_W_S1 1



// Name:         AXI_W_MCA_NC_S1
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_WID_S1 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 1. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 1. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 1 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S1 == 1 then AXI_W_MCA_NC_S1 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S1 1

// Set to 1 if AXI_W_MCA_NC_S1 is > 1.
`define AXI_W_MCA_EN_S1 (`AXI_W_MCA_NC_S1 > 1)

// Log base 2 of AXI_W_MCA_NC_S1.
`define AXI_W_MCA_NC_W_S1 1



// Name:         AXI_AR_MCA_NC_S2
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 2)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 2. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 2. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 2 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S2 must be equal to 0.
`define AXI_AR_MCA_NC_S2 1

// Set to 1 if AXI_AR_MCA_NC_S2 is > 1.
`define AXI_AR_MCA_EN_S2 (`AXI_AR_MCA_NC_S2 > 1)

// Log base 2 of AXI_AR_MCA_NC_S2.
`define AXI_AR_MCA_NC_W_S2 1



// Name:         AXI_AW_MCA_NC_S2
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 2)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 2. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 2. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 2 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S2 must be equal to 0.
`define AXI_AW_MCA_NC_S2 1

// Set to 1 if AXI_AW_MCA_NC_S2 is > 1.
`define AXI_AW_MCA_EN_S2 (`AXI_AW_MCA_NC_S2 > 1)

// Log base 2 of AXI_AW_MCA_NC_S2.
`define AXI_AW_MCA_NC_W_S2 1



// Name:         AXI_W_MCA_NC_S2
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_WID_S2 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 2. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 2. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 2 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S2 == 1 then AXI_W_MCA_NC_S2 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S2 1

// Set to 1 if AXI_W_MCA_NC_S2 is > 1.
`define AXI_W_MCA_EN_S2 (`AXI_W_MCA_NC_S2 > 1)

// Log base 2 of AXI_W_MCA_NC_S2.
`define AXI_W_MCA_NC_W_S2 1



// Name:         AXI_AR_MCA_NC_S3
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 3)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 3. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 3. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 3 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S3 must be equal to 0.
`define AXI_AR_MCA_NC_S3 1

// Set to 1 if AXI_AR_MCA_NC_S3 is > 1.
`define AXI_AR_MCA_EN_S3 (`AXI_AR_MCA_NC_S3 > 1)

// Log base 2 of AXI_AR_MCA_NC_S3.
`define AXI_AR_MCA_NC_W_S3 1



// Name:         AXI_AW_MCA_NC_S3
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 3)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 3. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 3. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 3 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S3 must be equal to 0.
`define AXI_AW_MCA_NC_S3 1

// Set to 1 if AXI_AW_MCA_NC_S3 is > 1.
`define AXI_AW_MCA_EN_S3 (`AXI_AW_MCA_NC_S3 > 1)

// Log base 2 of AXI_AW_MCA_NC_S3.
`define AXI_AW_MCA_NC_W_S3 1



// Name:         AXI_W_MCA_NC_S3
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_WID_S3 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 3. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 3. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 3 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S3 == 1 then AXI_W_MCA_NC_S3 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S3 1

// Set to 1 if AXI_W_MCA_NC_S3 is > 1.
`define AXI_W_MCA_EN_S3 (`AXI_W_MCA_NC_S3 > 1)

// Log base 2 of AXI_W_MCA_NC_S3.
`define AXI_W_MCA_NC_W_S3 1



// Name:         AXI_AR_MCA_NC_S4
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 4)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 4. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 4. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 4 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S4 must be equal to 0.
`define AXI_AR_MCA_NC_S4 1

// Set to 1 if AXI_AR_MCA_NC_S4 is > 1.
`define AXI_AR_MCA_EN_S4 (`AXI_AR_MCA_NC_S4 > 1)

// Log base 2 of AXI_AR_MCA_NC_S4.
`define AXI_AR_MCA_NC_W_S4 1



// Name:         AXI_AW_MCA_NC_S4
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 4)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 4. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 4. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 4 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S4 must be equal to 0.
`define AXI_AW_MCA_NC_S4 1

// Set to 1 if AXI_AW_MCA_NC_S4 is > 1.
`define AXI_AW_MCA_EN_S4 (`AXI_AW_MCA_NC_S4 > 1)

// Log base 2 of AXI_AW_MCA_NC_S4.
`define AXI_AW_MCA_NC_W_S4 1



// Name:         AXI_W_MCA_NC_S4
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_WID_S4 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 4. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 4. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 4 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S4 == 1 then AXI_W_MCA_NC_S4 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S4 1

// Set to 1 if AXI_W_MCA_NC_S4 is > 1.
`define AXI_W_MCA_EN_S4 (`AXI_W_MCA_NC_S4 > 1)

// Log base 2 of AXI_W_MCA_NC_S4.
`define AXI_W_MCA_NC_W_S4 1



// Name:         AXI_AR_MCA_NC_S5
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 5)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 5. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 5. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 5 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S5 must be equal to 0.
`define AXI_AR_MCA_NC_S5 1

// Set to 1 if AXI_AR_MCA_NC_S5 is > 1.
`define AXI_AR_MCA_EN_S5 (`AXI_AR_MCA_NC_S5 > 1)

// Log base 2 of AXI_AR_MCA_NC_S5.
`define AXI_AR_MCA_NC_W_S5 1



// Name:         AXI_AW_MCA_NC_S5
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 5)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 5. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 5. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 5 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S5 must be equal to 0.
`define AXI_AW_MCA_NC_S5 1

// Set to 1 if AXI_AW_MCA_NC_S5 is > 1.
`define AXI_AW_MCA_EN_S5 (`AXI_AW_MCA_NC_S5 > 1)

// Log base 2 of AXI_AW_MCA_NC_S5.
`define AXI_AW_MCA_NC_W_S5 1



// Name:         AXI_W_MCA_NC_S5
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_WID_S5 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 5. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 5. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 5 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S5 == 1 then AXI_W_MCA_NC_S5 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S5 1

// Set to 1 if AXI_W_MCA_NC_S5 is > 1.
`define AXI_W_MCA_EN_S5 (`AXI_W_MCA_NC_S5 > 1)

// Log base 2 of AXI_W_MCA_NC_S5.
`define AXI_W_MCA_NC_W_S5 1



// Name:         AXI_AR_MCA_NC_S6
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 6)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 6. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 6. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 6 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S6 must be equal to 0.
`define AXI_AR_MCA_NC_S6 1

// Set to 1 if AXI_AR_MCA_NC_S6 is > 1.
`define AXI_AR_MCA_EN_S6 (`AXI_AR_MCA_NC_S6 > 1)

// Log base 2 of AXI_AR_MCA_NC_S6.
`define AXI_AR_MCA_NC_W_S6 1



// Name:         AXI_AW_MCA_NC_S6
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 6)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 6. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 6. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 6 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S6 must be equal to 0.
`define AXI_AW_MCA_NC_S6 1

// Set to 1 if AXI_AW_MCA_NC_S6 is > 1.
`define AXI_AW_MCA_EN_S6 (`AXI_AW_MCA_NC_S6 > 1)

// Log base 2 of AXI_AW_MCA_NC_S6.
`define AXI_AW_MCA_NC_W_S6 1



// Name:         AXI_W_MCA_NC_S6
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_WID_S6 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 6. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 6. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 6 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S6 == 1 then AXI_W_MCA_NC_S6 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S6 1

// Set to 1 if AXI_W_MCA_NC_S6 is > 1.
`define AXI_W_MCA_EN_S6 (`AXI_W_MCA_NC_S6 > 1)

// Log base 2 of AXI_W_MCA_NC_S6.
`define AXI_W_MCA_NC_W_S6 1



// Name:         AXI_AR_MCA_NC_S7
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 7)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 7. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 7. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 7 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S7 must be equal to 0.
`define AXI_AR_MCA_NC_S7 1

// Set to 1 if AXI_AR_MCA_NC_S7 is > 1.
`define AXI_AR_MCA_EN_S7 (`AXI_AR_MCA_NC_S7 > 1)

// Log base 2 of AXI_AR_MCA_NC_S7.
`define AXI_AR_MCA_NC_W_S7 1



// Name:         AXI_AW_MCA_NC_S7
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 7)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 7. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 7. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 7 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S7 must be equal to 0.
`define AXI_AW_MCA_NC_S7 1

// Set to 1 if AXI_AW_MCA_NC_S7 is > 1.
`define AXI_AW_MCA_EN_S7 (`AXI_AW_MCA_NC_S7 > 1)

// Log base 2 of AXI_AW_MCA_NC_S7.
`define AXI_AW_MCA_NC_W_S7 1



// Name:         AXI_W_MCA_NC_S7
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_WID_S7 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 7. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 7. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 7 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S7 == 1 then AXI_W_MCA_NC_S7 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S7 1

// Set to 1 if AXI_W_MCA_NC_S7 is > 1.
`define AXI_W_MCA_EN_S7 (`AXI_W_MCA_NC_S7 > 1)

// Log base 2 of AXI_W_MCA_NC_S7.
`define AXI_W_MCA_NC_W_S7 1



// Name:         AXI_AR_MCA_NC_S8
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 8)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 8. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 8. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 8 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S8 must be equal to 0.
`define AXI_AR_MCA_NC_S8 1

// Set to 1 if AXI_AR_MCA_NC_S8 is > 1.
`define AXI_AR_MCA_EN_S8 (`AXI_AR_MCA_NC_S8 > 1)

// Log base 2 of AXI_AR_MCA_NC_S8.
`define AXI_AR_MCA_NC_W_S8 1



// Name:         AXI_AW_MCA_NC_S8
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 8)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 8. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 8. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 8 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S8 must be equal to 0.
`define AXI_AW_MCA_NC_S8 1

// Set to 1 if AXI_AW_MCA_NC_S8 is > 1.
`define AXI_AW_MCA_EN_S8 (`AXI_AW_MCA_NC_S8 > 1)

// Log base 2 of AXI_AW_MCA_NC_S8.
`define AXI_AW_MCA_NC_W_S8 1



// Name:         AXI_W_MCA_NC_S8
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_WID_S8 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 8. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 8. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 8 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S8 == 1 then AXI_W_MCA_NC_S8 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S8 1

// Set to 1 if AXI_W_MCA_NC_S8 is > 1.
`define AXI_W_MCA_EN_S8 (`AXI_W_MCA_NC_S8 > 1)

// Log base 2 of AXI_W_MCA_NC_S8.
`define AXI_W_MCA_NC_W_S8 1



// Name:         AXI_AR_MCA_NC_S9
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 9)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 9. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 9. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 9 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S9 must be equal to 0.
`define AXI_AR_MCA_NC_S9 1

// Set to 1 if AXI_AR_MCA_NC_S9 is > 1.
`define AXI_AR_MCA_EN_S9 (`AXI_AR_MCA_NC_S9 > 1)

// Log base 2 of AXI_AR_MCA_NC_S9.
`define AXI_AR_MCA_NC_W_S9 1



// Name:         AXI_AW_MCA_NC_S9
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 9)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 9. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 9. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 9 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S9 must be equal to 0.
`define AXI_AW_MCA_NC_S9 1

// Set to 1 if AXI_AW_MCA_NC_S9 is > 1.
`define AXI_AW_MCA_EN_S9 (`AXI_AW_MCA_NC_S9 > 1)

// Log base 2 of AXI_AW_MCA_NC_S9.
`define AXI_AW_MCA_NC_W_S9 1



// Name:         AXI_W_MCA_NC_S9
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_WID_S9 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 9. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 9. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 9 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S9 == 1 then AXI_W_MCA_NC_S9 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S9 1

// Set to 1 if AXI_W_MCA_NC_S9 is > 1.
`define AXI_W_MCA_EN_S9 (`AXI_W_MCA_NC_S9 > 1)

// Log base 2 of AXI_W_MCA_NC_S9.
`define AXI_W_MCA_NC_W_S9 1



// Name:         AXI_AR_MCA_NC_S10
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 10)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 10. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 10. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 10 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S10 must be equal to 0.
`define AXI_AR_MCA_NC_S10 1

// Set to 1 if AXI_AR_MCA_NC_S10 is > 1.
`define AXI_AR_MCA_EN_S10 (`AXI_AR_MCA_NC_S10 > 1)

// Log base 2 of AXI_AR_MCA_NC_S10.
`define AXI_AR_MCA_NC_W_S10 1



// Name:         AXI_AW_MCA_NC_S10
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 10)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 10. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 10. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 10 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S10 must be equal to 0.
`define AXI_AW_MCA_NC_S10 1

// Set to 1 if AXI_AW_MCA_NC_S10 is > 1.
`define AXI_AW_MCA_EN_S10 (`AXI_AW_MCA_NC_S10 > 1)

// Log base 2 of AXI_AW_MCA_NC_S10.
`define AXI_AW_MCA_NC_W_S10 1



// Name:         AXI_W_MCA_NC_S10
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_WID_S10 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 10. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 10. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 10 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S10 == 1 then AXI_W_MCA_NC_S10 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S10 1

// Set to 1 if AXI_W_MCA_NC_S10 is > 1.
`define AXI_W_MCA_EN_S10 (`AXI_W_MCA_NC_S10 > 1)

// Log base 2 of AXI_W_MCA_NC_S10.
`define AXI_W_MCA_NC_W_S10 1



// Name:         AXI_AR_MCA_NC_S11
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 11)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 11. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 11. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 11 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S11 must be equal to 0.
`define AXI_AR_MCA_NC_S11 1

// Set to 1 if AXI_AR_MCA_NC_S11 is > 1.
`define AXI_AR_MCA_EN_S11 (`AXI_AR_MCA_NC_S11 > 1)

// Log base 2 of AXI_AR_MCA_NC_S11.
`define AXI_AR_MCA_NC_W_S11 1



// Name:         AXI_AW_MCA_NC_S11
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 11)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 11. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 11. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 11 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S11 must be equal to 0.
`define AXI_AW_MCA_NC_S11 1

// Set to 1 if AXI_AW_MCA_NC_S11 is > 1.
`define AXI_AW_MCA_EN_S11 (`AXI_AW_MCA_NC_S11 > 1)

// Log base 2 of AXI_AW_MCA_NC_S11.
`define AXI_AW_MCA_NC_W_S11 1



// Name:         AXI_W_MCA_NC_S11
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_WID_S11 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 11. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 11. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 11 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S11 == 1 then AXI_W_MCA_NC_S11 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S11 1

// Set to 1 if AXI_W_MCA_NC_S11 is > 1.
`define AXI_W_MCA_EN_S11 (`AXI_W_MCA_NC_S11 > 1)

// Log base 2 of AXI_W_MCA_NC_S11.
`define AXI_W_MCA_NC_W_S11 1



// Name:         AXI_AR_MCA_NC_S12
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 12)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 12. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 12. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 12 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S12 must be equal to 0.
`define AXI_AR_MCA_NC_S12 1

// Set to 1 if AXI_AR_MCA_NC_S12 is > 1.
`define AXI_AR_MCA_EN_S12 (`AXI_AR_MCA_NC_S12 > 1)

// Log base 2 of AXI_AR_MCA_NC_S12.
`define AXI_AR_MCA_NC_W_S12 1



// Name:         AXI_AW_MCA_NC_S12
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 12)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 12. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 12. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 12 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S12 must be equal to 0.
`define AXI_AW_MCA_NC_S12 1

// Set to 1 if AXI_AW_MCA_NC_S12 is > 1.
`define AXI_AW_MCA_EN_S12 (`AXI_AW_MCA_NC_S12 > 1)

// Log base 2 of AXI_AW_MCA_NC_S12.
`define AXI_AW_MCA_NC_W_S12 1



// Name:         AXI_W_MCA_NC_S12
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_WID_S12 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 12. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 12. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 12 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S12 == 1 then AXI_W_MCA_NC_S12 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S12 1

// Set to 1 if AXI_W_MCA_NC_S12 is > 1.
`define AXI_W_MCA_EN_S12 (`AXI_W_MCA_NC_S12 > 1)

// Log base 2 of AXI_W_MCA_NC_S12.
`define AXI_W_MCA_NC_W_S12 1



// Name:         AXI_AR_MCA_NC_S13
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 13)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 13. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 13. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 13 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S13 must be equal to 0.
`define AXI_AR_MCA_NC_S13 1

// Set to 1 if AXI_AR_MCA_NC_S13 is > 1.
`define AXI_AR_MCA_EN_S13 (`AXI_AR_MCA_NC_S13 > 1)

// Log base 2 of AXI_AR_MCA_NC_S13.
`define AXI_AR_MCA_NC_W_S13 1



// Name:         AXI_AW_MCA_NC_S13
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 13)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 13. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 13. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 13 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S13 must be equal to 0.
`define AXI_AW_MCA_NC_S13 1

// Set to 1 if AXI_AW_MCA_NC_S13 is > 1.
`define AXI_AW_MCA_EN_S13 (`AXI_AW_MCA_NC_S13 > 1)

// Log base 2 of AXI_AW_MCA_NC_S13.
`define AXI_AW_MCA_NC_W_S13 1



// Name:         AXI_W_MCA_NC_S13
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_WID_S13 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 13. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 13. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 13 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S13 == 1 then AXI_W_MCA_NC_S13 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S13 1

// Set to 1 if AXI_W_MCA_NC_S13 is > 1.
`define AXI_W_MCA_EN_S13 (`AXI_W_MCA_NC_S13 > 1)

// Log base 2 of AXI_W_MCA_NC_S13.
`define AXI_W_MCA_NC_W_S13 1



// Name:         AXI_AR_MCA_NC_S14
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 14)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 14. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 14. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 14 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S14 must be equal to 0.
`define AXI_AR_MCA_NC_S14 1

// Set to 1 if AXI_AR_MCA_NC_S14 is > 1.
`define AXI_AR_MCA_EN_S14 (`AXI_AR_MCA_NC_S14 > 1)

// Log base 2 of AXI_AR_MCA_NC_S14.
`define AXI_AR_MCA_NC_W_S14 1



// Name:         AXI_AW_MCA_NC_S14
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 14)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 14. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 14. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 14 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S14 must be equal to 0.
`define AXI_AW_MCA_NC_S14 1

// Set to 1 if AXI_AW_MCA_NC_S14 is > 1.
`define AXI_AW_MCA_EN_S14 (`AXI_AW_MCA_NC_S14 > 1)

// Log base 2 of AXI_AW_MCA_NC_S14.
`define AXI_AW_MCA_NC_W_S14 1



// Name:         AXI_W_MCA_NC_S14
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_WID_S14 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 14. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 14. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 14 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S14 == 1 then AXI_W_MCA_NC_S14 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S14 1

// Set to 1 if AXI_W_MCA_NC_S14 is > 1.
`define AXI_W_MCA_EN_S14 (`AXI_W_MCA_NC_S14 > 1)

// Log base 2 of AXI_W_MCA_NC_S14.
`define AXI_W_MCA_NC_W_S14 1



// Name:         AXI_AR_MCA_NC_S15
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 15)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 15. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 15. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 15 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S15 must be equal to 0.
`define AXI_AR_MCA_NC_S15 1

// Set to 1 if AXI_AR_MCA_NC_S15 is > 1.
`define AXI_AR_MCA_EN_S15 (`AXI_AR_MCA_NC_S15 > 1)

// Log base 2 of AXI_AR_MCA_NC_S15.
`define AXI_AR_MCA_NC_W_S15 1



// Name:         AXI_AW_MCA_NC_S15
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 15)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 15. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 15. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 15 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S15 must be equal to 0.
`define AXI_AW_MCA_NC_S15 1

// Set to 1 if AXI_AW_MCA_NC_S15 is > 1.
`define AXI_AW_MCA_EN_S15 (`AXI_AW_MCA_NC_S15 > 1)

// Log base 2 of AXI_AW_MCA_NC_S15.
`define AXI_AW_MCA_NC_W_S15 1



// Name:         AXI_W_MCA_NC_S15
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_WID_S15 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 15. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 15. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 15 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S15 == 1 then AXI_W_MCA_NC_S15 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S15 1

// Set to 1 if AXI_W_MCA_NC_S15 is > 1.
`define AXI_W_MCA_EN_S15 (`AXI_W_MCA_NC_S15 > 1)

// Log base 2 of AXI_W_MCA_NC_S15.
`define AXI_W_MCA_NC_W_S15 1



// Name:         AXI_AR_MCA_NC_S16
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 16)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Address channel of slave port 16. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Address channel for slave port 16. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Address 
// channel of slave port 16 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AR_MCA_NC_S16 must be equal to 0.
`define AXI_AR_MCA_NC_S16 1

// Set to 1 if AXI_AR_MCA_NC_S16 is > 1.
`define AXI_AR_MCA_EN_S16 (`AXI_AR_MCA_NC_S16 > 1)

// Log base 2 of AXI_AR_MCA_NC_S16.
`define AXI_AR_MCA_NC_W_S16 1



// Name:         AXI_AW_MCA_NC_S16
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 16)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Address channel of slave port 16. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Address channel for slave port 16. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Address 
// channel of slave port 16 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_HAS_LOCKING==1, multi cycle arbitration can not be used on the address channels i.e. AXI_AW_MCA_NC_S16 must be equal to 0.
`define AXI_AW_MCA_NC_S16 1

// Set to 1 if AXI_AW_MCA_NC_S16 is > 1.
`define AXI_AW_MCA_EN_S16 (`AXI_AW_MCA_NC_S16 > 1)

// Log base 2 of AXI_AW_MCA_NC_S16.
`define AXI_AW_MCA_NC_W_S16 1



// Name:         AXI_W_MCA_NC_S16
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_WID_S16 > 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Write Data channel of slave port 16. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Write Data channel for slave port 16. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Write Data 
// channel of slave port 16 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration. 
//  
//  
// Dependancy : If AXI_WID_S16 == 1 then AXI_W_MCA_NC_S16 is disabled. 
//              If there is a write interleaving depth of 1 at a slave port write data 
//              channel there is no arbiter inferred at that point. Logic that applies 
//              AXI write data ordering rules allows only 1 master at a time to 
//              send write data to the slave, in address order.
`define AXI_W_MCA_NC_S16 1

// Set to 1 if AXI_W_MCA_NC_S16 is > 1.
`define AXI_W_MCA_EN_S16 (`AXI_W_MCA_NC_S16 > 1)

// Log base 2 of AXI_W_MCA_NC_S16.
`define AXI_W_MCA_NC_W_S16 1



// Name:         AXI_R_MCA_NC_M1
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 1. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 1. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 1 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M1 1

// Set to 1 if AXI_R_MCA_NC_S1 is > 1.
`define AXI_R_MCA_EN_M1 (`AXI_R_MCA_NC_M1 > 1)

// Log base 2 of AXI_R_MCA_NC_M1.
`define AXI_R_MCA_NC_W_M1 1




// Name:         AXI_B_MCA_NC_M1
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 1)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 1. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 1. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 1 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M1 1

// Set to 1 if AXI_B_MCA_NC_S1 is > 1.
`define AXI_B_MCA_EN_M1 (`AXI_B_MCA_NC_M1 > 1)

// Log base 2 of AXI_B_MCA_NC_M1.
`define AXI_B_MCA_NC_W_M1 1




// Name:         AXI_R_MCA_NC_M2
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 2)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 2. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 2. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 2 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M2 1

// Set to 1 if AXI_R_MCA_NC_S2 is > 1.
`define AXI_R_MCA_EN_M2 (`AXI_R_MCA_NC_M2 > 1)

// Log base 2 of AXI_R_MCA_NC_M2.
`define AXI_R_MCA_NC_W_M2 1




// Name:         AXI_B_MCA_NC_M2
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 2)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 2. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 2. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 2 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M2 1

// Set to 1 if AXI_B_MCA_NC_S2 is > 1.
`define AXI_B_MCA_EN_M2 (`AXI_B_MCA_NC_M2 > 1)

// Log base 2 of AXI_B_MCA_NC_M2.
`define AXI_B_MCA_NC_W_M2 1




// Name:         AXI_R_MCA_NC_M3
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 3)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 3. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 3. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 3 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M3 1

// Set to 1 if AXI_R_MCA_NC_S3 is > 1.
`define AXI_R_MCA_EN_M3 (`AXI_R_MCA_NC_M3 > 1)

// Log base 2 of AXI_R_MCA_NC_M3.
`define AXI_R_MCA_NC_W_M3 1




// Name:         AXI_B_MCA_NC_M3
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 3)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 3. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 3. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 3 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M3 1

// Set to 1 if AXI_B_MCA_NC_S3 is > 1.
`define AXI_B_MCA_EN_M3 (`AXI_B_MCA_NC_M3 > 1)

// Log base 2 of AXI_B_MCA_NC_M3.
`define AXI_B_MCA_NC_W_M3 1




// Name:         AXI_R_MCA_NC_M4
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 4)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 4. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 4. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 4 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M4 1

// Set to 1 if AXI_R_MCA_NC_S4 is > 1.
`define AXI_R_MCA_EN_M4 (`AXI_R_MCA_NC_M4 > 1)

// Log base 2 of AXI_R_MCA_NC_M4.
`define AXI_R_MCA_NC_W_M4 1




// Name:         AXI_B_MCA_NC_M4
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 4)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 4. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 4. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 4 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M4 1

// Set to 1 if AXI_B_MCA_NC_S4 is > 1.
`define AXI_B_MCA_EN_M4 (`AXI_B_MCA_NC_M4 > 1)

// Log base 2 of AXI_B_MCA_NC_M4.
`define AXI_B_MCA_NC_W_M4 1




// Name:         AXI_R_MCA_NC_M5
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 5)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 5. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 5. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 5 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M5 1

// Set to 1 if AXI_R_MCA_NC_S5 is > 1.
`define AXI_R_MCA_EN_M5 (`AXI_R_MCA_NC_M5 > 1)

// Log base 2 of AXI_R_MCA_NC_M5.
`define AXI_R_MCA_NC_W_M5 1




// Name:         AXI_B_MCA_NC_M5
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 5)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 5. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 5. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 5 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M5 1

// Set to 1 if AXI_B_MCA_NC_S5 is > 1.
`define AXI_B_MCA_EN_M5 (`AXI_B_MCA_NC_M5 > 1)

// Log base 2 of AXI_B_MCA_NC_M5.
`define AXI_B_MCA_NC_W_M5 1




// Name:         AXI_R_MCA_NC_M6
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 6)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 6. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 6. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 6 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M6 1

// Set to 1 if AXI_R_MCA_NC_S6 is > 1.
`define AXI_R_MCA_EN_M6 (`AXI_R_MCA_NC_M6 > 1)

// Log base 2 of AXI_R_MCA_NC_M6.
`define AXI_R_MCA_NC_W_M6 1




// Name:         AXI_B_MCA_NC_M6
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 6)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 6. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 6. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 6 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M6 1

// Set to 1 if AXI_B_MCA_NC_S6 is > 1.
`define AXI_B_MCA_EN_M6 (`AXI_B_MCA_NC_M6 > 1)

// Log base 2 of AXI_B_MCA_NC_M6.
`define AXI_B_MCA_NC_W_M6 1




// Name:         AXI_R_MCA_NC_M7
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 7)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 7. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 7. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 7 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M7 1

// Set to 1 if AXI_R_MCA_NC_S7 is > 1.
`define AXI_R_MCA_EN_M7 (`AXI_R_MCA_NC_M7 > 1)

// Log base 2 of AXI_R_MCA_NC_M7.
`define AXI_R_MCA_NC_W_M7 1




// Name:         AXI_B_MCA_NC_M7
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 7)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 7. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 7. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 7 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M7 1

// Set to 1 if AXI_B_MCA_NC_S7 is > 1.
`define AXI_B_MCA_EN_M7 (`AXI_B_MCA_NC_M7 > 1)

// Log base 2 of AXI_B_MCA_NC_M7.
`define AXI_B_MCA_NC_W_M7 1




// Name:         AXI_R_MCA_NC_M8
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 8)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 8. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 8. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 8 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M8 1

// Set to 1 if AXI_R_MCA_NC_S8 is > 1.
`define AXI_R_MCA_EN_M8 (`AXI_R_MCA_NC_M8 > 1)

// Log base 2 of AXI_R_MCA_NC_M8.
`define AXI_R_MCA_NC_W_M8 1




// Name:         AXI_B_MCA_NC_M8
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 8)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 8. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 8. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 8 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M8 1

// Set to 1 if AXI_B_MCA_NC_S8 is > 1.
`define AXI_B_MCA_EN_M8 (`AXI_B_MCA_NC_M8 > 1)

// Log base 2 of AXI_B_MCA_NC_M8.
`define AXI_B_MCA_NC_W_M8 1




// Name:         AXI_R_MCA_NC_M9
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 9)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 9. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 9. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 9 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M9 1

// Set to 1 if AXI_R_MCA_NC_S9 is > 1.
`define AXI_R_MCA_EN_M9 (`AXI_R_MCA_NC_M9 > 1)

// Log base 2 of AXI_R_MCA_NC_M9.
`define AXI_R_MCA_NC_W_M9 1




// Name:         AXI_B_MCA_NC_M9
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 9)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 9. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 9. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 9 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M9 1

// Set to 1 if AXI_B_MCA_NC_S9 is > 1.
`define AXI_B_MCA_EN_M9 (`AXI_B_MCA_NC_M9 > 1)

// Log base 2 of AXI_B_MCA_NC_M9.
`define AXI_B_MCA_NC_W_M9 1




// Name:         AXI_R_MCA_NC_M10
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 10)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 10. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 10. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 10 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M10 1

// Set to 1 if AXI_R_MCA_NC_S10 is > 1.
`define AXI_R_MCA_EN_M10 (`AXI_R_MCA_NC_M10 > 1)

// Log base 2 of AXI_R_MCA_NC_M10.
`define AXI_R_MCA_NC_W_M10 1




// Name:         AXI_B_MCA_NC_M10
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 10)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 10. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 10. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 10 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M10 1

// Set to 1 if AXI_B_MCA_NC_S10 is > 1.
`define AXI_B_MCA_EN_M10 (`AXI_B_MCA_NC_M10 > 1)

// Log base 2 of AXI_B_MCA_NC_M10.
`define AXI_B_MCA_NC_W_M10 1




// Name:         AXI_R_MCA_NC_M11
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 11)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 11. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 11. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 11 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M11 1

// Set to 1 if AXI_R_MCA_NC_S11 is > 1.
`define AXI_R_MCA_EN_M11 (`AXI_R_MCA_NC_M11 > 1)

// Log base 2 of AXI_R_MCA_NC_M11.
`define AXI_R_MCA_NC_W_M11 1




// Name:         AXI_B_MCA_NC_M11
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 11)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 11. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 11. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 11 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M11 1

// Set to 1 if AXI_B_MCA_NC_S11 is > 1.
`define AXI_B_MCA_EN_M11 (`AXI_B_MCA_NC_M11 > 1)

// Log base 2 of AXI_B_MCA_NC_M11.
`define AXI_B_MCA_NC_W_M11 1




// Name:         AXI_R_MCA_NC_M12
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 12)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 12. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 12. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 12 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M12 1

// Set to 1 if AXI_R_MCA_NC_S12 is > 1.
`define AXI_R_MCA_EN_M12 (`AXI_R_MCA_NC_M12 > 1)

// Log base 2 of AXI_R_MCA_NC_M12.
`define AXI_R_MCA_NC_W_M12 1




// Name:         AXI_B_MCA_NC_M12
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 12)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 12. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 12. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 12 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M12 1

// Set to 1 if AXI_B_MCA_NC_S12 is > 1.
`define AXI_B_MCA_EN_M12 (`AXI_B_MCA_NC_M12 > 1)

// Log base 2 of AXI_B_MCA_NC_M12.
`define AXI_B_MCA_NC_W_M12 1




// Name:         AXI_R_MCA_NC_M13
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 13)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 13. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 13. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 13 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M13 1

// Set to 1 if AXI_R_MCA_NC_S13 is > 1.
`define AXI_R_MCA_EN_M13 (`AXI_R_MCA_NC_M13 > 1)

// Log base 2 of AXI_R_MCA_NC_M13.
`define AXI_R_MCA_NC_W_M13 1




// Name:         AXI_B_MCA_NC_M13
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 13)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 13. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 13. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 13 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M13 1

// Set to 1 if AXI_B_MCA_NC_S13 is > 1.
`define AXI_B_MCA_EN_M13 (`AXI_B_MCA_NC_M13 > 1)

// Log base 2 of AXI_B_MCA_NC_M13.
`define AXI_B_MCA_NC_W_M13 1




// Name:         AXI_R_MCA_NC_M14
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 14)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 14. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 14. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 14 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M14 1

// Set to 1 if AXI_R_MCA_NC_S14 is > 1.
`define AXI_R_MCA_EN_M14 (`AXI_R_MCA_NC_M14 > 1)

// Log base 2 of AXI_R_MCA_NC_M14.
`define AXI_R_MCA_NC_W_M14 1




// Name:         AXI_B_MCA_NC_M14
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 14)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 14. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 14. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 14 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M14 1

// Set to 1 if AXI_B_MCA_NC_S14 is > 1.
`define AXI_B_MCA_EN_M14 (`AXI_B_MCA_NC_M14 > 1)

// Log base 2 of AXI_B_MCA_NC_M14.
`define AXI_B_MCA_NC_W_M14 1




// Name:         AXI_R_MCA_NC_M15
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 15)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 15. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 15. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 15 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M15 1

// Set to 1 if AXI_R_MCA_NC_S15 is > 1.
`define AXI_R_MCA_EN_M15 (`AXI_R_MCA_NC_M15 > 1)

// Log base 2 of AXI_R_MCA_NC_M15.
`define AXI_R_MCA_NC_W_M15 1




// Name:         AXI_B_MCA_NC_M15
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 15)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 15. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 15. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 15 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M15 1

// Set to 1 if AXI_B_MCA_NC_S15 is > 1.
`define AXI_B_MCA_EN_M15 (`AXI_B_MCA_NC_M15 > 1)

// Log base 2 of AXI_B_MCA_NC_M15.
`define AXI_B_MCA_NC_W_M15 1




// Name:         AXI_R_MCA_NC_M16
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 16)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Read Data channel of master port 16. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Read Data channel for master port 16. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Read Data 
// channel of master port 16 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_MCA_NC_M16 1

// Set to 1 if AXI_R_MCA_NC_S16 is > 1.
`define AXI_R_MCA_EN_M16 (`AXI_R_MCA_NC_M16 > 1)

// Log base 2 of AXI_R_MCA_NC_M16.
`define AXI_R_MCA_NC_W_M16 1




// Name:         AXI_B_MCA_NC_M16
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_NUM_MASTERS >= 16)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the Burst Response channel of master port 16. 
//  
// If a value larger than 1 is selectd then multi cycle arbitration will be  
// enabled in the Burst Response channel for master port 16. 
//  
// Enabling this feature will instantiate logic around the arbiter in the Burst Response 
// channel of master port 16 such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_MCA_NC_M16 1

// Set to 1 if AXI_B_MCA_NC_S16 is > 1.
`define AXI_B_MCA_EN_M16 (`AXI_B_MCA_NC_M16 > 1)

// Log base 2 of AXI_B_MCA_NC_M16.
`define AXI_B_MCA_NC_W_M16 1




// Name:         AXI_AR_SHARED_MCA_NC
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_AR_HAS_SHARED_LAYER)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the shared Read Address channel. 
//  
// If a value larger than 1 is selected then multi cycle arbitration will be  
// enabled in the shared Read Address channel. 
//  
// Enabling this feature will instantiate logic around the arbiter in the shared Read Address 
// channel such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_AR_SHARED_MCA_NC 1

// Set to 1 if AXI_AR_SHARED_MCA_NC is > 1.
`define AXI_AR_SHARED_MCA_EN (`AXI_AR_SHARED_MCA_NC > 1)

// Log base 2 of AXI_AR_SHARED_MCA_NC.
`define AXI_AR_SHARED_MCA_NC_W 1



// Name:         AXI_AW_SHARED_MCA_NC
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_AW_HAS_SHARED_LAYER)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the shared Write Address channel. 
//  
// If a value larger than 1 is selected then multi cycle arbitration will be  
// enabled in the shared Write Address channel. 
//  
// Enabling this feature will instantiate logic around the arbiter in the shared Write Address 
// channel such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_AW_SHARED_MCA_NC 1

// Set to 1 if AXI_AW_SHARED_MCA_NC is > 1.
`define AXI_AW_SHARED_MCA_EN (`AXI_AW_SHARED_MCA_NC > 1)

// Log base 2 of AXI_AW_SHARED_MCA_NC.
`define AXI_AW_SHARED_MCA_NC_W 1



// Name:         AXI_W_SHARED_MCA_NC
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_W_HAS_SHARED_LAYER)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the shared Write Data channel. 
//  
// If a value larger than 1 is selected then multi cycle arbitration will be  
// enabled in the shared Write Data channel. 
//  
// Enabling this feature will instantiate logic around the arbiter in the shared Write Data 
// channel such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to allow the DW_axi to be synthesized to high  
// frequencies by allowing the channel arbiters to be removed from the worst logic paths.  
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_W_SHARED_MCA_NC 1

// Set to 1 if AXI_W_SHARED_MCA_NC is > 1.
`define AXI_W_SHARED_MCA_EN (`AXI_W_SHARED_MCA_NC > 1)

// Log base 2 of AXI_W_SHARED_MCA_NC.
`define AXI_W_SHARED_MCA_NC_W 1



// Name:         AXI_R_SHARED_MCA_NC
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_R_HAS_SHARED_LAYER)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the shared Read Data channel. 
//  
// If a value larger than 1 is selected then multi cycle arbitration will be  
// enabled in the shared Read Data channel. 
//  
// Enabling this feature will instantiate logic around the arbiter in the shared Read Data 
// channel such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_R_SHARED_MCA_NC 1

// Set to 1 if AXI_R_SHARED_MCA_NC is > 1.
`define AXI_R_SHARED_MCA_EN (`AXI_R_SHARED_MCA_NC > 1) 

// Log base 2 of AXI_R_SHARED_MCA_NC.
`define AXI_R_SHARED_MCA_NC_W 1



// Name:         AXI_B_SHARED_MCA_NC
// Default:      1
// Values:       1, ..., 16
// Enabled:      (AXI_B_HAS_SHARED_LAYER)
// 
// Selects the number of cycles over which arbitration will be performed for  
// the arbiter in the shared Burst Response channel. 
//  
// If a value larger than 1 is selected then multi cycle arbitration will be  
// enabled in the shared Burst Response channel. 
//  
// Enabling this feature will instantiate logic around the arbiter in the shared Burst Response 
// channel such that paths through the arbiter can be specified as  
// multi cycle paths. This can help to ease timing congestion in the configuration 
// by easing the timing requirements through large arbiters. 
//  
// This option allows complex arbitration schemes such as first come first served or 
// fair among equals to be used with large client numbers without negatively  
// affecting the maximum clock frequency of the configuration.
`define AXI_B_SHARED_MCA_NC 1

// Set to 1 if AXI_B_SHARED_MCA_NC is > 1.
`define AXI_B_SHARED_MCA_EN (`AXI_B_SHARED_MCA_NC > 1) 

// Log base 2 of AXI_B_SHARED_MCA_NC.
`define AXI_B_SHARED_MCA_NC_W 1



// Name:         AXI_MAX_RCA_ID_M1
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 1
// 
// This sets the maximum number of read commands that an external 
// master 1 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 1 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M1 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 1
`define AXI_LOG2_MAX_RCA_ID_P1_M1 3


// Name:         AXI_MAX_WCA_ID_M1
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 1
// 
// This sets the maximum number of write commands that an external 
// master 1 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 1 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M1 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 1
`define AXI_LOG2_MAX_WCA_ID_P1_M1 3


// Name:         AXI_MAX_URIDA_M1
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 1
// 
// This sets the maximum number of read commands that an external  
// master 1 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 1 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M1 5

//Is the log2 form of AXI_MAX_URIDA_M1
`define AXI_LOG2_MAX_URIDA_M1 3


// Name:         AXI_MAX_UWIDA_M1
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 1
// 
// This sets the maximum number of write commands that an external  
// master 1 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 1 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M1 5

//Is the log2 form of AXI_MAX_UWIDA_M1
`define AXI_LOG2_MAX_UWIDA_M1 3


// Name:         AXI_RI_LIMIT_M1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 1) & (AXI_M1_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 1. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 1 is AXI_MAX_URIDA_M1. 
//  
// Disabled if master 1 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M1 0


// Name:         AXI_MAX_RCA_ID_M2
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 2
// 
// This sets the maximum number of read commands that an external 
// master 2 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 2 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M2 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 2
`define AXI_LOG2_MAX_RCA_ID_P1_M2 3


// Name:         AXI_MAX_WCA_ID_M2
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 2
// 
// This sets the maximum number of write commands that an external 
// master 2 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 2 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M2 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 2
`define AXI_LOG2_MAX_WCA_ID_P1_M2 3


// Name:         AXI_MAX_URIDA_M2
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 2
// 
// This sets the maximum number of read commands that an external  
// master 2 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 2 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M2 5

//Is the log2 form of AXI_MAX_URIDA_M2
`define AXI_LOG2_MAX_URIDA_M2 3


// Name:         AXI_MAX_UWIDA_M2
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 2
// 
// This sets the maximum number of write commands that an external  
// master 2 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 2 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M2 5

//Is the log2 form of AXI_MAX_UWIDA_M2
`define AXI_LOG2_MAX_UWIDA_M2 3


// Name:         AXI_RI_LIMIT_M2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 2) & (AXI_M2_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 2. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 2 is AXI_MAX_URIDA_M2. 
//  
// Disabled if master 2 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M2 0


// Name:         AXI_MAX_RCA_ID_M3
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 3
// 
// This sets the maximum number of read commands that an external 
// master 3 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 3 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M3 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 3
`define AXI_LOG2_MAX_RCA_ID_P1_M3 3


// Name:         AXI_MAX_WCA_ID_M3
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 3
// 
// This sets the maximum number of write commands that an external 
// master 3 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 3 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M3 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 3
`define AXI_LOG2_MAX_WCA_ID_P1_M3 3


// Name:         AXI_MAX_URIDA_M3
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 3
// 
// This sets the maximum number of read commands that an external  
// master 3 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 3 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M3 5

//Is the log2 form of AXI_MAX_URIDA_M3
`define AXI_LOG2_MAX_URIDA_M3 3


// Name:         AXI_MAX_UWIDA_M3
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 3
// 
// This sets the maximum number of write commands that an external  
// master 3 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 3 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M3 5

//Is the log2 form of AXI_MAX_UWIDA_M3
`define AXI_LOG2_MAX_UWIDA_M3 3


// Name:         AXI_RI_LIMIT_M3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 3) & (AXI_M3_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 3. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 3 is AXI_MAX_URIDA_M3. 
//  
// Disabled if master 3 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M3 0


// Name:         AXI_MAX_RCA_ID_M4
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 4
// 
// This sets the maximum number of read commands that an external 
// master 4 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 4 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M4 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 4
`define AXI_LOG2_MAX_RCA_ID_P1_M4 3


// Name:         AXI_MAX_WCA_ID_M4
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 4
// 
// This sets the maximum number of write commands that an external 
// master 4 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 4 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M4 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 4
`define AXI_LOG2_MAX_WCA_ID_P1_M4 3


// Name:         AXI_MAX_URIDA_M4
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 4
// 
// This sets the maximum number of read commands that an external  
// master 4 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 4 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M4 5

//Is the log2 form of AXI_MAX_URIDA_M4
`define AXI_LOG2_MAX_URIDA_M4 3


// Name:         AXI_MAX_UWIDA_M4
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 4
// 
// This sets the maximum number of write commands that an external  
// master 4 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 4 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M4 5

//Is the log2 form of AXI_MAX_UWIDA_M4
`define AXI_LOG2_MAX_UWIDA_M4 3


// Name:         AXI_RI_LIMIT_M4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 4) & (AXI_M4_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 4. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 4 is AXI_MAX_URIDA_M4. 
//  
// Disabled if master 4 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M4 0


// Name:         AXI_MAX_RCA_ID_M5
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 5
// 
// This sets the maximum number of read commands that an external 
// master 5 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 5 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M5 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 5
`define AXI_LOG2_MAX_RCA_ID_P1_M5 3


// Name:         AXI_MAX_WCA_ID_M5
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 5
// 
// This sets the maximum number of write commands that an external 
// master 5 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 5 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M5 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 5
`define AXI_LOG2_MAX_WCA_ID_P1_M5 3


// Name:         AXI_MAX_URIDA_M5
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 5
// 
// This sets the maximum number of read commands that an external  
// master 5 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 5 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M5 5

//Is the log2 form of AXI_MAX_URIDA_M5
`define AXI_LOG2_MAX_URIDA_M5 3


// Name:         AXI_MAX_UWIDA_M5
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 5
// 
// This sets the maximum number of write commands that an external  
// master 5 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 5 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M5 5

//Is the log2 form of AXI_MAX_UWIDA_M5
`define AXI_LOG2_MAX_UWIDA_M5 3


// Name:         AXI_RI_LIMIT_M5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 5) & (AXI_M5_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 5. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 5 is AXI_MAX_URIDA_M5. 
//  
// Disabled if master 5 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M5 0


// Name:         AXI_MAX_RCA_ID_M6
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 6
// 
// This sets the maximum number of read commands that an external 
// master 6 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 6 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M6 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 6
`define AXI_LOG2_MAX_RCA_ID_P1_M6 3


// Name:         AXI_MAX_WCA_ID_M6
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 6
// 
// This sets the maximum number of write commands that an external 
// master 6 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 6 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M6 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 6
`define AXI_LOG2_MAX_WCA_ID_P1_M6 3


// Name:         AXI_MAX_URIDA_M6
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 6
// 
// This sets the maximum number of read commands that an external  
// master 6 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 6 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M6 5

//Is the log2 form of AXI_MAX_URIDA_M6
`define AXI_LOG2_MAX_URIDA_M6 3


// Name:         AXI_MAX_UWIDA_M6
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 6
// 
// This sets the maximum number of write commands that an external  
// master 6 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 6 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M6 5

//Is the log2 form of AXI_MAX_UWIDA_M6
`define AXI_LOG2_MAX_UWIDA_M6 3


// Name:         AXI_RI_LIMIT_M6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 6) & (AXI_M6_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 6. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 6 is AXI_MAX_URIDA_M6. 
//  
// Disabled if master 6 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M6 0


// Name:         AXI_MAX_RCA_ID_M7
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 7
// 
// This sets the maximum number of read commands that an external 
// master 7 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 7 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M7 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 7
`define AXI_LOG2_MAX_RCA_ID_P1_M7 3


// Name:         AXI_MAX_WCA_ID_M7
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 7
// 
// This sets the maximum number of write commands that an external 
// master 7 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 7 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M7 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 7
`define AXI_LOG2_MAX_WCA_ID_P1_M7 3


// Name:         AXI_MAX_URIDA_M7
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 7
// 
// This sets the maximum number of read commands that an external  
// master 7 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 7 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M7 5

//Is the log2 form of AXI_MAX_URIDA_M7
`define AXI_LOG2_MAX_URIDA_M7 3


// Name:         AXI_MAX_UWIDA_M7
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 7
// 
// This sets the maximum number of write commands that an external  
// master 7 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 7 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M7 5

//Is the log2 form of AXI_MAX_UWIDA_M7
`define AXI_LOG2_MAX_UWIDA_M7 3


// Name:         AXI_RI_LIMIT_M7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 7) & (AXI_M7_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 7. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 7 is AXI_MAX_URIDA_M7. 
//  
// Disabled if master 7 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M7 0


// Name:         AXI_MAX_RCA_ID_M8
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 8
// 
// This sets the maximum number of read commands that an external 
// master 8 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 8 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M8 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 8
`define AXI_LOG2_MAX_RCA_ID_P1_M8 3


// Name:         AXI_MAX_WCA_ID_M8
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 8
// 
// This sets the maximum number of write commands that an external 
// master 8 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 8 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M8 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 8
`define AXI_LOG2_MAX_WCA_ID_P1_M8 3


// Name:         AXI_MAX_URIDA_M8
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 8
// 
// This sets the maximum number of read commands that an external  
// master 8 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 8 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M8 5

//Is the log2 form of AXI_MAX_URIDA_M8
`define AXI_LOG2_MAX_URIDA_M8 3


// Name:         AXI_MAX_UWIDA_M8
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 8
// 
// This sets the maximum number of write commands that an external  
// master 8 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 8 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M8 5

//Is the log2 form of AXI_MAX_UWIDA_M8
`define AXI_LOG2_MAX_UWIDA_M8 3


// Name:         AXI_RI_LIMIT_M8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 8) & (AXI_M8_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 8. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 8 is AXI_MAX_URIDA_M8. 
//  
// Disabled if master 8 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M8 0


// Name:         AXI_MAX_RCA_ID_M9
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 9
// 
// This sets the maximum number of read commands that an external 
// master 9 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 9 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M9 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 9
`define AXI_LOG2_MAX_RCA_ID_P1_M9 3


// Name:         AXI_MAX_WCA_ID_M9
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 9
// 
// This sets the maximum number of write commands that an external 
// master 9 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 9 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M9 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 9
`define AXI_LOG2_MAX_WCA_ID_P1_M9 3


// Name:         AXI_MAX_URIDA_M9
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 9
// 
// This sets the maximum number of read commands that an external  
// master 9 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 9 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M9 5

//Is the log2 form of AXI_MAX_URIDA_M9
`define AXI_LOG2_MAX_URIDA_M9 3


// Name:         AXI_MAX_UWIDA_M9
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 9
// 
// This sets the maximum number of write commands that an external  
// master 9 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 9 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M9 5

//Is the log2 form of AXI_MAX_UWIDA_M9
`define AXI_LOG2_MAX_UWIDA_M9 3


// Name:         AXI_RI_LIMIT_M9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 9) & (AXI_M9_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 9. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 9 is AXI_MAX_URIDA_M9. 
//  
// Disabled if master 9 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M9 0


// Name:         AXI_MAX_RCA_ID_M10
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 10
// 
// This sets the maximum number of read commands that an external 
// master 10 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 10 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M10 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 10
`define AXI_LOG2_MAX_RCA_ID_P1_M10 3


// Name:         AXI_MAX_WCA_ID_M10
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 10
// 
// This sets the maximum number of write commands that an external 
// master 10 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 10 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M10 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 10
`define AXI_LOG2_MAX_WCA_ID_P1_M10 3


// Name:         AXI_MAX_URIDA_M10
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 10
// 
// This sets the maximum number of read commands that an external  
// master 10 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 10 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M10 5

//Is the log2 form of AXI_MAX_URIDA_M10
`define AXI_LOG2_MAX_URIDA_M10 3


// Name:         AXI_MAX_UWIDA_M10
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 10
// 
// This sets the maximum number of write commands that an external  
// master 10 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 10 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M10 5

//Is the log2 form of AXI_MAX_UWIDA_M10
`define AXI_LOG2_MAX_UWIDA_M10 3


// Name:         AXI_RI_LIMIT_M10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 10) & (AXI_M10_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 10. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 10 is AXI_MAX_URIDA_M10. 
//  
// Disabled if master 10 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M10 0


// Name:         AXI_MAX_RCA_ID_M11
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 11
// 
// This sets the maximum number of read commands that an external 
// master 11 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 11 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M11 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 11
`define AXI_LOG2_MAX_RCA_ID_P1_M11 3


// Name:         AXI_MAX_WCA_ID_M11
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 11
// 
// This sets the maximum number of write commands that an external 
// master 11 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 11 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M11 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 11
`define AXI_LOG2_MAX_WCA_ID_P1_M11 3


// Name:         AXI_MAX_URIDA_M11
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 11
// 
// This sets the maximum number of read commands that an external  
// master 11 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 11 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M11 5

//Is the log2 form of AXI_MAX_URIDA_M11
`define AXI_LOG2_MAX_URIDA_M11 3


// Name:         AXI_MAX_UWIDA_M11
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 11
// 
// This sets the maximum number of write commands that an external  
// master 11 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 11 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M11 5

//Is the log2 form of AXI_MAX_UWIDA_M11
`define AXI_LOG2_MAX_UWIDA_M11 3


// Name:         AXI_RI_LIMIT_M11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 11) & (AXI_M11_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 11. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 11 is AXI_MAX_URIDA_M11. 
//  
// Disabled if master 11 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M11 0


// Name:         AXI_MAX_RCA_ID_M12
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 12
// 
// This sets the maximum number of read commands that an external 
// master 12 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 12 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M12 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 12
`define AXI_LOG2_MAX_RCA_ID_P1_M12 3


// Name:         AXI_MAX_WCA_ID_M12
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 12
// 
// This sets the maximum number of write commands that an external 
// master 12 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 12 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M12 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 12
`define AXI_LOG2_MAX_WCA_ID_P1_M12 3


// Name:         AXI_MAX_URIDA_M12
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 12
// 
// This sets the maximum number of read commands that an external  
// master 12 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 12 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M12 5

//Is the log2 form of AXI_MAX_URIDA_M12
`define AXI_LOG2_MAX_URIDA_M12 3


// Name:         AXI_MAX_UWIDA_M12
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 12
// 
// This sets the maximum number of write commands that an external  
// master 12 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 12 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M12 5

//Is the log2 form of AXI_MAX_UWIDA_M12
`define AXI_LOG2_MAX_UWIDA_M12 3


// Name:         AXI_RI_LIMIT_M12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 12) & (AXI_M12_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 12. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 12 is AXI_MAX_URIDA_M12. 
//  
// Disabled if master 12 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M12 0


// Name:         AXI_MAX_RCA_ID_M13
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 13
// 
// This sets the maximum number of read commands that an external 
// master 13 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 13 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M13 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 13
`define AXI_LOG2_MAX_RCA_ID_P1_M13 3


// Name:         AXI_MAX_WCA_ID_M13
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 13
// 
// This sets the maximum number of write commands that an external 
// master 13 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 13 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M13 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 13
`define AXI_LOG2_MAX_WCA_ID_P1_M13 3


// Name:         AXI_MAX_URIDA_M13
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 13
// 
// This sets the maximum number of read commands that an external  
// master 13 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 13 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M13 5

//Is the log2 form of AXI_MAX_URIDA_M13
`define AXI_LOG2_MAX_URIDA_M13 3


// Name:         AXI_MAX_UWIDA_M13
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 13
// 
// This sets the maximum number of write commands that an external  
// master 13 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 13 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M13 5

//Is the log2 form of AXI_MAX_UWIDA_M13
`define AXI_LOG2_MAX_UWIDA_M13 3


// Name:         AXI_RI_LIMIT_M13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 13) & (AXI_M13_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 13. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 13 is AXI_MAX_URIDA_M13. 
//  
// Disabled if master 13 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M13 0


// Name:         AXI_MAX_RCA_ID_M14
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 14
// 
// This sets the maximum number of read commands that an external 
// master 14 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 14 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M14 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 14
`define AXI_LOG2_MAX_RCA_ID_P1_M14 3


// Name:         AXI_MAX_WCA_ID_M14
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 14
// 
// This sets the maximum number of write commands that an external 
// master 14 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 14 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M14 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 14
`define AXI_LOG2_MAX_WCA_ID_P1_M14 3


// Name:         AXI_MAX_URIDA_M14
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 14
// 
// This sets the maximum number of read commands that an external  
// master 14 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 14 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M14 5

//Is the log2 form of AXI_MAX_URIDA_M14
`define AXI_LOG2_MAX_URIDA_M14 3


// Name:         AXI_MAX_UWIDA_M14
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 14
// 
// This sets the maximum number of write commands that an external  
// master 14 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 14 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M14 5

//Is the log2 form of AXI_MAX_UWIDA_M14
`define AXI_LOG2_MAX_UWIDA_M14 3


// Name:         AXI_RI_LIMIT_M14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 14) & (AXI_M14_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 14. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 14 is AXI_MAX_URIDA_M14. 
//  
// Disabled if master 14 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M14 0


// Name:         AXI_MAX_RCA_ID_M15
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 15
// 
// This sets the maximum number of read commands that an external 
// master 15 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 15 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M15 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 15
`define AXI_LOG2_MAX_RCA_ID_P1_M15 3


// Name:         AXI_MAX_WCA_ID_M15
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 15
// 
// This sets the maximum number of write commands that an external 
// master 15 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 15 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M15 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 15
`define AXI_LOG2_MAX_WCA_ID_P1_M15 3


// Name:         AXI_MAX_URIDA_M15
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 15
// 
// This sets the maximum number of read commands that an external  
// master 15 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 15 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M15 5

//Is the log2 form of AXI_MAX_URIDA_M15
`define AXI_LOG2_MAX_URIDA_M15 3


// Name:         AXI_MAX_UWIDA_M15
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 15
// 
// This sets the maximum number of write commands that an external  
// master 15 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 15 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M15 5

//Is the log2 form of AXI_MAX_UWIDA_M15
`define AXI_LOG2_MAX_UWIDA_M15 3


// Name:         AXI_RI_LIMIT_M15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 15) & (AXI_M15_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 15. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 15 is AXI_MAX_URIDA_M15. 
//  
// Disabled if master 15 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M15 0


// Name:         AXI_MAX_RCA_ID_M16
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 16
// 
// This sets the maximum number of read commands that an external 
// master 16 can generate for a specific ARID value before DW_axi 
// stalls the master's read address channel. In other words, this is  
// the maximum number of read commands that master port 16 can 
// accept for a particular ARID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_RCA_ID_M(i) <= AXI_MAX_FARC_S(j) of all salves visible to  
// that master. Otherwise, DW_axi supports a master having more  
// outstanding transactions than what any of its slaves are capable of 
// accepting.
`define AXI_MAX_RCA_ID_M16 4

//Is the log2 plus form of the Maximum Number of Read Commands per unique ID accept limit from Master 16
`define AXI_LOG2_MAX_RCA_ID_P1_M16 3


// Name:         AXI_MAX_WCA_ID_M16
// Default:      4
// Values:       1, ..., 16
// Enabled:      AXI_NUM_MASTERS >= 16
// 
// This sets the maximum number of write commands that an external 
// master 16 can generate for a specific AWID value before DW_axi 
// stalls the master's write address channel. In other words, this is  
// the maximum number of write commands that master port 16 can 
// accept for a particular AWID value.  
// This limits the hardware required to implement out-of-order deadlock 
// prevention. 
// AXI_MAX_WCA_ID_M(i) <= AXI_MAX_FAWC_S(j) of all slaves visible to 
// that master. Otherwise, DW_axi supports a master having more outstanding 
// transactions than any of its slaves are capable of accepting.
`define AXI_MAX_WCA_ID_M16 4

//Is the log2 plus 1 form of the Maximum Number of Read Commands per unique ID accept limit from Master 16
`define AXI_LOG2_MAX_WCA_ID_P1_M16 3


// Name:         AXI_MAX_URIDA_M16
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 16
// 
// This sets the maximum number of read commands that an external  
// master 16 can generate with unique ARID values before DW_axi stalls 
// the master's read address channel. In other words, this is the maximum 
// number of unique values of ARID that master port 16 can accept 
// for active read commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. 
// Also, this limits the number of client inputs to the read data channel 
// arbiter in the master port as a maximum of AXI_MAX_URIDA_M(i) slaves  
// can be requesting a master i's read data channel simultaneously. 
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_URIDA_M16 5

//Is the log2 form of AXI_MAX_URIDA_M16
`define AXI_LOG2_MAX_URIDA_M16 3


// Name:         AXI_MAX_UWIDA_M16
// Default:      5
// Values:       1, ..., 32
// Enabled:      AXI_NUM_MASTERS >= 16
// 
// This sets the maximum number of write commands that an external  
// master 16 can generate with unique AWID values before DW_axi stalls 
// the master's write address channel. In other words, this is the maximum 
// number of unique values of AWID that master port 16 can accept 
// for active write commands at any one time. This limits the hardware 
// required to implement out-of-order deadlock prevention. Theis also  
// limits the number of client inputs to the write response channel arbiter 
// in the master port as a maximum of AXI_MAX_UWIDA_M(i) slaves can be 
// requesting a master i's write response channel simultaneously.  
// For non-ICM ports, this must be less than or equal to 2 to the power of AXI_MIDW. 
// For ICM ports, this must be less than 32, but to avoid redundancy the user should take 
// care to set it to a value less than or equal to the number of unique ID values that  
// can reaach this ICM port from all system masters which are visible to this port. 
// (Note that when 2 system masters send the same master ID to an ICM port, the ID values  
//  from each will be unique at the ICM port, because the system master number will have 
//  been pre-pended on by that point).
`define AXI_MAX_UWIDA_M16 5

//Is the log2 form of AXI_MAX_UWIDA_M16
`define AXI_LOG2_MAX_UWIDA_M16 3


// Name:         AXI_RI_LIMIT_M16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_NUM_MASTERS >= 16) & (AXI_M16_ON_R_SHARED_ONLY_VAL == 0)
// 
// Setting this parameter to "true" enforces an interleave depth of 
// 1 on the read data channel of master port 16. 
// If the parameter is set to "false" the interleave depth of  
// the read data channel of master port 16 is AXI_MAX_URIDA_M16. 
//  
// Disabled if master 16 does not have a dedicated read data channel. Because 
// the shared read data channel does not support read data interleave limiting. 
//  
//  NOTE : There are potential bus deadlock conditions associated with setting this  
//         parameter to "true". For more details read the Read Data Interleaving 
//         section of the DW_axi Databook.
`define AXI_RI_LIMIT_M16 0


//AXI_MAX_FAWC_S0:
//This sets the maximum number of active write commands 
//that can be forwarded to  0. In other words,
//it is the maximum number of active write commands that 
// port 0 can generate. This setting limits the 
//hardware required to track write interleaving rules. It also
//limits hardware required by a slave port to ensure that it does
//not generate a locked command until all active read/write
//commands previously issued are complete. 
//If AXI_NUM_MASTERS = 1 OR if the number of masters visible to
//this slave = 1, then this parameter is inactive and the maximum
//number of active write commands that can be forwarded to {TYPE} 0
//is not limited by DW_axi.
//AXI_MAX_FAWC_S(j) must be <= the total number of write commands that
//can be forwarded to the slave from all visible master ports. This is
//the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master
//ports.
//
//To save logic in the DW_axi instance the user should set this parameter
//to a value less than the maximum limit outlined above, but not greater
//than the acceptance capability of the attached slave on this channel.
//
//Default slave FARC limit, min is 2 to avoid deadlock condition if
//slave has link with shared channel, and shared pipeline and arbiter
//pipeline stages are enabled.
//

`define AXI_MAX_FAWC_S0 1

//This is log base 2 of AXI_MAX_FAWC_S0
`define AXI_LOG2_MAX_FAWC_S0 1

//This is log base 2 of (AXI_MAX_FAWC_S0 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S0 1


//This specifies the maximum number of active read commands 
//that can be forwarded to  0. In other words,
//it is the maximum number of active read commands that
// port 0 can generate. This parameter limits
//hardware required by the slave port to ensure that it does
//not generate a locked command until all the active read/write
//commands previously issued are complete.
//If AXI_NUM_MASTERS = 1 OR if the number of masters visible to
//this slave = 1, then this parameter is inactive and the
//maximum number of active read commands that can be forwarded
//to  0 is not limited by DW_axi.
//AXI_MAX_FARC_S(j) <= total number of read commands that can be
//forwarded to the slave from all visible master ports. This is the
//sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible
//master ports.
//
//To save logic in the DW_axi instance the user should set this parameter
//to a value less than the maximum limit outlined above, but not greater
//than the acceptance capability of the attached slave on this channel.
//
//Default slave FARC limit, min is 2 to avoid deadlock condition if
//slave has link with shared channel, and shared pipeline and arbiter
//pipeline stages are enabled.
//

`define AXI_MAX_FARC_S0 1

//This is log base 2 of (AXI_MAX_FARC_S0 + 1)
`define AXI_LOG2_MAX_FARC_P1_S0 1


//Write interleaving depth for slave 0, the default slave.

`define AXI_WID_S0 1



// Name:         AXI_WID_S1
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 1 && ((AXI_NNMV_S1 > 1) || (AXI_BNMV_S1 > 1)) & 
//               (AXI_S1_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 1. 
// The data from multiple masters can be interleaved to 
// Slave 1, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 1 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S1 1

//Log base 2 of AXI_WID_S1
`define AXI_LOG2_WID_S1 1

//Log base 2 of ( AXI_WID_S1 + 1)
`define AXI_LOG2_WID_P1_S1 1


// Name:         AXI_MAX_FAWC_S1
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NMV_S1 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 1. In other words, 
// it is the maximum number of active write commands that  
// Slave port 1 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 1 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S1 4

//This is log base 2 of AXI_MAX_FAWC_S1
`define AXI_LOG2_MAX_FAWC_S1 2

//This is log base 2 of (AXI_MAX_FAWC_S1 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S1 3


// Name:         AXI_MAX_FARC_S1
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NMV_S1 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 1. In other words, 
// it is the maximum number of active read commands that 
// Slave port 1 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 1 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S1 4

//This is log base 2 of (AXI_MAX_FARC_S1 + 1)
`define AXI_LOG2_MAX_FARC_P1_S1 3



// Name:         AXI_WID_S2
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 2 && ((AXI_NNMV_S2 > 1) || (AXI_BNMV_S2 > 1)) & 
//               (AXI_S2_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 2. 
// The data from multiple masters can be interleaved to 
// Slave 2, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 2 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S2 1

//Log base 2 of AXI_WID_S2
`define AXI_LOG2_WID_S2 1

//Log base 2 of ( AXI_WID_S2 + 1)
`define AXI_LOG2_WID_P1_S2 1


// Name:         AXI_MAX_FAWC_S2
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NMV_S2 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 2. In other words, 
// it is the maximum number of active write commands that  
// Slave port 2 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 2 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S2 4

//This is log base 2 of AXI_MAX_FAWC_S2
`define AXI_LOG2_MAX_FAWC_S2 2

//This is log base 2 of (AXI_MAX_FAWC_S2 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S2 3


// Name:         AXI_MAX_FARC_S2
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NMV_S2 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 2. In other words, 
// it is the maximum number of active read commands that 
// Slave port 2 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 2 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S2 4

//This is log base 2 of (AXI_MAX_FARC_S2 + 1)
`define AXI_LOG2_MAX_FARC_P1_S2 3



// Name:         AXI_WID_S3
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 3 && ((AXI_NNMV_S3 > 1) || (AXI_BNMV_S3 > 1)) & 
//               (AXI_S3_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 3. 
// The data from multiple masters can be interleaved to 
// Slave 3, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 3 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S3 1

//Log base 2 of AXI_WID_S3
`define AXI_LOG2_WID_S3 1

//Log base 2 of ( AXI_WID_S3 + 1)
`define AXI_LOG2_WID_P1_S3 1


// Name:         AXI_MAX_FAWC_S3
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NMV_S3 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 3. In other words, 
// it is the maximum number of active write commands that  
// Slave port 3 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 3 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S3 4

//This is log base 2 of AXI_MAX_FAWC_S3
`define AXI_LOG2_MAX_FAWC_S3 2

//This is log base 2 of (AXI_MAX_FAWC_S3 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S3 3


// Name:         AXI_MAX_FARC_S3
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NMV_S3 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 3. In other words, 
// it is the maximum number of active read commands that 
// Slave port 3 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 3 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S3 4

//This is log base 2 of (AXI_MAX_FARC_S3 + 1)
`define AXI_LOG2_MAX_FARC_P1_S3 3



// Name:         AXI_WID_S4
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 4 && ((AXI_NNMV_S4 > 1) || (AXI_BNMV_S4 > 1)) & 
//               (AXI_S4_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 4. 
// The data from multiple masters can be interleaved to 
// Slave 4, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 4 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S4 1

//Log base 2 of AXI_WID_S4
`define AXI_LOG2_WID_S4 1

//Log base 2 of ( AXI_WID_S4 + 1)
`define AXI_LOG2_WID_P1_S4 1


// Name:         AXI_MAX_FAWC_S4
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NMV_S4 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 4. In other words, 
// it is the maximum number of active write commands that  
// Slave port 4 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 4 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S4 4

//This is log base 2 of AXI_MAX_FAWC_S4
`define AXI_LOG2_MAX_FAWC_S4 2

//This is log base 2 of (AXI_MAX_FAWC_S4 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S4 3


// Name:         AXI_MAX_FARC_S4
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NMV_S4 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 4. In other words, 
// it is the maximum number of active read commands that 
// Slave port 4 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 4 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S4 4

//This is log base 2 of (AXI_MAX_FARC_S4 + 1)
`define AXI_LOG2_MAX_FARC_P1_S4 3



// Name:         AXI_WID_S5
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 5 && ((AXI_NNMV_S5 > 1) || (AXI_BNMV_S5 > 1)) & 
//               (AXI_S5_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 5. 
// The data from multiple masters can be interleaved to 
// Slave 5, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 5 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S5 1

//Log base 2 of AXI_WID_S5
`define AXI_LOG2_WID_S5 1

//Log base 2 of ( AXI_WID_S5 + 1)
`define AXI_LOG2_WID_P1_S5 1


// Name:         AXI_MAX_FAWC_S5
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NMV_S5 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 5. In other words, 
// it is the maximum number of active write commands that  
// Slave port 5 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 5 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S5 4

//This is log base 2 of AXI_MAX_FAWC_S5
`define AXI_LOG2_MAX_FAWC_S5 2

//This is log base 2 of (AXI_MAX_FAWC_S5 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S5 3


// Name:         AXI_MAX_FARC_S5
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NMV_S5 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 5. In other words, 
// it is the maximum number of active read commands that 
// Slave port 5 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 5 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S5 4

//This is log base 2 of (AXI_MAX_FARC_S5 + 1)
`define AXI_LOG2_MAX_FARC_P1_S5 3



// Name:         AXI_WID_S6
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 6 && ((AXI_NNMV_S6 > 1) || (AXI_BNMV_S6 > 1)) & 
//               (AXI_S6_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 6. 
// The data from multiple masters can be interleaved to 
// Slave 6, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 6 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S6 1

//Log base 2 of AXI_WID_S6
`define AXI_LOG2_WID_S6 1

//Log base 2 of ( AXI_WID_S6 + 1)
`define AXI_LOG2_WID_P1_S6 1


// Name:         AXI_MAX_FAWC_S6
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NMV_S6 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 6. In other words, 
// it is the maximum number of active write commands that  
// Slave port 6 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 6 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S6 4

//This is log base 2 of AXI_MAX_FAWC_S6
`define AXI_LOG2_MAX_FAWC_S6 2

//This is log base 2 of (AXI_MAX_FAWC_S6 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S6 3


// Name:         AXI_MAX_FARC_S6
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NMV_S6 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 6. In other words, 
// it is the maximum number of active read commands that 
// Slave port 6 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 6 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S6 4

//This is log base 2 of (AXI_MAX_FARC_S6 + 1)
`define AXI_LOG2_MAX_FARC_P1_S6 3



// Name:         AXI_WID_S7
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 7 && ((AXI_NNMV_S7 > 1) || (AXI_BNMV_S7 > 1)) & 
//               (AXI_S7_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 7. 
// The data from multiple masters can be interleaved to 
// Slave 7, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 7 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S7 1

//Log base 2 of AXI_WID_S7
`define AXI_LOG2_WID_S7 1

//Log base 2 of ( AXI_WID_S7 + 1)
`define AXI_LOG2_WID_P1_S7 1


// Name:         AXI_MAX_FAWC_S7
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NMV_S7 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 7. In other words, 
// it is the maximum number of active write commands that  
// Slave port 7 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 7 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S7 4

//This is log base 2 of AXI_MAX_FAWC_S7
`define AXI_LOG2_MAX_FAWC_S7 2

//This is log base 2 of (AXI_MAX_FAWC_S7 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S7 3


// Name:         AXI_MAX_FARC_S7
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NMV_S7 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 7. In other words, 
// it is the maximum number of active read commands that 
// Slave port 7 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 7 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S7 4

//This is log base 2 of (AXI_MAX_FARC_S7 + 1)
`define AXI_LOG2_MAX_FARC_P1_S7 3



// Name:         AXI_WID_S8
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 8 && ((AXI_NNMV_S8 > 1) || (AXI_BNMV_S8 > 1)) & 
//               (AXI_S8_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 8. 
// The data from multiple masters can be interleaved to 
// Slave 8, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 8 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S8 1

//Log base 2 of AXI_WID_S8
`define AXI_LOG2_WID_S8 1

//Log base 2 of ( AXI_WID_S8 + 1)
`define AXI_LOG2_WID_P1_S8 1


// Name:         AXI_MAX_FAWC_S8
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NMV_S8 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 8. In other words, 
// it is the maximum number of active write commands that  
// Slave port 8 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 8 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S8 4

//This is log base 2 of AXI_MAX_FAWC_S8
`define AXI_LOG2_MAX_FAWC_S8 2

//This is log base 2 of (AXI_MAX_FAWC_S8 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S8 3


// Name:         AXI_MAX_FARC_S8
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NMV_S8 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 8. In other words, 
// it is the maximum number of active read commands that 
// Slave port 8 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 8 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S8 4

//This is log base 2 of (AXI_MAX_FARC_S8 + 1)
`define AXI_LOG2_MAX_FARC_P1_S8 3



// Name:         AXI_WID_S9
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 9 && ((AXI_NNMV_S9 > 1) || (AXI_BNMV_S9 > 1)) & 
//               (AXI_S9_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 9. 
// The data from multiple masters can be interleaved to 
// Slave 9, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 9 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S9 1

//Log base 2 of AXI_WID_S9
`define AXI_LOG2_WID_S9 1

//Log base 2 of ( AXI_WID_S9 + 1)
`define AXI_LOG2_WID_P1_S9 1


// Name:         AXI_MAX_FAWC_S9
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NMV_S9 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 9. In other words, 
// it is the maximum number of active write commands that  
// Slave port 9 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 9 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S9 4

//This is log base 2 of AXI_MAX_FAWC_S9
`define AXI_LOG2_MAX_FAWC_S9 2

//This is log base 2 of (AXI_MAX_FAWC_S9 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S9 3


// Name:         AXI_MAX_FARC_S9
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NMV_S9 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 9. In other words, 
// it is the maximum number of active read commands that 
// Slave port 9 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 9 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S9 4

//This is log base 2 of (AXI_MAX_FARC_S9 + 1)
`define AXI_LOG2_MAX_FARC_P1_S9 3



// Name:         AXI_WID_S10
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 10 && ((AXI_NNMV_S10 > 1) || (AXI_BNMV_S10 > 1)) 
//               & (AXI_S10_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 10. 
// The data from multiple masters can be interleaved to 
// Slave 10, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 10 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S10 1

//Log base 2 of AXI_WID_S10
`define AXI_LOG2_WID_S10 1

//Log base 2 of ( AXI_WID_S10 + 1)
`define AXI_LOG2_WID_P1_S10 1


// Name:         AXI_MAX_FAWC_S10
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NMV_S10 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 10. In other words, 
// it is the maximum number of active write commands that  
// Slave port 10 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 10 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S10 4

//This is log base 2 of AXI_MAX_FAWC_S10
`define AXI_LOG2_MAX_FAWC_S10 2

//This is log base 2 of (AXI_MAX_FAWC_S10 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S10 3


// Name:         AXI_MAX_FARC_S10
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NMV_S10 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 10. In other words, 
// it is the maximum number of active read commands that 
// Slave port 10 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 10 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S10 4

//This is log base 2 of (AXI_MAX_FARC_S10 + 1)
`define AXI_LOG2_MAX_FARC_P1_S10 3



// Name:         AXI_WID_S11
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 11 && ((AXI_NNMV_S11 > 1) || (AXI_BNMV_S11 > 1)) 
//               & (AXI_S11_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 11. 
// The data from multiple masters can be interleaved to 
// Slave 11, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 11 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S11 1

//Log base 2 of AXI_WID_S11
`define AXI_LOG2_WID_S11 1

//Log base 2 of ( AXI_WID_S11 + 1)
`define AXI_LOG2_WID_P1_S11 1


// Name:         AXI_MAX_FAWC_S11
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NMV_S11 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 11. In other words, 
// it is the maximum number of active write commands that  
// Slave port 11 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 11 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S11 4

//This is log base 2 of AXI_MAX_FAWC_S11
`define AXI_LOG2_MAX_FAWC_S11 2

//This is log base 2 of (AXI_MAX_FAWC_S11 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S11 3


// Name:         AXI_MAX_FARC_S11
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NMV_S11 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 11. In other words, 
// it is the maximum number of active read commands that 
// Slave port 11 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 11 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S11 4

//This is log base 2 of (AXI_MAX_FARC_S11 + 1)
`define AXI_LOG2_MAX_FARC_P1_S11 3



// Name:         AXI_WID_S12
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 12 && ((AXI_NNMV_S12 > 1) || (AXI_BNMV_S12 > 1)) 
//               & (AXI_S12_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 12. 
// The data from multiple masters can be interleaved to 
// Slave 12, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 12 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S12 1

//Log base 2 of AXI_WID_S12
`define AXI_LOG2_WID_S12 1

//Log base 2 of ( AXI_WID_S12 + 1)
`define AXI_LOG2_WID_P1_S12 1


// Name:         AXI_MAX_FAWC_S12
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NMV_S12 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 12. In other words, 
// it is the maximum number of active write commands that  
// Slave port 12 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 12 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S12 4

//This is log base 2 of AXI_MAX_FAWC_S12
`define AXI_LOG2_MAX_FAWC_S12 2

//This is log base 2 of (AXI_MAX_FAWC_S12 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S12 3


// Name:         AXI_MAX_FARC_S12
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NMV_S12 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 12. In other words, 
// it is the maximum number of active read commands that 
// Slave port 12 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 12 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S12 4

//This is log base 2 of (AXI_MAX_FARC_S12 + 1)
`define AXI_LOG2_MAX_FARC_P1_S12 3



// Name:         AXI_WID_S13
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 13 && ((AXI_NNMV_S13 > 1) || (AXI_BNMV_S13 > 1)) 
//               & (AXI_S13_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 13. 
// The data from multiple masters can be interleaved to 
// Slave 13, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 13 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S13 1

//Log base 2 of AXI_WID_S13
`define AXI_LOG2_WID_S13 1

//Log base 2 of ( AXI_WID_S13 + 1)
`define AXI_LOG2_WID_P1_S13 1


// Name:         AXI_MAX_FAWC_S13
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NMV_S13 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 13. In other words, 
// it is the maximum number of active write commands that  
// Slave port 13 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 13 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S13 4

//This is log base 2 of AXI_MAX_FAWC_S13
`define AXI_LOG2_MAX_FAWC_S13 2

//This is log base 2 of (AXI_MAX_FAWC_S13 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S13 3


// Name:         AXI_MAX_FARC_S13
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NMV_S13 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 13. In other words, 
// it is the maximum number of active read commands that 
// Slave port 13 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 13 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S13 4

//This is log base 2 of (AXI_MAX_FARC_S13 + 1)
`define AXI_LOG2_MAX_FARC_P1_S13 3



// Name:         AXI_WID_S14
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 14 && ((AXI_NNMV_S14 > 1) || (AXI_BNMV_S14 > 1)) 
//               & (AXI_S14_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 14. 
// The data from multiple masters can be interleaved to 
// Slave 14, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 14 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S14 1

//Log base 2 of AXI_WID_S14
`define AXI_LOG2_WID_S14 1

//Log base 2 of ( AXI_WID_S14 + 1)
`define AXI_LOG2_WID_P1_S14 1


// Name:         AXI_MAX_FAWC_S14
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NMV_S14 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 14. In other words, 
// it is the maximum number of active write commands that  
// Slave port 14 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 14 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S14 4

//This is log base 2 of AXI_MAX_FAWC_S14
`define AXI_LOG2_MAX_FAWC_S14 2

//This is log base 2 of (AXI_MAX_FAWC_S14 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S14 3


// Name:         AXI_MAX_FARC_S14
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NMV_S14 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 14. In other words, 
// it is the maximum number of active read commands that 
// Slave port 14 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 14 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S14 4

//This is log base 2 of (AXI_MAX_FARC_S14 + 1)
`define AXI_LOG2_MAX_FARC_P1_S14 3



// Name:         AXI_WID_S15
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 15 && ((AXI_NNMV_S15 > 1) || (AXI_BNMV_S15 > 1)) 
//               & (AXI_S15_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 15. 
// The data from multiple masters can be interleaved to 
// Slave 15, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 15 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S15 1

//Log base 2 of AXI_WID_S15
`define AXI_LOG2_WID_S15 1

//Log base 2 of ( AXI_WID_S15 + 1)
`define AXI_LOG2_WID_P1_S15 1


// Name:         AXI_MAX_FAWC_S15
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NMV_S15 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 15. In other words, 
// it is the maximum number of active write commands that  
// Slave port 15 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 15 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S15 4

//This is log base 2 of AXI_MAX_FAWC_S15
`define AXI_LOG2_MAX_FAWC_S15 2

//This is log base 2 of (AXI_MAX_FAWC_S15 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S15 3


// Name:         AXI_MAX_FARC_S15
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NMV_S15 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 15. In other words, 
// it is the maximum number of active read commands that 
// Slave port 15 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 15 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S15 4

//This is log base 2 of (AXI_MAX_FARC_S15 + 1)
`define AXI_LOG2_MAX_FARC_P1_S15 3



// Name:         AXI_WID_S16
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_NUM_SLAVES >= 16 && ((AXI_NNMV_S16 > 1) || (AXI_BNMV_S16 > 1)) 
//               & (AXI_S16_ON_W_SHARED_ONLY == 0)
// 
// This sets the write interleave depth for Slave 16. 
// The data from multiple masters can be interleaved to 
// Slave 16, if the slave supports write data interleaving. 
// This must be set less than or equal to the write data interleave 
// depth of the attached slave. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to this 
// slave = 1 (in both boot and normal modes), then this parameter 
// is inactive. Otherwise, it must be less than or equal to  
// AXI_NUM_MASTERS. When this parameter is inactive, DW_axi does not 
// restrict the write data interleaving to a maximum value. 
// Also, AXI_WID_S(j) <= AXI_MAX_FAWC_S(j), otherwise, DW_axi is able 
// to interleave from more sources than it can accept transactions from, 
// so there would be redundant write interleaving slots. 
//  
// This parameter is disabled if slave 16 does not have a dedicated 
// write data channel. This is because the shared write data channel  
// supports only an interleave depth of 1 to slaves.
`define AXI_WID_S16 1

//Log base 2 of AXI_WID_S16
`define AXI_LOG2_WID_S16 1

//Log base 2 of ( AXI_WID_S16 + 1)
`define AXI_LOG2_WID_P1_S16 1


// Name:         AXI_MAX_FAWC_S16
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NMV_S16 > 1)
// 
// This sets the maximum number of active write commands  
// that can be forwarded to Slave 16. In other words, 
// it is the maximum number of active write commands that  
// Slave port 16 can generate. This setting limits the  
// hardware required to track write interleaving rules. It also 
// limits hardware required by a slave port to ensure that it does 
// not generate a locked command until all active read/write 
// commands previously issued are complete.  
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the maximum 
// number of active write commands that can be forwarded to {TYPE} 16 
// is not limited by DW_axi. 
// AXI_MAX_FAWC_S(j) must be <= the total number of write commands that 
// can be forwarded to the slave from all visible master ports. This is 
// the sum of AXI_MAX_WCA_ID_M(i) * AXI_MAX_UWIDA_M(i) of all visible master 
// ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FAWC_S16 4

//This is log base 2 of AXI_MAX_FAWC_S16
`define AXI_LOG2_MAX_FAWC_S16 2

//This is log base 2 of (AXI_MAX_FAWC_S16 + 1)
`define AXI_LOG2_MAX_FAWC_P1_S16 3


// Name:         AXI_MAX_FARC_S16
// Default:      4
// Values:       1, ..., 32
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NMV_S16 > 1)
// 
// This specifies the maximum number of active read commands  
// that can be forwarded to Slave 16. In other words, 
// it is the maximum number of active read commands that 
// Slave port 16 can generate. This parameter limits 
// hardware required by the slave port to ensure that it does 
// not generate a locked command until all the active read/write 
// commands previously issued are complete. 
// If AXI_NUM_MASTERS = 1 OR if the number of masters visible to 
// this slave = 1, then this parameter is inactive and the 
// maximum number of active read commands that can be forwarded 
// to Slave 16 is not limited by DW_axi. 
// AXI_MAX_FARC_S(j) <= total number of read commands that can be 
// forwarded to the slave from all visible master ports. This is the 
// sum of AXI_MAX_RCA_ID_M(i) * AXI_MAX_URIDA_M(i) of all visible 
// master ports. 
//  
// To save logic in the DW_axi instance the user should set this parameter 
// to a value less than the maximum limit outlined above, but not greater 
// than the acceptance capability of the attached slave on this channel.
`define AXI_MAX_FARC_S16 4

//This is log base 2 of (AXI_MAX_FARC_S16 + 1)
`define AXI_LOG2_MAX_FARC_P1_S16 3



// The read command limit for slave 0 on the shared read address.
// Where the number 0 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S0_SHARED_FARC 0

// Log base 2 of AXI_S0_SHARED_FARC.
`define AXI_LOG2_S0_SHARED_FARC_P1 1


// 1 if slave 0 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S0_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 0 on the shared write address.
// Where the number 0 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S0_SHARED_FAWC 0

// Log base 2 of AXI_S0_SHARED_FAWC.
`define AXI_LOG2_S0_SHARED_FAWC_P1 1


// 1 if slave 0 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S0_SHARED_AW_HAS_DDCTD 0


// 1 if slave 0 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S0_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 1 on the shared read address.
// Where the number 1 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S1_SHARED_FARC 0

// Log base 2 of AXI_S1_SHARED_FARC.
`define AXI_LOG2_S1_SHARED_FARC_P1 1


// 1 if slave 1 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S1_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 1 on the shared write address.
// Where the number 1 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S1_SHARED_FAWC 0

// Log base 2 of AXI_S1_SHARED_FAWC.
`define AXI_LOG2_S1_SHARED_FAWC_P1 1


// 1 if slave 1 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S1_SHARED_AW_HAS_DDCTD 0


// 1 if slave 1 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S1_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 2 on the shared read address.
// Where the number 2 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S2_SHARED_FARC 0

// Log base 2 of AXI_S2_SHARED_FARC.
`define AXI_LOG2_S2_SHARED_FARC_P1 1


// 1 if slave 2 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S2_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 2 on the shared write address.
// Where the number 2 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S2_SHARED_FAWC 0

// Log base 2 of AXI_S2_SHARED_FAWC.
`define AXI_LOG2_S2_SHARED_FAWC_P1 1


// 1 if slave 2 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S2_SHARED_AW_HAS_DDCTD 0


// 1 if slave 2 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S2_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 3 on the shared read address.
// Where the number 3 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S3_SHARED_FARC 0

// Log base 2 of AXI_S3_SHARED_FARC.
`define AXI_LOG2_S3_SHARED_FARC_P1 1


// 1 if slave 3 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S3_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 3 on the shared write address.
// Where the number 3 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S3_SHARED_FAWC 0

// Log base 2 of AXI_S3_SHARED_FAWC.
`define AXI_LOG2_S3_SHARED_FAWC_P1 1


// 1 if slave 3 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S3_SHARED_AW_HAS_DDCTD 0


// 1 if slave 3 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S3_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 4 on the shared read address.
// Where the number 4 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S4_SHARED_FARC 0

// Log base 2 of AXI_S4_SHARED_FARC.
`define AXI_LOG2_S4_SHARED_FARC_P1 1


// 1 if slave 4 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S4_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 4 on the shared write address.
// Where the number 4 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S4_SHARED_FAWC 0

// Log base 2 of AXI_S4_SHARED_FAWC.
`define AXI_LOG2_S4_SHARED_FAWC_P1 1


// 1 if slave 4 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S4_SHARED_AW_HAS_DDCTD 0


// 1 if slave 4 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S4_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 5 on the shared read address.
// Where the number 5 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S5_SHARED_FARC 0

// Log base 2 of AXI_S5_SHARED_FARC.
`define AXI_LOG2_S5_SHARED_FARC_P1 1


// 1 if slave 5 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S5_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 5 on the shared write address.
// Where the number 5 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S5_SHARED_FAWC 0

// Log base 2 of AXI_S5_SHARED_FAWC.
`define AXI_LOG2_S5_SHARED_FAWC_P1 1


// 1 if slave 5 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S5_SHARED_AW_HAS_DDCTD 0


// 1 if slave 5 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S5_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 6 on the shared read address.
// Where the number 6 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S6_SHARED_FARC 0

// Log base 2 of AXI_S6_SHARED_FARC.
`define AXI_LOG2_S6_SHARED_FARC_P1 1


// 1 if slave 6 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S6_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 6 on the shared write address.
// Where the number 6 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S6_SHARED_FAWC 0

// Log base 2 of AXI_S6_SHARED_FAWC.
`define AXI_LOG2_S6_SHARED_FAWC_P1 1


// 1 if slave 6 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S6_SHARED_AW_HAS_DDCTD 0


// 1 if slave 6 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S6_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 7 on the shared read address.
// Where the number 7 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S7_SHARED_FARC 0

// Log base 2 of AXI_S7_SHARED_FARC.
`define AXI_LOG2_S7_SHARED_FARC_P1 1


// 1 if slave 7 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S7_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 7 on the shared write address.
// Where the number 7 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S7_SHARED_FAWC 0

// Log base 2 of AXI_S7_SHARED_FAWC.
`define AXI_LOG2_S7_SHARED_FAWC_P1 1


// 1 if slave 7 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S7_SHARED_AW_HAS_DDCTD 0


// 1 if slave 7 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S7_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 8 on the shared read address.
// Where the number 8 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S8_SHARED_FARC 0

// Log base 2 of AXI_S8_SHARED_FARC.
`define AXI_LOG2_S8_SHARED_FARC_P1 1


// 1 if slave 8 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S8_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 8 on the shared write address.
// Where the number 8 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S8_SHARED_FAWC 0

// Log base 2 of AXI_S8_SHARED_FAWC.
`define AXI_LOG2_S8_SHARED_FAWC_P1 1


// 1 if slave 8 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S8_SHARED_AW_HAS_DDCTD 0


// 1 if slave 8 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S8_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 9 on the shared read address.
// Where the number 9 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S9_SHARED_FARC 0

// Log base 2 of AXI_S9_SHARED_FARC.
`define AXI_LOG2_S9_SHARED_FARC_P1 1


// 1 if slave 9 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S9_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 9 on the shared write address.
// Where the number 9 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S9_SHARED_FAWC 0

// Log base 2 of AXI_S9_SHARED_FAWC.
`define AXI_LOG2_S9_SHARED_FAWC_P1 1


// 1 if slave 9 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S9_SHARED_AW_HAS_DDCTD 0


// 1 if slave 9 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S9_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 10 on the shared read address.
// Where the number 10 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S10_SHARED_FARC 0

// Log base 2 of AXI_S10_SHARED_FARC.
`define AXI_LOG2_S10_SHARED_FARC_P1 1


// 1 if slave 10 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S10_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 10 on the shared write address.
// Where the number 10 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S10_SHARED_FAWC 0

// Log base 2 of AXI_S10_SHARED_FAWC.
`define AXI_LOG2_S10_SHARED_FAWC_P1 1


// 1 if slave 10 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S10_SHARED_AW_HAS_DDCTD 0


// 1 if slave 10 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S10_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 11 on the shared read address.
// Where the number 11 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S11_SHARED_FARC 0

// Log base 2 of AXI_S11_SHARED_FARC.
`define AXI_LOG2_S11_SHARED_FARC_P1 1


// 1 if slave 11 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S11_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 11 on the shared write address.
// Where the number 11 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S11_SHARED_FAWC 0

// Log base 2 of AXI_S11_SHARED_FAWC.
`define AXI_LOG2_S11_SHARED_FAWC_P1 1


// 1 if slave 11 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S11_SHARED_AW_HAS_DDCTD 0


// 1 if slave 11 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S11_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 12 on the shared read address.
// Where the number 12 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S12_SHARED_FARC 0

// Log base 2 of AXI_S12_SHARED_FARC.
`define AXI_LOG2_S12_SHARED_FARC_P1 1


// 1 if slave 12 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S12_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 12 on the shared write address.
// Where the number 12 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S12_SHARED_FAWC 0

// Log base 2 of AXI_S12_SHARED_FAWC.
`define AXI_LOG2_S12_SHARED_FAWC_P1 1


// 1 if slave 12 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S12_SHARED_AW_HAS_DDCTD 0


// 1 if slave 12 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S12_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 13 on the shared read address.
// Where the number 13 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S13_SHARED_FARC 0

// Log base 2 of AXI_S13_SHARED_FARC.
`define AXI_LOG2_S13_SHARED_FARC_P1 1


// 1 if slave 13 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S13_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 13 on the shared write address.
// Where the number 13 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S13_SHARED_FAWC 0

// Log base 2 of AXI_S13_SHARED_FAWC.
`define AXI_LOG2_S13_SHARED_FAWC_P1 1


// 1 if slave 13 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S13_SHARED_AW_HAS_DDCTD 0


// 1 if slave 13 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S13_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 14 on the shared read address.
// Where the number 14 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S14_SHARED_FARC 0

// Log base 2 of AXI_S14_SHARED_FARC.
`define AXI_LOG2_S14_SHARED_FARC_P1 1


// 1 if slave 14 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S14_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 14 on the shared write address.
// Where the number 14 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S14_SHARED_FAWC 0

// Log base 2 of AXI_S14_SHARED_FAWC.
`define AXI_LOG2_S14_SHARED_FAWC_P1 1


// 1 if slave 14 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S14_SHARED_AW_HAS_DDCTD 0


// 1 if slave 14 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S14_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 15 on the shared read address.
// Where the number 15 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S15_SHARED_FARC 0

// Log base 2 of AXI_S15_SHARED_FARC.
`define AXI_LOG2_S15_SHARED_FARC_P1 1


// 1 if slave 15 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S15_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 15 on the shared write address.
// Where the number 15 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S15_SHARED_FAWC 0

// Log base 2 of AXI_S15_SHARED_FAWC.
`define AXI_LOG2_S15_SHARED_FAWC_P1 1


// 1 if slave 15 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S15_SHARED_AW_HAS_DDCTD 0


// 1 if slave 15 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S15_SHARED_W_HAS_DDCTD 0


// The read command limit for slave 16 on the shared read address.
// Where the number 16 is w.r.t. the number of slaves on the shared
// read address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S16_SHARED_FARC 0

// Log base 2 of AXI_S16_SHARED_FARC.
`define AXI_LOG2_S16_SHARED_FARC_P1 1


// 1 if slave 16 on the shared read address also has a dedicated 
// read address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S16_SHARED_AR_HAS_DDCTD 0


// The write command limit for slave 16 on the shared write address.
// Where the number 16 is w.r.t. the number of slaves on the shared
// write address not w.r.t. the total number of slaves on the interconnect
// instance.

`define AXI_S16_SHARED_FAWC 0

// Log base 2 of AXI_S16_SHARED_FAWC.
`define AXI_LOG2_S16_SHARED_FAWC_P1 1


// 1 if slave 16 on the shared write address also has a dedicated 
// write address. Note the slave number here does not correspond to system
// slave number.

`define AXI_S16_SHARED_AW_HAS_DDCTD 0


// 1 if slave 16 on the shared write data also has a dedicated 
// write data. Note the slave number here does not correspond to system
// slave number.

`define AXI_S16_SHARED_W_HAS_DDCTD 0


//AXI_M0_SHARED_R_HAS_DDCTD
// 1 if master 0 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M0_SHARED_R_HAS_DDCTD 0

//AXI_M0_SHARED_B_HAS_DDCTD
// 1 if master 0 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M0_SHARED_B_HAS_DDCTD 0

//AXI_M1_SHARED_R_HAS_DDCTD
// 1 if master 1 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M1_SHARED_R_HAS_DDCTD 0

//AXI_M1_SHARED_B_HAS_DDCTD
// 1 if master 1 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M1_SHARED_B_HAS_DDCTD 0

//AXI_M2_SHARED_R_HAS_DDCTD
// 1 if master 2 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M2_SHARED_R_HAS_DDCTD 0

//AXI_M2_SHARED_B_HAS_DDCTD
// 1 if master 2 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M2_SHARED_B_HAS_DDCTD 0

//AXI_M3_SHARED_R_HAS_DDCTD
// 1 if master 3 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M3_SHARED_R_HAS_DDCTD 0

//AXI_M3_SHARED_B_HAS_DDCTD
// 1 if master 3 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M3_SHARED_B_HAS_DDCTD 0

//AXI_M4_SHARED_R_HAS_DDCTD
// 1 if master 4 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M4_SHARED_R_HAS_DDCTD 0

//AXI_M4_SHARED_B_HAS_DDCTD
// 1 if master 4 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M4_SHARED_B_HAS_DDCTD 0

//AXI_M5_SHARED_R_HAS_DDCTD
// 1 if master 5 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M5_SHARED_R_HAS_DDCTD 0

//AXI_M5_SHARED_B_HAS_DDCTD
// 1 if master 5 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M5_SHARED_B_HAS_DDCTD 0

//AXI_M6_SHARED_R_HAS_DDCTD
// 1 if master 6 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M6_SHARED_R_HAS_DDCTD 0

//AXI_M6_SHARED_B_HAS_DDCTD
// 1 if master 6 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M6_SHARED_B_HAS_DDCTD 0

//AXI_M7_SHARED_R_HAS_DDCTD
// 1 if master 7 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M7_SHARED_R_HAS_DDCTD 0

//AXI_M7_SHARED_B_HAS_DDCTD
// 1 if master 7 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M7_SHARED_B_HAS_DDCTD 0

//AXI_M8_SHARED_R_HAS_DDCTD
// 1 if master 8 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M8_SHARED_R_HAS_DDCTD 0

//AXI_M8_SHARED_B_HAS_DDCTD
// 1 if master 8 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M8_SHARED_B_HAS_DDCTD 0

//AXI_M9_SHARED_R_HAS_DDCTD
// 1 if master 9 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M9_SHARED_R_HAS_DDCTD 0

//AXI_M9_SHARED_B_HAS_DDCTD
// 1 if master 9 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M9_SHARED_B_HAS_DDCTD 0

//AXI_M10_SHARED_R_HAS_DDCTD
// 1 if master 10 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M10_SHARED_R_HAS_DDCTD 0

//AXI_M10_SHARED_B_HAS_DDCTD
// 1 if master 10 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M10_SHARED_B_HAS_DDCTD 0

//AXI_M11_SHARED_R_HAS_DDCTD
// 1 if master 11 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M11_SHARED_R_HAS_DDCTD 0

//AXI_M11_SHARED_B_HAS_DDCTD
// 1 if master 11 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M11_SHARED_B_HAS_DDCTD 0

//AXI_M12_SHARED_R_HAS_DDCTD
// 1 if master 12 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M12_SHARED_R_HAS_DDCTD 0

//AXI_M12_SHARED_B_HAS_DDCTD
// 1 if master 12 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M12_SHARED_B_HAS_DDCTD 0

//AXI_M13_SHARED_R_HAS_DDCTD
// 1 if master 13 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M13_SHARED_R_HAS_DDCTD 0

//AXI_M13_SHARED_B_HAS_DDCTD
// 1 if master 13 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M13_SHARED_B_HAS_DDCTD 0

//AXI_M14_SHARED_R_HAS_DDCTD
// 1 if master 14 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M14_SHARED_R_HAS_DDCTD 0

//AXI_M14_SHARED_B_HAS_DDCTD
// 1 if master 14 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M14_SHARED_B_HAS_DDCTD 0

//AXI_M15_SHARED_R_HAS_DDCTD
// 1 if master 15 on the shared read data also has a dedicated 
// read data. Note the master number here does not correspond to system
// master number.

`define AXI_M15_SHARED_R_HAS_DDCTD 0

//AXI_M15_SHARED_B_HAS_DDCTD
// 1 if master 15 on the shared burst response also has a dedicated 
// burst response. Note the master number here does not correspond to system
// master number.

`define AXI_M15_SHARED_B_HAS_DDCTD 0

// Name:         AXI_PRIORITY_M1
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 1 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 1. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M1 0


// Name:         AXI_PRIORITY_M2
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 2 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 2. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M2 0


// Name:         AXI_PRIORITY_M3
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 3 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 3. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M3 0


// Name:         AXI_PRIORITY_M4
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 4 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 4. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M4 0


// Name:         AXI_PRIORITY_M5
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 5 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 5. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M5 0


// Name:         AXI_PRIORITY_M6
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 6 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 6. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M6 0


// Name:         AXI_PRIORITY_M7
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 7 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 7. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M7 0


// Name:         AXI_PRIORITY_M8
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 8 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 8. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M8 0


// Name:         AXI_PRIORITY_M9
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 9 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 9. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M9 0


// Name:         AXI_PRIORITY_M10
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 10 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 10. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M10 0


// Name:         AXI_PRIORITY_M11
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 11 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 11. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M11 0


// Name:         AXI_PRIORITY_M12
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 12 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 12. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M12 0


// Name:         AXI_PRIORITY_M13
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 13 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 13. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M13 0


// Name:         AXI_PRIORITY_M14
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 14 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 14. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M14 0


// Name:         AXI_PRIORITY_M15
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 15 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 15. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M15 0


// Name:         AXI_PRIORITY_M16
// Default:      0
// Values:       0, ..., =[calcMaxValue @AXI_NUM_MASTERS]
// Enabled:      AXI_NUM_MASTERS >= 16 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Master 16. 
// Can take on a value between 0 and AXI_NUM_MASTER -1. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_M16 0


// Name:         AXI_PRIORITY_S1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 1 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 1. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S1 1


// Name:         AXI_PRIORITY_S2
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 2 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 2. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S2 1


// Name:         AXI_PRIORITY_S3
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 3 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 3. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S3 1


// Name:         AXI_PRIORITY_S4
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 4 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 4. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S4 1


// Name:         AXI_PRIORITY_S5
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 5 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 5. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S5 1


// Name:         AXI_PRIORITY_S6
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 6 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 6. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S6 1


// Name:         AXI_PRIORITY_S7
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 7 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 7. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S7 1


// Name:         AXI_PRIORITY_S8
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 8 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 8. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S8 1


// Name:         AXI_PRIORITY_S9
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 9 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 9. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S9 1


// Name:         AXI_PRIORITY_S10
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 10 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 10. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S10 1


// Name:         AXI_PRIORITY_S11
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 11 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 11. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S11 1


// Name:         AXI_PRIORITY_S12
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 12 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 12. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S12 1


// Name:         AXI_PRIORITY_S13
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 13 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 13. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S13 1


// Name:         AXI_PRIORITY_S14
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 14 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 14. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S14 1


// Name:         AXI_PRIORITY_S15
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 15 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 15. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S15 1


// Name:         AXI_PRIORITY_S16
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      AXI_NUM_SLAVES >= 16 && (AXI_HAS_EXT_PRIORITY == 0 ? 1 : 0)
// 
// Selects the priority of Slave 16. 
// Can take on a value between 1 and AXI_NUM_SLAVES. 
// The higher the number the higher the priority.
`define AXI_PRIORITY_S16 1


//Selects the priority of Slave 0.
//Can take on a value between 0 and 15.
//The higher the number the higher the priority.

`define AXI_PRIORITY_S0 0


// Name:         AXI_HAS_EXT_PRIORITY
// Default:      false
// Values:       false (0), true (1)
// 
// When this is set to True, it enables External Priority support. 
// An input port exists for each AXI master and slave port, that  
// can be use to program the arbitration priorities during operation.  
// When set to False, the the External Priority signals are not 
// included on the I/O and AXI master and slave port priorities 
// are fixed
`define AXI_HAS_EXT_PRIORITY 0



// Enables the AXI_SHARED_LAYER_MASTER_PRIORITY parameter, and includes priority port

`define AXI_SHARED_LAYER_MASTER_PRIORITY_EN_VAL 0

// Defined if AXI_SHARED_LAYER_MASTER_PRIORITY_EN_VAL == 1.

// `define AXI_SHARED_LAYER_MASTER_PRIORITY_EN



// Name:         AXI_SHARED_LAYER_MASTER_PRIORITY
// Default:      1
// Values:       1, ..., =@AXI_NUM_MASTERS
// Enabled:      (AXI_SHARED_LAYER_MASTER_PRIORITY_EN_VAL == 1)
// 
// Set the priority of the shared layer read address, write address and write data 
// channels when they request access at a dedicated layer.  
// We call this the shared layer master priority because on these channels the shared  
// layer is requesting on behalf of masters.
`define AXI_SHARED_LAYER_MASTER_PRIORITY 1



// Enables the AXI_SHARED_LAYER_SLAVE_PRIORITY parameter, and includes priority port
// if external priorities used.

`define AXI_SHARED_LAYER_SLAVE_PRIORITY_EN_VAL 0

// Defined if AXI_SHARED_LAYER_SLAVE_PRIORITY_EN_VAL == 1.

// `define AXI_SHARED_LAYER_SLAVE_PRIORITY_EN



// Name:         AXI_SHARED_LAYER_SLAVE_PRIORITY
// Default:      1
// Values:       1, ..., =@AXI_NUM_SLAVES
// Enabled:      (AXI_SHARED_LAYER_SLAVE_PRIORITY_EN_VAL == 1)
// 
// Set the priority of the shared layer read data and burst response 
// channels when they request access at a dedicated layer.  
// We call this the shared layer slave priority because on these channels the shared  
// layer is requesting on behalf of slaves.
`define AXI_SHARED_LAYER_SLAVE_PRIORITY 1


//Creates a define for whether we support the External Priorities.


// Name:         AXI_AR_ARB_TYPE_S0
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 0
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 0. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S0 0



// Name:         AXI_AW_ARB_TYPE_S0
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 0
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 0. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S0 0



// Name:         AXI_AR_ARB_TYPE_S1
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 1
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 1. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S1 0



// Name:         AXI_AW_ARB_TYPE_S1
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 1
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 1. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S1 0



// Name:         AXI_AR_ARB_TYPE_S2
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 2
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 2. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S2 0



// Name:         AXI_AW_ARB_TYPE_S2
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 2
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 2. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S2 0



// Name:         AXI_AR_ARB_TYPE_S3
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 3
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 3. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S3 0



// Name:         AXI_AW_ARB_TYPE_S3
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 3
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 3. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S3 0



// Name:         AXI_AR_ARB_TYPE_S4
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 4
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 4. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S4 0



// Name:         AXI_AW_ARB_TYPE_S4
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 4
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 4. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S4 0



// Name:         AXI_AR_ARB_TYPE_S5
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 5
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 5. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S5 0



// Name:         AXI_AW_ARB_TYPE_S5
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 5
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 5. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S5 0



// Name:         AXI_AR_ARB_TYPE_S6
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 6
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 6. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S6 0



// Name:         AXI_AW_ARB_TYPE_S6
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 6
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 6. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S6 0



// Name:         AXI_AR_ARB_TYPE_S7
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 7
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 7. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S7 0



// Name:         AXI_AW_ARB_TYPE_S7
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 7
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 7. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S7 0



// Name:         AXI_AR_ARB_TYPE_S8
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 8
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 8. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S8 0



// Name:         AXI_AW_ARB_TYPE_S8
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 8
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 8. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S8 0



// Name:         AXI_AR_ARB_TYPE_S9
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 9
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 9. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S9 0



// Name:         AXI_AW_ARB_TYPE_S9
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 9
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 9. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S9 0



// Name:         AXI_AR_ARB_TYPE_S10
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 10
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 10. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S10 0



// Name:         AXI_AW_ARB_TYPE_S10
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 10
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 10. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S10 0



// Name:         AXI_AR_ARB_TYPE_S11
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 11
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 11. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S11 0



// Name:         AXI_AW_ARB_TYPE_S11
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 11
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 11. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S11 0



// Name:         AXI_AR_ARB_TYPE_S12
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 12
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 12. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S12 0



// Name:         AXI_AW_ARB_TYPE_S12
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 12
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 12. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S12 0



// Name:         AXI_AR_ARB_TYPE_S13
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 13
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 13. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S13 0



// Name:         AXI_AW_ARB_TYPE_S13
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 13
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 13. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S13 0



// Name:         AXI_AR_ARB_TYPE_S14
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 14
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 14. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S14 0



// Name:         AXI_AW_ARB_TYPE_S14
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 14
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 14. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S14 0



// Name:         AXI_AR_ARB_TYPE_S15
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 15
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 15. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S15 0



// Name:         AXI_AW_ARB_TYPE_S15
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 15
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 15. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S15 0



// Name:         AXI_AR_ARB_TYPE_S16
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 16
// 
// Selects the type of arbiter to be used in the Read Address channel at  
// slave port 16. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AR_ARB_TYPE_S16 0



// Name:         AXI_AW_ARB_TYPE_S16
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 16
// 
// Selects the type of arbiter to be used in the Write Address channel at  
// slave port 16. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter. 
//  
// Dependancy : If AXI_HAS_LOCKING==1, User Defined arbiters cannot be used on the read and write address channels.
`define AXI_AW_ARB_TYPE_S16 0



// Name:         AXI_W_ARB_TYPE_S0
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 0
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 0. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S0 0



// Name:         AXI_W_ARB_TYPE_S1
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 1
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 1. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S1 0



// Name:         AXI_W_ARB_TYPE_S2
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 2
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 2. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S2 0



// Name:         AXI_W_ARB_TYPE_S3
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 3
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 3. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S3 0



// Name:         AXI_W_ARB_TYPE_S4
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 4
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 4. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S4 0



// Name:         AXI_W_ARB_TYPE_S5
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 5
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 5. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S5 0



// Name:         AXI_W_ARB_TYPE_S6
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 6
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 6. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S6 0



// Name:         AXI_W_ARB_TYPE_S7
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 7
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 7. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S7 0



// Name:         AXI_W_ARB_TYPE_S8
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 8
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 8. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S8 0



// Name:         AXI_W_ARB_TYPE_S9
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 9
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 9. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S9 0



// Name:         AXI_W_ARB_TYPE_S10
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 10
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 10. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S10 0



// Name:         AXI_W_ARB_TYPE_S11
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 11
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 11. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S11 0



// Name:         AXI_W_ARB_TYPE_S12
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 12
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 12. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S12 0



// Name:         AXI_W_ARB_TYPE_S13
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 13
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 13. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S13 0



// Name:         AXI_W_ARB_TYPE_S14
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 14
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 14. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S14 0



// Name:         AXI_W_ARB_TYPE_S15
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 15
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 15. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S15 0



// Name:         AXI_W_ARB_TYPE_S16
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_SLAVES >= 16
// 
// Selects the type of arbiter to be used in the Write Data channel at  
// slave port 16. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_ARB_TYPE_S16 0



// Name:         AXI_R_ARB_TYPE_M1
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 1
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 1. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M1 0



// Name:         AXI_B_ARB_TYPE_M1
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 1
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 1. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M1 0



// Name:         AXI_R_ARB_TYPE_M2
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 2
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 2. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M2 0



// Name:         AXI_B_ARB_TYPE_M2
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 2
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 2. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M2 0



// Name:         AXI_R_ARB_TYPE_M3
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 3
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 3. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M3 0



// Name:         AXI_B_ARB_TYPE_M3
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 3
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 3. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M3 0



// Name:         AXI_R_ARB_TYPE_M4
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 4
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 4. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M4 0



// Name:         AXI_B_ARB_TYPE_M4
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 4
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 4. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M4 0



// Name:         AXI_R_ARB_TYPE_M5
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 5
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 5. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M5 0



// Name:         AXI_B_ARB_TYPE_M5
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 5
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 5. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M5 0



// Name:         AXI_R_ARB_TYPE_M6
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 6
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 6. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M6 0



// Name:         AXI_B_ARB_TYPE_M6
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 6
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 6. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M6 0



// Name:         AXI_R_ARB_TYPE_M7
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 7
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 7. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M7 0



// Name:         AXI_B_ARB_TYPE_M7
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 7
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 7. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M7 0



// Name:         AXI_R_ARB_TYPE_M8
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 8
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 8. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M8 0



// Name:         AXI_B_ARB_TYPE_M8
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 8
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 8. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M8 0



// Name:         AXI_R_ARB_TYPE_M9
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 9
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 9. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M9 0



// Name:         AXI_B_ARB_TYPE_M9
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 9
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 9. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M9 0



// Name:         AXI_R_ARB_TYPE_M10
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 10
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 10. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M10 0



// Name:         AXI_B_ARB_TYPE_M10
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 10
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 10. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M10 0



// Name:         AXI_R_ARB_TYPE_M11
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 11
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 11. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M11 0



// Name:         AXI_B_ARB_TYPE_M11
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 11
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 11. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M11 0



// Name:         AXI_R_ARB_TYPE_M12
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 12
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 12. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M12 0



// Name:         AXI_B_ARB_TYPE_M12
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 12
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 12. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M12 0



// Name:         AXI_R_ARB_TYPE_M13
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 13
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 13. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M13 0



// Name:         AXI_B_ARB_TYPE_M13
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 13
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 13. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M13 0



// Name:         AXI_R_ARB_TYPE_M14
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 14
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 14. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M14 0



// Name:         AXI_B_ARB_TYPE_M14
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 14
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 14. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M14 0



// Name:         AXI_R_ARB_TYPE_M15
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 15
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 15. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M15 0



// Name:         AXI_B_ARB_TYPE_M15
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 15
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 15. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M15 0



// Name:         AXI_R_ARB_TYPE_M16
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 16
// 
// Selects the type of arbiter to be used in the Read Data channel at  
// master port 16. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_ARB_TYPE_M16 0



// Name:         AXI_B_ARB_TYPE_M16
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      AXI_NUM_MASTERS >= 16
// 
// Selects the type of arbiter to be used in the Burst Response channel at  
// master port 16. 
//  
// Priority               : Highest priority wins and the lowest numbered slave  
//                          among slaves with the same priority wins. 
//  
// First Come First Serve : Slaves granted in the order that they request, longest 
//                          waiting slave has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between slaves of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_ARB_TYPE_M16 0



// Name:         AXI_AR_SHARED_ARB_TYPE
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      (AXI_AR_HAS_SHARED_LAYER == 1)
// 
// Selects the type of arbiter to be used in the shared Read Address channel. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_AR_SHARED_ARB_TYPE 0



// Name:         AXI_AW_SHARED_ARB_TYPE
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      (AXI_AW_HAS_SHARED_LAYER == 1)
// 
// Selects the type of arbiter to be used in the shared Write Address channel. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_AW_SHARED_ARB_TYPE 0



// Name:         AXI_W_SHARED_ARB_TYPE
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      (AXI_W_HAS_SHARED_LAYER == 1)
// 
// Selects the type of arbiter to be used in the shared Write Data channel. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_W_SHARED_ARB_TYPE 0



// Name:         AXI_R_SHARED_ARB_TYPE
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      (AXI_R_HAS_SHARED_LAYER == 1)
// 
// Selects the type of arbiter to be used in the shared Read Data channel. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_R_SHARED_ARB_TYPE 0



// Name:         AXI_B_SHARED_ARB_TYPE
// Default:      Priority
// Values:       Priority (0), First Come First Serve (1), Fair Among Equals (2), 
//               User Defined (3)
// Enabled:      (AXI_B_HAS_SHARED_LAYER == 1)
// 
// Selects the type of arbiter to be used in the shared Burst Response channel. 
//  
// Priority               : Highest priority wins and the lowest numbered master 
//                          among masters with the same priority wins. 
//  
// First Come First Serve : Masters granted in the order that they request, longest 
//                          waiting master has the highest priority. 
//  
// Fair Among Equals      : Two tier arbitration. First tier is dynamic priority,  
//                          second tier shares grants equally between masters of the same 
//                          highest requesting priority on a cycle by cycle basis. 
//  
// User Defined           : Instantiates a plain text arbitration module which the user 
//                          can edit to their own requirements within the guidelines 
//                          outlined in the DW_axi Databook. By default this plain 
//                          text module instantiates a dynamic priority arbiter.
`define AXI_B_SHARED_ARB_TYPE 0



//Creates a define for whether or not we need to use the user
//defined arbiter module.

`define AXI_USER_ARB_REMOVAL 1

//Defined if AXI_USER_ARB_REMOVAL == 0.



// Name:         AXI_NUM_RN_S1
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 1 in Normal mode.
`define AXI_NUM_RN_S1 1


// Name:         AXI_NUM_RN_S2
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 2 in Normal mode.
`define AXI_NUM_RN_S2 1


// Name:         AXI_NUM_RN_S3
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 3 in Normal mode.
`define AXI_NUM_RN_S3 1


// Name:         AXI_NUM_RN_S4
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 4 in Normal mode.
`define AXI_NUM_RN_S4 1


// Name:         AXI_NUM_RN_S5
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 5 in Normal mode.
`define AXI_NUM_RN_S5 1


// Name:         AXI_NUM_RN_S6
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 6 in Normal mode.
`define AXI_NUM_RN_S6 1


// Name:         AXI_NUM_RN_S7
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 7 in Normal mode.
`define AXI_NUM_RN_S7 1


// Name:         AXI_NUM_RN_S8
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 8 in Normal mode.
`define AXI_NUM_RN_S8 1


// Name:         AXI_NUM_RN_S9
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 9 in Normal mode.
`define AXI_NUM_RN_S9 1


// Name:         AXI_NUM_RN_S10
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 10 in Normal mode.
`define AXI_NUM_RN_S10 1


// Name:         AXI_NUM_RN_S11
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 11 in Normal mode.
`define AXI_NUM_RN_S11 1


// Name:         AXI_NUM_RN_S12
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 12 in Normal mode.
`define AXI_NUM_RN_S12 1


// Name:         AXI_NUM_RN_S13
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 13 in Normal mode.
`define AXI_NUM_RN_S13 1


// Name:         AXI_NUM_RN_S14
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 14 in Normal mode.
`define AXI_NUM_RN_S14 1


// Name:         AXI_NUM_RN_S15
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 15 in Normal mode.
`define AXI_NUM_RN_S15 1


// Name:         AXI_NUM_RN_S16
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// This is the number of address regions that are available  
// for Slave 16 in Normal mode.
`define AXI_NUM_RN_S16 1


// Name:         AXI_R1_NSA_S1
// Default:      0x2000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S1 32'h0


// Name:         AXI_R1_NEA_S1
// Default:      0x200ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S1 32'h1fffffff
 

// Name:         AXI_R1_NSA_S2
// Default:      0xa000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S2 32'ha000000


// Name:         AXI_R1_NEA_S2
// Default:      0xa00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S2 32'ha00ffff
 

// Name:         AXI_R1_NSA_S3
// Default:      0xc000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S3 32'hc000000


// Name:         AXI_R1_NEA_S3
// Default:      0xc00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S3 32'hc00ffff
 

// Name:         AXI_R1_NSA_S4
// Default:      0xe000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S4 32'he000000


// Name:         AXI_R1_NEA_S4
// Default:      0xe00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S4 32'he00ffff
 

// Name:         AXI_R1_NSA_S5
// Default:      0x10000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S5 32'h10000000


// Name:         AXI_R1_NEA_S5
// Default:      0x1000ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S5 32'h1000ffff
 

// Name:         AXI_R1_NSA_S6
// Default:      0x12000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S6 32'h12000000


// Name:         AXI_R1_NEA_S6
// Default:      0x1200ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S6 32'h1200ffff
 

// Name:         AXI_R1_NSA_S7
// Default:      0x14000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S7 32'h14000000


// Name:         AXI_R1_NEA_S7
// Default:      0x1400ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S7 32'h1400ffff
 

// Name:         AXI_R1_NSA_S8
// Default:      0x16000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S8 32'h16000000


// Name:         AXI_R1_NEA_S8
// Default:      0x1600ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S8 32'h1600ffff
 

// Name:         AXI_R1_NSA_S9
// Default:      0x18000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S9 32'h18000000


// Name:         AXI_R1_NEA_S9
// Default:      0x1800ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S9 32'h1800ffff
 

// Name:         AXI_R1_NSA_S10
// Default:      0x1a000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S10 32'h1a000000


// Name:         AXI_R1_NEA_S10
// Default:      0x1a00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S10 32'h1a00ffff
 

// Name:         AXI_R1_NSA_S11
// Default:      0x1c000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S11 32'h1c000000


// Name:         AXI_R1_NEA_S11
// Default:      0x1c00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S11 32'h1c00ffff
 

// Name:         AXI_R1_NSA_S12
// Default:      0x1e000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S12 32'h1e000000


// Name:         AXI_R1_NEA_S12
// Default:      0x1e00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S12 32'h1e00ffff
 

// Name:         AXI_R1_NSA_S13
// Default:      0x20000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S13 32'h20000000


// Name:         AXI_R1_NEA_S13
// Default:      0x2000ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S13 32'h2000ffff
 

// Name:         AXI_R1_NSA_S14
// Default:      0x22000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S14 32'h22000000


// Name:         AXI_R1_NEA_S14
// Default:      0x2200ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S14 32'h2200ffff
 

// Name:         AXI_R1_NSA_S15
// Default:      0x24000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S15 32'h24000000


// Name:         AXI_R1_NEA_S15
// Default:      0x2400ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S15 32'h2400ffff
 

// Name:         AXI_R1_NSA_S16
// Default:      0x26000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NSA_S16 32'h26000000


// Name:         AXI_R1_NEA_S16
// Default:      0x2600ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1)
// 
// Region 1, Normal addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_NEA_S16 32'h2600ffff
 

// Name:         AXI_R2_NSA_S1
// Default:      0x3000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               2)
// 
// Region 2, Normal addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S1 32'h3000000


// Name:         AXI_R2_NEA_S1
// Default:      0x300ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               2)
// 
// Region 2, Normal addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S1 32'h300ffff
 

// Name:         AXI_R2_NSA_S2
// Default:      0xb000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               2)
// 
// Region 2, Normal addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S2 32'hb000000


// Name:         AXI_R2_NEA_S2
// Default:      0xb00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               2)
// 
// Region 2, Normal addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S2 32'hb00ffff
 

// Name:         AXI_R2_NSA_S3
// Default:      0xd000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               2)
// 
// Region 2, Normal addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S3 32'hd000000


// Name:         AXI_R2_NEA_S3
// Default:      0xd00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               2)
// 
// Region 2, Normal addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S3 32'hd00ffff
 

// Name:         AXI_R2_NSA_S4
// Default:      0xf000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               2)
// 
// Region 2, Normal addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S4 32'hf000000


// Name:         AXI_R2_NEA_S4
// Default:      0xf00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               2)
// 
// Region 2, Normal addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S4 32'hf00ffff
 

// Name:         AXI_R2_NSA_S5
// Default:      0x11000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               2)
// 
// Region 2, Normal addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S5 32'h11000000


// Name:         AXI_R2_NEA_S5
// Default:      0x1100ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               2)
// 
// Region 2, Normal addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S5 32'h1100ffff
 

// Name:         AXI_R2_NSA_S6
// Default:      0x13000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               2)
// 
// Region 2, Normal addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S6 32'h13000000


// Name:         AXI_R2_NEA_S6
// Default:      0x1300ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               2)
// 
// Region 2, Normal addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S6 32'h1300ffff
 

// Name:         AXI_R2_NSA_S7
// Default:      0x15000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               2)
// 
// Region 2, Normal addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S7 32'h15000000


// Name:         AXI_R2_NEA_S7
// Default:      0x1500ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               2)
// 
// Region 2, Normal addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S7 32'h1500ffff
 

// Name:         AXI_R2_NSA_S8
// Default:      0x17000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               2)
// 
// Region 2, Normal addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S8 32'h17000000


// Name:         AXI_R2_NEA_S8
// Default:      0x1700ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               2)
// 
// Region 2, Normal addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S8 32'h1700ffff
 

// Name:         AXI_R2_NSA_S9
// Default:      0x19000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               2)
// 
// Region 2, Normal addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S9 32'h19000000


// Name:         AXI_R2_NEA_S9
// Default:      0x1900ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               2)
// 
// Region 2, Normal addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S9 32'h1900ffff
 

// Name:         AXI_R2_NSA_S10
// Default:      0x1b000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 2)
// 
// Region 2, Normal addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S10 32'h1b000000


// Name:         AXI_R2_NEA_S10
// Default:      0x1b00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 2)
// 
// Region 2, Normal addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S10 32'h1b00ffff
 

// Name:         AXI_R2_NSA_S11
// Default:      0x1d000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 2)
// 
// Region 2, Normal addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S11 32'h1d000000


// Name:         AXI_R2_NEA_S11
// Default:      0x1d00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 2)
// 
// Region 2, Normal addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S11 32'h1d00ffff
 

// Name:         AXI_R2_NSA_S12
// Default:      0x1f000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 2)
// 
// Region 2, Normal addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S12 32'h1f000000


// Name:         AXI_R2_NEA_S12
// Default:      0x1f00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 2)
// 
// Region 2, Normal addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S12 32'h1f00ffff
 

// Name:         AXI_R2_NSA_S13
// Default:      0x21000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 2)
// 
// Region 2, Normal addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S13 32'h21000000


// Name:         AXI_R2_NEA_S13
// Default:      0x2100ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 2)
// 
// Region 2, Normal addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S13 32'h2100ffff
 

// Name:         AXI_R2_NSA_S14
// Default:      0x23000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 2)
// 
// Region 2, Normal addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S14 32'h23000000


// Name:         AXI_R2_NEA_S14
// Default:      0x2300ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 2)
// 
// Region 2, Normal addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S14 32'h2300ffff
 

// Name:         AXI_R2_NSA_S15
// Default:      0x25000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 2)
// 
// Region 2, Normal addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S15 32'h25000000


// Name:         AXI_R2_NEA_S15
// Default:      0x2500ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 2)
// 
// Region 2, Normal addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S15 32'h2500ffff
 

// Name:         AXI_R2_NSA_S16
// Default:      0x27000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 2)
// 
// Region 2, Normal addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NSA_S16 32'h27000000


// Name:         AXI_R2_NEA_S16
// Default:      0x2700ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 2)
// 
// Region 2, Normal addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_NEA_S16 32'h2700ffff
 

// Name:         AXI_R3_NSA_S1
// Default:      0x4010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               3)
// 
// Region 3, Normal addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S1 32'h4010000


// Name:         AXI_R3_NEA_S1
// Default:      0x401ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               3)
// 
// Region 3, Normal addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S1 32'h401ffff
 

// Name:         AXI_R3_NSA_S2
// Default:      0x4020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               3)
// 
// Region 3, Normal addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S2 32'h4020000


// Name:         AXI_R3_NEA_S2
// Default:      0x402ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               3)
// 
// Region 3, Normal addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S2 32'h402ffff
 

// Name:         AXI_R3_NSA_S3
// Default:      0x4030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               3)
// 
// Region 3, Normal addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S3 32'h4030000


// Name:         AXI_R3_NEA_S3
// Default:      0x403ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               3)
// 
// Region 3, Normal addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S3 32'h403ffff
 

// Name:         AXI_R3_NSA_S4
// Default:      0x4040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               3)
// 
// Region 3, Normal addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S4 32'h4040000


// Name:         AXI_R3_NEA_S4
// Default:      0x404ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               3)
// 
// Region 3, Normal addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S4 32'h404ffff
 

// Name:         AXI_R3_NSA_S5
// Default:      0x4050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               3)
// 
// Region 3, Normal addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S5 32'h4050000


// Name:         AXI_R3_NEA_S5
// Default:      0x405ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               3)
// 
// Region 3, Normal addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S5 32'h405ffff
 

// Name:         AXI_R3_NSA_S6
// Default:      0x4060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               3)
// 
// Region 3, Normal addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S6 32'h4060000


// Name:         AXI_R3_NEA_S6
// Default:      0x406ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               3)
// 
// Region 3, Normal addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S6 32'h406ffff
 

// Name:         AXI_R3_NSA_S7
// Default:      0x4070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               3)
// 
// Region 3, Normal addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S7 32'h4070000


// Name:         AXI_R3_NEA_S7
// Default:      0x407ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               3)
// 
// Region 3, Normal addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S7 32'h407ffff
 

// Name:         AXI_R3_NSA_S8
// Default:      0x4080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               3)
// 
// Region 3, Normal addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S8 32'h4080000


// Name:         AXI_R3_NEA_S8
// Default:      0x408ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               3)
// 
// Region 3, Normal addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S8 32'h408ffff
 

// Name:         AXI_R3_NSA_S9
// Default:      0x4090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               3)
// 
// Region 3, Normal addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S9 32'h4090000


// Name:         AXI_R3_NEA_S9
// Default:      0x409ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               3)
// 
// Region 3, Normal addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S9 32'h409ffff
 

// Name:         AXI_R3_NSA_S10
// Default:      0x40a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 3)
// 
// Region 3, Normal addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S10 32'h40a0000


// Name:         AXI_R3_NEA_S10
// Default:      0x40affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 3)
// 
// Region 3, Normal addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S10 32'h40affff
 

// Name:         AXI_R3_NSA_S11
// Default:      0x40b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 3)
// 
// Region 3, Normal addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S11 32'h40b0000


// Name:         AXI_R3_NEA_S11
// Default:      0x40bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 3)
// 
// Region 3, Normal addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S11 32'h40bffff
 

// Name:         AXI_R3_NSA_S12
// Default:      0x40c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 3)
// 
// Region 3, Normal addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S12 32'h40c0000


// Name:         AXI_R3_NEA_S12
// Default:      0x40cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 3)
// 
// Region 3, Normal addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S12 32'h40cffff
 

// Name:         AXI_R3_NSA_S13
// Default:      0x40d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 3)
// 
// Region 3, Normal addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S13 32'h40d0000


// Name:         AXI_R3_NEA_S13
// Default:      0x40dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 3)
// 
// Region 3, Normal addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S13 32'h40dffff
 

// Name:         AXI_R3_NSA_S14
// Default:      0x40e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 3)
// 
// Region 3, Normal addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S14 32'h40e0000


// Name:         AXI_R3_NEA_S14
// Default:      0x40effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 3)
// 
// Region 3, Normal addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S14 32'h40effff
 

// Name:         AXI_R3_NSA_S15
// Default:      0x40f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 3)
// 
// Region 3, Normal addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S15 32'h40f0000


// Name:         AXI_R3_NEA_S15
// Default:      0x40fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 3)
// 
// Region 3, Normal addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S15 32'h40fffff
 

// Name:         AXI_R3_NSA_S16
// Default:      0x4000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 3)
// 
// Region 3, Normal addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NSA_S16 32'h4000000


// Name:         AXI_R3_NEA_S16
// Default:      0x400ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 3)
// 
// Region 3, Normal addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_NEA_S16 32'h400ffff
 

// Name:         AXI_R4_NSA_S1
// Default:      0x5010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               4)
// 
// Region 4, Normal addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S1 32'h5010000


// Name:         AXI_R4_NEA_S1
// Default:      0x501ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               4)
// 
// Region 4, Normal addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S1 32'h501ffff
 

// Name:         AXI_R4_NSA_S2
// Default:      0x5020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               4)
// 
// Region 4, Normal addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S2 32'h5020000


// Name:         AXI_R4_NEA_S2
// Default:      0x502ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               4)
// 
// Region 4, Normal addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S2 32'h502ffff
 

// Name:         AXI_R4_NSA_S3
// Default:      0x5030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               4)
// 
// Region 4, Normal addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S3 32'h5030000


// Name:         AXI_R4_NEA_S3
// Default:      0x503ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               4)
// 
// Region 4, Normal addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S3 32'h503ffff
 

// Name:         AXI_R4_NSA_S4
// Default:      0x5040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               4)
// 
// Region 4, Normal addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S4 32'h5040000


// Name:         AXI_R4_NEA_S4
// Default:      0x504ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               4)
// 
// Region 4, Normal addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S4 32'h504ffff
 

// Name:         AXI_R4_NSA_S5
// Default:      0x5050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               4)
// 
// Region 4, Normal addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S5 32'h5050000


// Name:         AXI_R4_NEA_S5
// Default:      0x505ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               4)
// 
// Region 4, Normal addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S5 32'h505ffff
 

// Name:         AXI_R4_NSA_S6
// Default:      0x5060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               4)
// 
// Region 4, Normal addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S6 32'h5060000


// Name:         AXI_R4_NEA_S6
// Default:      0x506ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               4)
// 
// Region 4, Normal addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S6 32'h506ffff
 

// Name:         AXI_R4_NSA_S7
// Default:      0x5070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               4)
// 
// Region 4, Normal addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S7 32'h5070000


// Name:         AXI_R4_NEA_S7
// Default:      0x507ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               4)
// 
// Region 4, Normal addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S7 32'h507ffff
 

// Name:         AXI_R4_NSA_S8
// Default:      0x5080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               4)
// 
// Region 4, Normal addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S8 32'h5080000


// Name:         AXI_R4_NEA_S8
// Default:      0x508ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               4)
// 
// Region 4, Normal addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S8 32'h508ffff
 

// Name:         AXI_R4_NSA_S9
// Default:      0x5090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               4)
// 
// Region 4, Normal addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S9 32'h5090000


// Name:         AXI_R4_NEA_S9
// Default:      0x509ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               4)
// 
// Region 4, Normal addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S9 32'h509ffff
 

// Name:         AXI_R4_NSA_S10
// Default:      0x50a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 4)
// 
// Region 4, Normal addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S10 32'h50a0000


// Name:         AXI_R4_NEA_S10
// Default:      0x50affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 4)
// 
// Region 4, Normal addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S10 32'h50affff
 

// Name:         AXI_R4_NSA_S11
// Default:      0x50b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 4)
// 
// Region 4, Normal addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S11 32'h50b0000


// Name:         AXI_R4_NEA_S11
// Default:      0x50bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 4)
// 
// Region 4, Normal addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S11 32'h50bffff
 

// Name:         AXI_R4_NSA_S12
// Default:      0x50c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 4)
// 
// Region 4, Normal addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S12 32'h50c0000


// Name:         AXI_R4_NEA_S12
// Default:      0x50cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 4)
// 
// Region 4, Normal addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S12 32'h50cffff
 

// Name:         AXI_R4_NSA_S13
// Default:      0x50d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 4)
// 
// Region 4, Normal addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S13 32'h50d0000


// Name:         AXI_R4_NEA_S13
// Default:      0x50dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 4)
// 
// Region 4, Normal addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S13 32'h50dffff
 

// Name:         AXI_R4_NSA_S14
// Default:      0x50e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 4)
// 
// Region 4, Normal addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S14 32'h50e0000


// Name:         AXI_R4_NEA_S14
// Default:      0x50effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 4)
// 
// Region 4, Normal addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S14 32'h50effff
 

// Name:         AXI_R4_NSA_S15
// Default:      0x50f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 4)
// 
// Region 4, Normal addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S15 32'h50f0000


// Name:         AXI_R4_NEA_S15
// Default:      0x50fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 4)
// 
// Region 4, Normal addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S15 32'h50fffff
 

// Name:         AXI_R4_NSA_S16
// Default:      0x5000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 4)
// 
// Region 4, Normal addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NSA_S16 32'h5000000


// Name:         AXI_R4_NEA_S16
// Default:      0x500ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 4)
// 
// Region 4, Normal addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_NEA_S16 32'h500ffff
 

// Name:         AXI_R5_NSA_S1
// Default:      0x6010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               5)
// 
// Region 5, Normal addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S1 32'h6010000


// Name:         AXI_R5_NEA_S1
// Default:      0x601ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               5)
// 
// Region 5, Normal addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S1 32'h601ffff
 

// Name:         AXI_R5_NSA_S2
// Default:      0x6020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               5)
// 
// Region 5, Normal addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S2 32'h6020000


// Name:         AXI_R5_NEA_S2
// Default:      0x602ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               5)
// 
// Region 5, Normal addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S2 32'h602ffff
 

// Name:         AXI_R5_NSA_S3
// Default:      0x6030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               5)
// 
// Region 5, Normal addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S3 32'h6030000


// Name:         AXI_R5_NEA_S3
// Default:      0x603ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               5)
// 
// Region 5, Normal addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S3 32'h603ffff
 

// Name:         AXI_R5_NSA_S4
// Default:      0x6040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               5)
// 
// Region 5, Normal addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S4 32'h6040000


// Name:         AXI_R5_NEA_S4
// Default:      0x604ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               5)
// 
// Region 5, Normal addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S4 32'h604ffff
 

// Name:         AXI_R5_NSA_S5
// Default:      0x6050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               5)
// 
// Region 5, Normal addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S5 32'h6050000


// Name:         AXI_R5_NEA_S5
// Default:      0x605ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               5)
// 
// Region 5, Normal addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S5 32'h605ffff
 

// Name:         AXI_R5_NSA_S6
// Default:      0x6060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               5)
// 
// Region 5, Normal addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S6 32'h6060000


// Name:         AXI_R5_NEA_S6
// Default:      0x606ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               5)
// 
// Region 5, Normal addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S6 32'h606ffff
 

// Name:         AXI_R5_NSA_S7
// Default:      0x6070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               5)
// 
// Region 5, Normal addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S7 32'h6070000


// Name:         AXI_R5_NEA_S7
// Default:      0x607ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               5)
// 
// Region 5, Normal addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S7 32'h607ffff
 

// Name:         AXI_R5_NSA_S8
// Default:      0x6080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               5)
// 
// Region 5, Normal addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S8 32'h6080000


// Name:         AXI_R5_NEA_S8
// Default:      0x608ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               5)
// 
// Region 5, Normal addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S8 32'h608ffff
 

// Name:         AXI_R5_NSA_S9
// Default:      0x6090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               5)
// 
// Region 5, Normal addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S9 32'h6090000


// Name:         AXI_R5_NEA_S9
// Default:      0x609ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               5)
// 
// Region 5, Normal addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S9 32'h609ffff
 

// Name:         AXI_R5_NSA_S10
// Default:      0x60a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 5)
// 
// Region 5, Normal addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S10 32'h60a0000


// Name:         AXI_R5_NEA_S10
// Default:      0x60affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 5)
// 
// Region 5, Normal addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S10 32'h60affff
 

// Name:         AXI_R5_NSA_S11
// Default:      0x60b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 5)
// 
// Region 5, Normal addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S11 32'h60b0000


// Name:         AXI_R5_NEA_S11
// Default:      0x60bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 5)
// 
// Region 5, Normal addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S11 32'h60bffff
 

// Name:         AXI_R5_NSA_S12
// Default:      0x60c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 5)
// 
// Region 5, Normal addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S12 32'h60c0000


// Name:         AXI_R5_NEA_S12
// Default:      0x60cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 5)
// 
// Region 5, Normal addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S12 32'h60cffff
 

// Name:         AXI_R5_NSA_S13
// Default:      0x60d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 5)
// 
// Region 5, Normal addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S13 32'h60d0000


// Name:         AXI_R5_NEA_S13
// Default:      0x60dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 5)
// 
// Region 5, Normal addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S13 32'h60dffff
 

// Name:         AXI_R5_NSA_S14
// Default:      0x60e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 5)
// 
// Region 5, Normal addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S14 32'h60e0000


// Name:         AXI_R5_NEA_S14
// Default:      0x60effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 5)
// 
// Region 5, Normal addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S14 32'h60effff
 

// Name:         AXI_R5_NSA_S15
// Default:      0x60f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 5)
// 
// Region 5, Normal addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S15 32'h60f0000


// Name:         AXI_R5_NEA_S15
// Default:      0x60fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 5)
// 
// Region 5, Normal addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S15 32'h60fffff
 

// Name:         AXI_R5_NSA_S16
// Default:      0x6000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 5)
// 
// Region 5, Normal addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NSA_S16 32'h6000000


// Name:         AXI_R5_NEA_S16
// Default:      0x600ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 5)
// 
// Region 5, Normal addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_NEA_S16 32'h600ffff
 

// Name:         AXI_R6_NSA_S1
// Default:      0x7010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               6)
// 
// Region 6, Normal addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S1 32'h7010000


// Name:         AXI_R6_NEA_S1
// Default:      0x701ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               6)
// 
// Region 6, Normal addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S1 32'h701ffff
 

// Name:         AXI_R6_NSA_S2
// Default:      0x7020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               6)
// 
// Region 6, Normal addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S2 32'h7020000


// Name:         AXI_R6_NEA_S2
// Default:      0x702ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               6)
// 
// Region 6, Normal addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S2 32'h702ffff
 

// Name:         AXI_R6_NSA_S3
// Default:      0x7030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               6)
// 
// Region 6, Normal addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S3 32'h7030000


// Name:         AXI_R6_NEA_S3
// Default:      0x703ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               6)
// 
// Region 6, Normal addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S3 32'h703ffff
 

// Name:         AXI_R6_NSA_S4
// Default:      0x7040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               6)
// 
// Region 6, Normal addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S4 32'h7040000


// Name:         AXI_R6_NEA_S4
// Default:      0x704ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               6)
// 
// Region 6, Normal addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S4 32'h704ffff
 

// Name:         AXI_R6_NSA_S5
// Default:      0x7050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               6)
// 
// Region 6, Normal addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S5 32'h7050000


// Name:         AXI_R6_NEA_S5
// Default:      0x705ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               6)
// 
// Region 6, Normal addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S5 32'h705ffff
 

// Name:         AXI_R6_NSA_S6
// Default:      0x7060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               6)
// 
// Region 6, Normal addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S6 32'h7060000


// Name:         AXI_R6_NEA_S6
// Default:      0x706ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               6)
// 
// Region 6, Normal addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S6 32'h706ffff
 

// Name:         AXI_R6_NSA_S7
// Default:      0x7070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               6)
// 
// Region 6, Normal addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S7 32'h7070000


// Name:         AXI_R6_NEA_S7
// Default:      0x707ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               6)
// 
// Region 6, Normal addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S7 32'h707ffff
 

// Name:         AXI_R6_NSA_S8
// Default:      0x7080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               6)
// 
// Region 6, Normal addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S8 32'h7080000


// Name:         AXI_R6_NEA_S8
// Default:      0x708ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               6)
// 
// Region 6, Normal addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S8 32'h708ffff
 

// Name:         AXI_R6_NSA_S9
// Default:      0x7090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               6)
// 
// Region 6, Normal addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S9 32'h7090000


// Name:         AXI_R6_NEA_S9
// Default:      0x709ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               6)
// 
// Region 6, Normal addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S9 32'h709ffff
 

// Name:         AXI_R6_NSA_S10
// Default:      0x70a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 6)
// 
// Region 6, Normal addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S10 32'h70a0000


// Name:         AXI_R6_NEA_S10
// Default:      0x70affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 6)
// 
// Region 6, Normal addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S10 32'h70affff
 

// Name:         AXI_R6_NSA_S11
// Default:      0x70b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 6)
// 
// Region 6, Normal addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S11 32'h70b0000


// Name:         AXI_R6_NEA_S11
// Default:      0x70bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 6)
// 
// Region 6, Normal addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S11 32'h70bffff
 

// Name:         AXI_R6_NSA_S12
// Default:      0x70c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 6)
// 
// Region 6, Normal addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S12 32'h70c0000


// Name:         AXI_R6_NEA_S12
// Default:      0x70cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 6)
// 
// Region 6, Normal addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S12 32'h70cffff
 

// Name:         AXI_R6_NSA_S13
// Default:      0x70d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 6)
// 
// Region 6, Normal addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S13 32'h70d0000


// Name:         AXI_R6_NEA_S13
// Default:      0x70dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 6)
// 
// Region 6, Normal addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S13 32'h70dffff
 

// Name:         AXI_R6_NSA_S14
// Default:      0x70e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 6)
// 
// Region 6, Normal addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S14 32'h70e0000


// Name:         AXI_R6_NEA_S14
// Default:      0x70effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 6)
// 
// Region 6, Normal addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S14 32'h70effff
 

// Name:         AXI_R6_NSA_S15
// Default:      0x70f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 6)
// 
// Region 6, Normal addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S15 32'h70f0000


// Name:         AXI_R6_NEA_S15
// Default:      0x70fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 6)
// 
// Region 6, Normal addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S15 32'h70fffff
 

// Name:         AXI_R6_NSA_S16
// Default:      0x7000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 6)
// 
// Region 6, Normal addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NSA_S16 32'h7000000


// Name:         AXI_R6_NEA_S16
// Default:      0x700ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 6)
// 
// Region 6, Normal addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_NEA_S16 32'h700ffff
 

// Name:         AXI_R7_NSA_S1
// Default:      0x8010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               7)
// 
// Region 7, Normal addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S1 32'h8010000


// Name:         AXI_R7_NEA_S1
// Default:      0x801ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               7)
// 
// Region 7, Normal addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S1 32'h801ffff
 

// Name:         AXI_R7_NSA_S2
// Default:      0x8020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               7)
// 
// Region 7, Normal addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S2 32'h8020000


// Name:         AXI_R7_NEA_S2
// Default:      0x802ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               7)
// 
// Region 7, Normal addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S2 32'h802ffff
 

// Name:         AXI_R7_NSA_S3
// Default:      0x8030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               7)
// 
// Region 7, Normal addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S3 32'h8030000


// Name:         AXI_R7_NEA_S3
// Default:      0x803ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               7)
// 
// Region 7, Normal addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S3 32'h803ffff
 

// Name:         AXI_R7_NSA_S4
// Default:      0x8040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               7)
// 
// Region 7, Normal addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S4 32'h8040000


// Name:         AXI_R7_NEA_S4
// Default:      0x804ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               7)
// 
// Region 7, Normal addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S4 32'h804ffff
 

// Name:         AXI_R7_NSA_S5
// Default:      0x8050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               7)
// 
// Region 7, Normal addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S5 32'h8050000


// Name:         AXI_R7_NEA_S5
// Default:      0x805ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               7)
// 
// Region 7, Normal addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S5 32'h805ffff
 

// Name:         AXI_R7_NSA_S6
// Default:      0x8060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               7)
// 
// Region 7, Normal addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S6 32'h8060000


// Name:         AXI_R7_NEA_S6
// Default:      0x806ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               7)
// 
// Region 7, Normal addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S6 32'h806ffff
 

// Name:         AXI_R7_NSA_S7
// Default:      0x8070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               7)
// 
// Region 7, Normal addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S7 32'h8070000


// Name:         AXI_R7_NEA_S7
// Default:      0x807ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               7)
// 
// Region 7, Normal addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S7 32'h807ffff
 

// Name:         AXI_R7_NSA_S8
// Default:      0x8080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               7)
// 
// Region 7, Normal addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S8 32'h8080000


// Name:         AXI_R7_NEA_S8
// Default:      0x808ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               7)
// 
// Region 7, Normal addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S8 32'h808ffff
 

// Name:         AXI_R7_NSA_S9
// Default:      0x8090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               7)
// 
// Region 7, Normal addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S9 32'h8090000


// Name:         AXI_R7_NEA_S9
// Default:      0x809ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               7)
// 
// Region 7, Normal addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S9 32'h809ffff
 

// Name:         AXI_R7_NSA_S10
// Default:      0x80a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 7)
// 
// Region 7, Normal addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S10 32'h80a0000


// Name:         AXI_R7_NEA_S10
// Default:      0x80affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 7)
// 
// Region 7, Normal addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S10 32'h80affff
 

// Name:         AXI_R7_NSA_S11
// Default:      0x80b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 7)
// 
// Region 7, Normal addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S11 32'h80b0000


// Name:         AXI_R7_NEA_S11
// Default:      0x80bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 7)
// 
// Region 7, Normal addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S11 32'h80bffff
 

// Name:         AXI_R7_NSA_S12
// Default:      0x80c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 7)
// 
// Region 7, Normal addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S12 32'h80c0000


// Name:         AXI_R7_NEA_S12
// Default:      0x80cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 7)
// 
// Region 7, Normal addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S12 32'h80cffff
 

// Name:         AXI_R7_NSA_S13
// Default:      0x80d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 7)
// 
// Region 7, Normal addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S13 32'h80d0000


// Name:         AXI_R7_NEA_S13
// Default:      0x80dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 7)
// 
// Region 7, Normal addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S13 32'h80dffff
 

// Name:         AXI_R7_NSA_S14
// Default:      0x80e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 7)
// 
// Region 7, Normal addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S14 32'h80e0000


// Name:         AXI_R7_NEA_S14
// Default:      0x80effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 7)
// 
// Region 7, Normal addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S14 32'h80effff
 

// Name:         AXI_R7_NSA_S15
// Default:      0x80f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 7)
// 
// Region 7, Normal addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S15 32'h80f0000


// Name:         AXI_R7_NEA_S15
// Default:      0x80fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 7)
// 
// Region 7, Normal addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S15 32'h80fffff
 

// Name:         AXI_R7_NSA_S16
// Default:      0x8000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 7)
// 
// Region 7, Normal addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NSA_S16 32'h8000000


// Name:         AXI_R7_NEA_S16
// Default:      0x800ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 7)
// 
// Region 7, Normal addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_NEA_S16 32'h800ffff
 

// Name:         AXI_R8_NSA_S1
// Default:      0x9010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               8)
// 
// Region 8, Normal addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S1 32'h9010000


// Name:         AXI_R8_NEA_S1
// Default:      0x901ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_NV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S1 >= 
//               8)
// 
// Region 8, Normal addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S1 32'h901ffff
 

// Name:         AXI_R8_NSA_S2
// Default:      0x9020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               8)
// 
// Region 8, Normal addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S2 32'h9020000


// Name:         AXI_R8_NEA_S2
// Default:      0x902ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_NV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S2 >= 
//               8)
// 
// Region 8, Normal addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S2 32'h902ffff
 

// Name:         AXI_R8_NSA_S3
// Default:      0x9030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               8)
// 
// Region 8, Normal addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S3 32'h9030000


// Name:         AXI_R8_NEA_S3
// Default:      0x903ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_NV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S3 >= 
//               8)
// 
// Region 8, Normal addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S3 32'h903ffff
 

// Name:         AXI_R8_NSA_S4
// Default:      0x9040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               8)
// 
// Region 8, Normal addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S4 32'h9040000


// Name:         AXI_R8_NEA_S4
// Default:      0x904ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_NV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S4 >= 
//               8)
// 
// Region 8, Normal addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S4 32'h904ffff
 

// Name:         AXI_R8_NSA_S5
// Default:      0x9050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               8)
// 
// Region 8, Normal addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S5 32'h9050000


// Name:         AXI_R8_NEA_S5
// Default:      0x905ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_NV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S5 >= 
//               8)
// 
// Region 8, Normal addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S5 32'h905ffff
 

// Name:         AXI_R8_NSA_S6
// Default:      0x9060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               8)
// 
// Region 8, Normal addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S6 32'h9060000


// Name:         AXI_R8_NEA_S6
// Default:      0x906ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_NV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S6 >= 
//               8)
// 
// Region 8, Normal addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S6 32'h906ffff
 

// Name:         AXI_R8_NSA_S7
// Default:      0x9070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               8)
// 
// Region 8, Normal addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S7 32'h9070000


// Name:         AXI_R8_NEA_S7
// Default:      0x907ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_NV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S7 >= 
//               8)
// 
// Region 8, Normal addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S7 32'h907ffff
 

// Name:         AXI_R8_NSA_S8
// Default:      0x9080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               8)
// 
// Region 8, Normal addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S8 32'h9080000


// Name:         AXI_R8_NEA_S8
// Default:      0x908ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_NV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S8 >= 
//               8)
// 
// Region 8, Normal addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S8 32'h908ffff
 

// Name:         AXI_R8_NSA_S9
// Default:      0x9090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               8)
// 
// Region 8, Normal addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S9 32'h9090000


// Name:         AXI_R8_NEA_S9
// Default:      0x909ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_NV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S9 >= 
//               8)
// 
// Region 8, Normal addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S9 32'h909ffff
 

// Name:         AXI_R8_NSA_S10
// Default:      0x90a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 8)
// 
// Region 8, Normal addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S10 32'h90a0000


// Name:         AXI_R8_NEA_S10
// Default:      0x90affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_NV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S10 
//               >= 8)
// 
// Region 8, Normal addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S10 32'h90affff
 

// Name:         AXI_R8_NSA_S11
// Default:      0x90b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 8)
// 
// Region 8, Normal addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S11 32'h90b0000


// Name:         AXI_R8_NEA_S11
// Default:      0x90bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_NV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S11 
//               >= 8)
// 
// Region 8, Normal addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S11 32'h90bffff
 

// Name:         AXI_R8_NSA_S12
// Default:      0x90c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 8)
// 
// Region 8, Normal addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S12 32'h90c0000


// Name:         AXI_R8_NEA_S12
// Default:      0x90cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_NV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S12 
//               >= 8)
// 
// Region 8, Normal addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S12 32'h90cffff
 

// Name:         AXI_R8_NSA_S13
// Default:      0x90d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 8)
// 
// Region 8, Normal addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S13 32'h90d0000


// Name:         AXI_R8_NEA_S13
// Default:      0x90dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_NV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S13 
//               >= 8)
// 
// Region 8, Normal addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S13 32'h90dffff
 

// Name:         AXI_R8_NSA_S14
// Default:      0x90e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 8)
// 
// Region 8, Normal addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S14 32'h90e0000


// Name:         AXI_R8_NEA_S14
// Default:      0x90effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_NV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S14 
//               >= 8)
// 
// Region 8, Normal addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S14 32'h90effff
 

// Name:         AXI_R8_NSA_S15
// Default:      0x90f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 8)
// 
// Region 8, Normal addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S15 32'h90f0000


// Name:         AXI_R8_NEA_S15
// Default:      0x90fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_NV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S15 
//               >= 8)
// 
// Region 8, Normal addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S15 32'h90fffff
 

// Name:         AXI_R8_NSA_S16
// Default:      0x9000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 8)
// 
// Region 8, Normal addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NSA_S16 32'h9000000


// Name:         AXI_R8_NEA_S16
// Default:      0x900ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_NV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_NUM_RN_S16 
//               >= 8)
// 
// Region 8, Normal addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_NEA_S16 32'h900ffff
 

// Name:         AXI_NUM_RB_S1
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// This is the number of address regions that are available  
// for Slave 1 in Boot mode.
`define AXI_NUM_RB_S1 1


// Name:         AXI_NUM_RB_S2
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// This is the number of address regions that are available  
// for Slave 2 in Boot mode.
`define AXI_NUM_RB_S2 1


// Name:         AXI_NUM_RB_S3
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// This is the number of address regions that are available  
// for Slave 3 in Boot mode.
`define AXI_NUM_RB_S3 1


// Name:         AXI_NUM_RB_S4
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// This is the number of address regions that are available  
// for Slave 4 in Boot mode.
`define AXI_NUM_RB_S4 1


// Name:         AXI_NUM_RB_S5
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// This is the number of address regions that are available  
// for Slave 5 in Boot mode.
`define AXI_NUM_RB_S5 1


// Name:         AXI_NUM_RB_S6
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// This is the number of address regions that are available  
// for Slave 6 in Boot mode.
`define AXI_NUM_RB_S6 1


// Name:         AXI_NUM_RB_S7
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// This is the number of address regions that are available  
// for Slave 7 in Boot mode.
`define AXI_NUM_RB_S7 1


// Name:         AXI_NUM_RB_S8
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// This is the number of address regions that are available  
// for Slave 8 in Boot mode.
`define AXI_NUM_RB_S8 1


// Name:         AXI_NUM_RB_S9
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// This is the number of address regions that are available  
// for Slave 9 in Boot mode.
`define AXI_NUM_RB_S9 1


// Name:         AXI_NUM_RB_S10
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// This is the number of address regions that are available  
// for Slave 10 in Boot mode.
`define AXI_NUM_RB_S10 1


// Name:         AXI_NUM_RB_S11
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// This is the number of address regions that are available  
// for Slave 11 in Boot mode.
`define AXI_NUM_RB_S11 1


// Name:         AXI_NUM_RB_S12
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// This is the number of address regions that are available  
// for Slave 12 in Boot mode.
`define AXI_NUM_RB_S12 1


// Name:         AXI_NUM_RB_S13
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// This is the number of address regions that are available  
// for Slave 13 in Boot mode.
`define AXI_NUM_RB_S13 1


// Name:         AXI_NUM_RB_S14
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// This is the number of address regions that are available  
// for Slave 14 in Boot mode.
`define AXI_NUM_RB_S14 1


// Name:         AXI_NUM_RB_S15
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// This is the number of address regions that are available  
// for Slave 15 in Boot mode.
`define AXI_NUM_RB_S15 1


// Name:         AXI_NUM_RB_S16
// Default:      1
// Values:       1, ..., 8
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// This is the number of address regions that are available  
// for Slave 16 in Boot mode.
`define AXI_NUM_RB_S16 1


// Name:         AXI_R1_BSA_S1
// Default:      0x2000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S1 32'h0


// Name:         AXI_R1_BEA_S1
// Default:      0x200ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S1 32'h1fffffff
 

// Name:         AXI_R1_BSA_S2
// Default:      0xa000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S2 32'ha000000


// Name:         AXI_R1_BEA_S2
// Default:      0xa00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S2 32'ha00ffff
 

// Name:         AXI_R1_BSA_S3
// Default:      0xc000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S3 32'hc000000


// Name:         AXI_R1_BEA_S3
// Default:      0xc00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S3 32'hc00ffff
 

// Name:         AXI_R1_BSA_S4
// Default:      0xe000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S4 32'he000000


// Name:         AXI_R1_BEA_S4
// Default:      0xe00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S4 32'he00ffff
 

// Name:         AXI_R1_BSA_S5
// Default:      0x10000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S5 32'h10000000


// Name:         AXI_R1_BEA_S5
// Default:      0x1000ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S5 32'h1000ffff
 

// Name:         AXI_R1_BSA_S6
// Default:      0x12000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S6 32'h12000000


// Name:         AXI_R1_BEA_S6
// Default:      0x1200ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S6 32'h1200ffff
 

// Name:         AXI_R1_BSA_S7
// Default:      0x14000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S7 32'h14000000


// Name:         AXI_R1_BEA_S7
// Default:      0x1400ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S7 32'h1400ffff
 

// Name:         AXI_R1_BSA_S8
// Default:      0x16000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S8 32'h16000000


// Name:         AXI_R1_BEA_S8
// Default:      0x1600ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S8 32'h1600ffff
 

// Name:         AXI_R1_BSA_S9
// Default:      0x18000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S9 32'h18000000


// Name:         AXI_R1_BEA_S9
// Default:      0x1800ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1)
// 
// Region 1, Boot addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S9 32'h1800ffff
 

// Name:         AXI_R1_BSA_S10
// Default:      0x1a000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S10 32'h1a000000


// Name:         AXI_R1_BEA_S10
// Default:      0x1a00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S10 32'h1a00ffff
 

// Name:         AXI_R1_BSA_S11
// Default:      0x1c000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S11 32'h1c000000


// Name:         AXI_R1_BEA_S11
// Default:      0x1c00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S11 32'h1c00ffff
 

// Name:         AXI_R1_BSA_S12
// Default:      0x1e000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S12 32'h1e000000


// Name:         AXI_R1_BEA_S12
// Default:      0x1e00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S12 32'h1e00ffff
 

// Name:         AXI_R1_BSA_S13
// Default:      0x20000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S13 32'h20000000


// Name:         AXI_R1_BEA_S13
// Default:      0x2000ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S13 32'h2000ffff
 

// Name:         AXI_R1_BSA_S14
// Default:      0x22000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S14 32'h22000000


// Name:         AXI_R1_BEA_S14
// Default:      0x2200ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S14 32'h2200ffff
 

// Name:         AXI_R1_BSA_S15
// Default:      0x24000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S15 32'h24000000


// Name:         AXI_R1_BEA_S15
// Default:      0x2400ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S15 32'h2400ffff
 

// Name:         AXI_R1_BSA_S16
// Default:      0x26000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BSA_S16 32'h26000000


// Name:         AXI_R1_BEA_S16
// Default:      0x2600ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1)
// 
// Region 1, Boot addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R1_BEA_S16 32'h2600ffff
 

// Name:         AXI_R2_BSA_S1
// Default:      0x3000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S1 32'h3000000


// Name:         AXI_R2_BEA_S1
// Default:      0x300ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S1 32'h300ffff
 

// Name:         AXI_R2_BSA_S2
// Default:      0xb000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S2 32'hb000000


// Name:         AXI_R2_BEA_S2
// Default:      0xb00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S2 32'hb00ffff
 

// Name:         AXI_R2_BSA_S3
// Default:      0xd000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S3 32'hd000000


// Name:         AXI_R2_BEA_S3
// Default:      0xd00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S3 32'hd00ffff
 

// Name:         AXI_R2_BSA_S4
// Default:      0xf000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S4 32'hf000000


// Name:         AXI_R2_BEA_S4
// Default:      0xf00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S4 32'hf00ffff
 

// Name:         AXI_R2_BSA_S5
// Default:      0x11000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S5 32'h11000000


// Name:         AXI_R2_BEA_S5
// Default:      0x1100ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S5 32'h1100ffff
 

// Name:         AXI_R2_BSA_S6
// Default:      0x13000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S6 32'h13000000


// Name:         AXI_R2_BEA_S6
// Default:      0x1300ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S6 32'h1300ffff
 

// Name:         AXI_R2_BSA_S7
// Default:      0x15000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S7 32'h15000000


// Name:         AXI_R2_BEA_S7
// Default:      0x1500ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S7 32'h1500ffff
 

// Name:         AXI_R2_BSA_S8
// Default:      0x17000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S8 32'h17000000


// Name:         AXI_R2_BEA_S8
// Default:      0x1700ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S8 32'h1700ffff
 

// Name:         AXI_R2_BSA_S9
// Default:      0x19000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S9 32'h19000000


// Name:         AXI_R2_BEA_S9
// Default:      0x1900ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S9 32'h1900ffff
 

// Name:         AXI_R2_BSA_S10
// Default:      0x1b000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S10 32'h1b000000


// Name:         AXI_R2_BEA_S10
// Default:      0x1b00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S10 32'h1b00ffff
 

// Name:         AXI_R2_BSA_S11
// Default:      0x1d000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S11 32'h1d000000


// Name:         AXI_R2_BEA_S11
// Default:      0x1d00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S11 32'h1d00ffff
 

// Name:         AXI_R2_BSA_S12
// Default:      0x1f000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S12 32'h1f000000


// Name:         AXI_R2_BEA_S12
// Default:      0x1f00ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S12 32'h1f00ffff
 

// Name:         AXI_R2_BSA_S13
// Default:      0x21000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S13 32'h21000000


// Name:         AXI_R2_BEA_S13
// Default:      0x2100ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S13 32'h2100ffff
 

// Name:         AXI_R2_BSA_S14
// Default:      0x23000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S14 32'h23000000


// Name:         AXI_R2_BEA_S14
// Default:      0x2300ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S14 32'h2300ffff
 

// Name:         AXI_R2_BSA_S15
// Default:      0x25000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S15 32'h25000000


// Name:         AXI_R2_BEA_S15
// Default:      0x2500ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S15 32'h2500ffff
 

// Name:         AXI_R2_BSA_S16
// Default:      0x27000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 2)
// 
// Region 2, Boot addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BSA_S16 32'h27000000


// Name:         AXI_R2_BEA_S16
// Default:      0x2700ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 2)
// 
// Region 2, Boot addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R2_BEA_S16 32'h2700ffff
 

// Name:         AXI_R3_BSA_S1
// Default:      0x4010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S1 32'h4010000


// Name:         AXI_R3_BEA_S1
// Default:      0x401ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S1 32'h401ffff
 

// Name:         AXI_R3_BSA_S2
// Default:      0x4020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S2 32'h4020000


// Name:         AXI_R3_BEA_S2
// Default:      0x402ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S2 32'h402ffff
 

// Name:         AXI_R3_BSA_S3
// Default:      0x4030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S3 32'h4030000


// Name:         AXI_R3_BEA_S3
// Default:      0x403ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S3 32'h403ffff
 

// Name:         AXI_R3_BSA_S4
// Default:      0x4040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S4 32'h4040000


// Name:         AXI_R3_BEA_S4
// Default:      0x404ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S4 32'h404ffff
 

// Name:         AXI_R3_BSA_S5
// Default:      0x4050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S5 32'h4050000


// Name:         AXI_R3_BEA_S5
// Default:      0x405ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S5 32'h405ffff
 

// Name:         AXI_R3_BSA_S6
// Default:      0x4060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S6 32'h4060000


// Name:         AXI_R3_BEA_S6
// Default:      0x406ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S6 32'h406ffff
 

// Name:         AXI_R3_BSA_S7
// Default:      0x4070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S7 32'h4070000


// Name:         AXI_R3_BEA_S7
// Default:      0x407ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S7 32'h407ffff
 

// Name:         AXI_R3_BSA_S8
// Default:      0x4080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S8 32'h4080000


// Name:         AXI_R3_BEA_S8
// Default:      0x408ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S8 32'h408ffff
 

// Name:         AXI_R3_BSA_S9
// Default:      0x4090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S9 32'h4090000


// Name:         AXI_R3_BEA_S9
// Default:      0x409ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S9 32'h409ffff
 

// Name:         AXI_R3_BSA_S10
// Default:      0x40a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S10 32'h40a0000


// Name:         AXI_R3_BEA_S10
// Default:      0x40affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S10 32'h40affff
 

// Name:         AXI_R3_BSA_S11
// Default:      0x40b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S11 32'h40b0000


// Name:         AXI_R3_BEA_S11
// Default:      0x40bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S11 32'h40bffff
 

// Name:         AXI_R3_BSA_S12
// Default:      0x40c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S12 32'h40c0000


// Name:         AXI_R3_BEA_S12
// Default:      0x40cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S12 32'h40cffff
 

// Name:         AXI_R3_BSA_S13
// Default:      0x40d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S13 32'h40d0000


// Name:         AXI_R3_BEA_S13
// Default:      0x40dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S13 32'h40dffff
 

// Name:         AXI_R3_BSA_S14
// Default:      0x40e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S14 32'h40e0000


// Name:         AXI_R3_BEA_S14
// Default:      0x40effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S14 32'h40effff
 

// Name:         AXI_R3_BSA_S15
// Default:      0x40f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S15 32'h40f0000


// Name:         AXI_R3_BEA_S15
// Default:      0x40fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S15 32'h40fffff
 

// Name:         AXI_R3_BSA_S16
// Default:      0x4000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 3)
// 
// Region 3, Boot addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BSA_S16 32'h4000000


// Name:         AXI_R3_BEA_S16
// Default:      0x400ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 3)
// 
// Region 3, Boot addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R3_BEA_S16 32'h400ffff
 

// Name:         AXI_R4_BSA_S1
// Default:      0x5010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S1 32'h5010000


// Name:         AXI_R4_BEA_S1
// Default:      0x501ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S1 32'h501ffff
 

// Name:         AXI_R4_BSA_S2
// Default:      0x5020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S2 32'h5020000


// Name:         AXI_R4_BEA_S2
// Default:      0x502ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S2 32'h502ffff
 

// Name:         AXI_R4_BSA_S3
// Default:      0x5030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S3 32'h5030000


// Name:         AXI_R4_BEA_S3
// Default:      0x503ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S3 32'h503ffff
 

// Name:         AXI_R4_BSA_S4
// Default:      0x5040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S4 32'h5040000


// Name:         AXI_R4_BEA_S4
// Default:      0x504ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S4 32'h504ffff
 

// Name:         AXI_R4_BSA_S5
// Default:      0x5050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S5 32'h5050000


// Name:         AXI_R4_BEA_S5
// Default:      0x505ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S5 32'h505ffff
 

// Name:         AXI_R4_BSA_S6
// Default:      0x5060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S6 32'h5060000


// Name:         AXI_R4_BEA_S6
// Default:      0x506ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S6 32'h506ffff
 

// Name:         AXI_R4_BSA_S7
// Default:      0x5070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S7 32'h5070000


// Name:         AXI_R4_BEA_S7
// Default:      0x507ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S7 32'h507ffff
 

// Name:         AXI_R4_BSA_S8
// Default:      0x5080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S8 32'h5080000


// Name:         AXI_R4_BEA_S8
// Default:      0x508ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S8 32'h508ffff
 

// Name:         AXI_R4_BSA_S9
// Default:      0x5090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S9 32'h5090000


// Name:         AXI_R4_BEA_S9
// Default:      0x509ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S9 32'h509ffff
 

// Name:         AXI_R4_BSA_S10
// Default:      0x50a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S10 32'h50a0000


// Name:         AXI_R4_BEA_S10
// Default:      0x50affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S10 32'h50affff
 

// Name:         AXI_R4_BSA_S11
// Default:      0x50b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S11 32'h50b0000


// Name:         AXI_R4_BEA_S11
// Default:      0x50bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S11 32'h50bffff
 

// Name:         AXI_R4_BSA_S12
// Default:      0x50c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S12 32'h50c0000


// Name:         AXI_R4_BEA_S12
// Default:      0x50cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S12 32'h50cffff
 

// Name:         AXI_R4_BSA_S13
// Default:      0x50d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S13 32'h50d0000


// Name:         AXI_R4_BEA_S13
// Default:      0x50dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S13 32'h50dffff
 

// Name:         AXI_R4_BSA_S14
// Default:      0x50e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S14 32'h50e0000


// Name:         AXI_R4_BEA_S14
// Default:      0x50effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S14 32'h50effff
 

// Name:         AXI_R4_BSA_S15
// Default:      0x50f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S15 32'h50f0000


// Name:         AXI_R4_BEA_S15
// Default:      0x50fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S15 32'h50fffff
 

// Name:         AXI_R4_BSA_S16
// Default:      0x5000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 4)
// 
// Region 4, Boot addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BSA_S16 32'h5000000


// Name:         AXI_R4_BEA_S16
// Default:      0x500ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 4)
// 
// Region 4, Boot addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R4_BEA_S16 32'h500ffff
 

// Name:         AXI_R5_BSA_S1
// Default:      0x6010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S1 32'h6010000


// Name:         AXI_R5_BEA_S1
// Default:      0x601ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S1 32'h601ffff
 

// Name:         AXI_R5_BSA_S2
// Default:      0x6020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S2 32'h6020000


// Name:         AXI_R5_BEA_S2
// Default:      0x602ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S2 32'h602ffff
 

// Name:         AXI_R5_BSA_S3
// Default:      0x6030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S3 32'h6030000


// Name:         AXI_R5_BEA_S3
// Default:      0x603ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S3 32'h603ffff
 

// Name:         AXI_R5_BSA_S4
// Default:      0x6040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S4 32'h6040000


// Name:         AXI_R5_BEA_S4
// Default:      0x604ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S4 32'h604ffff
 

// Name:         AXI_R5_BSA_S5
// Default:      0x6050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S5 32'h6050000


// Name:         AXI_R5_BEA_S5
// Default:      0x605ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S5 32'h605ffff
 

// Name:         AXI_R5_BSA_S6
// Default:      0x6060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S6 32'h6060000


// Name:         AXI_R5_BEA_S6
// Default:      0x606ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S6 32'h606ffff
 

// Name:         AXI_R5_BSA_S7
// Default:      0x6070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S7 32'h6070000


// Name:         AXI_R5_BEA_S7
// Default:      0x607ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S7 32'h607ffff
 

// Name:         AXI_R5_BSA_S8
// Default:      0x6080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S8 32'h6080000


// Name:         AXI_R5_BEA_S8
// Default:      0x608ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S8 32'h608ffff
 

// Name:         AXI_R5_BSA_S9
// Default:      0x6090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S9 32'h6090000


// Name:         AXI_R5_BEA_S9
// Default:      0x609ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S9 32'h609ffff
 

// Name:         AXI_R5_BSA_S10
// Default:      0x60a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S10 32'h60a0000


// Name:         AXI_R5_BEA_S10
// Default:      0x60affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S10 32'h60affff
 

// Name:         AXI_R5_BSA_S11
// Default:      0x60b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S11 32'h60b0000


// Name:         AXI_R5_BEA_S11
// Default:      0x60bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S11 32'h60bffff
 

// Name:         AXI_R5_BSA_S12
// Default:      0x60c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S12 32'h60c0000


// Name:         AXI_R5_BEA_S12
// Default:      0x60cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S12 32'h60cffff
 

// Name:         AXI_R5_BSA_S13
// Default:      0x60d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S13 32'h60d0000


// Name:         AXI_R5_BEA_S13
// Default:      0x60dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S13 32'h60dffff
 

// Name:         AXI_R5_BSA_S14
// Default:      0x60e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S14 32'h60e0000


// Name:         AXI_R5_BEA_S14
// Default:      0x60effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S14 32'h60effff
 

// Name:         AXI_R5_BSA_S15
// Default:      0x60f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S15 32'h60f0000


// Name:         AXI_R5_BEA_S15
// Default:      0x60fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S15 32'h60fffff
 

// Name:         AXI_R5_BSA_S16
// Default:      0x6000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 5)
// 
// Region 5, Boot addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BSA_S16 32'h6000000


// Name:         AXI_R5_BEA_S16
// Default:      0x600ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 5)
// 
// Region 5, Boot addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R5_BEA_S16 32'h600ffff
 

// Name:         AXI_R6_BSA_S1
// Default:      0x7010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S1 32'h7010000


// Name:         AXI_R6_BEA_S1
// Default:      0x701ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S1 32'h701ffff
 

// Name:         AXI_R6_BSA_S2
// Default:      0x7020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S2 32'h7020000


// Name:         AXI_R6_BEA_S2
// Default:      0x702ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S2 32'h702ffff
 

// Name:         AXI_R6_BSA_S3
// Default:      0x7030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S3 32'h7030000


// Name:         AXI_R6_BEA_S3
// Default:      0x703ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S3 32'h703ffff
 

// Name:         AXI_R6_BSA_S4
// Default:      0x7040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S4 32'h7040000


// Name:         AXI_R6_BEA_S4
// Default:      0x704ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S4 32'h704ffff
 

// Name:         AXI_R6_BSA_S5
// Default:      0x7050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S5 32'h7050000


// Name:         AXI_R6_BEA_S5
// Default:      0x705ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S5 32'h705ffff
 

// Name:         AXI_R6_BSA_S6
// Default:      0x7060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S6 32'h7060000


// Name:         AXI_R6_BEA_S6
// Default:      0x706ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S6 32'h706ffff
 

// Name:         AXI_R6_BSA_S7
// Default:      0x7070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S7 32'h7070000


// Name:         AXI_R6_BEA_S7
// Default:      0x707ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S7 32'h707ffff
 

// Name:         AXI_R6_BSA_S8
// Default:      0x7080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S8 32'h7080000


// Name:         AXI_R6_BEA_S8
// Default:      0x708ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S8 32'h708ffff
 

// Name:         AXI_R6_BSA_S9
// Default:      0x7090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S9 32'h7090000


// Name:         AXI_R6_BEA_S9
// Default:      0x709ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S9 32'h709ffff
 

// Name:         AXI_R6_BSA_S10
// Default:      0x70a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S10 32'h70a0000


// Name:         AXI_R6_BEA_S10
// Default:      0x70affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S10 32'h70affff
 

// Name:         AXI_R6_BSA_S11
// Default:      0x70b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S11 32'h70b0000


// Name:         AXI_R6_BEA_S11
// Default:      0x70bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S11 32'h70bffff
 

// Name:         AXI_R6_BSA_S12
// Default:      0x70c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S12 32'h70c0000


// Name:         AXI_R6_BEA_S12
// Default:      0x70cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S12 32'h70cffff
 

// Name:         AXI_R6_BSA_S13
// Default:      0x70d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S13 32'h70d0000


// Name:         AXI_R6_BEA_S13
// Default:      0x70dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S13 32'h70dffff
 

// Name:         AXI_R6_BSA_S14
// Default:      0x70e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S14 32'h70e0000


// Name:         AXI_R6_BEA_S14
// Default:      0x70effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S14 32'h70effff
 

// Name:         AXI_R6_BSA_S15
// Default:      0x70f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S15 32'h70f0000


// Name:         AXI_R6_BEA_S15
// Default:      0x70fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S15 32'h70fffff
 

// Name:         AXI_R6_BSA_S16
// Default:      0x7000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 6)
// 
// Region 6, Boot addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BSA_S16 32'h7000000


// Name:         AXI_R6_BEA_S16
// Default:      0x700ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 6)
// 
// Region 6, Boot addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R6_BEA_S16 32'h700ffff
 

// Name:         AXI_R7_BSA_S1
// Default:      0x8010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S1 32'h8010000


// Name:         AXI_R7_BEA_S1
// Default:      0x801ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S1 32'h801ffff
 

// Name:         AXI_R7_BSA_S2
// Default:      0x8020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S2 32'h8020000


// Name:         AXI_R7_BEA_S2
// Default:      0x802ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S2 32'h802ffff
 

// Name:         AXI_R7_BSA_S3
// Default:      0x8030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S3 32'h8030000


// Name:         AXI_R7_BEA_S3
// Default:      0x803ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S3 32'h803ffff
 

// Name:         AXI_R7_BSA_S4
// Default:      0x8040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S4 32'h8040000


// Name:         AXI_R7_BEA_S4
// Default:      0x804ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S4 32'h804ffff
 

// Name:         AXI_R7_BSA_S5
// Default:      0x8050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S5 32'h8050000


// Name:         AXI_R7_BEA_S5
// Default:      0x805ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S5 32'h805ffff
 

// Name:         AXI_R7_BSA_S6
// Default:      0x8060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S6 32'h8060000


// Name:         AXI_R7_BEA_S6
// Default:      0x806ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S6 32'h806ffff
 

// Name:         AXI_R7_BSA_S7
// Default:      0x8070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S7 32'h8070000


// Name:         AXI_R7_BEA_S7
// Default:      0x807ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S7 32'h807ffff
 

// Name:         AXI_R7_BSA_S8
// Default:      0x8080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S8 32'h8080000


// Name:         AXI_R7_BEA_S8
// Default:      0x808ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S8 32'h808ffff
 

// Name:         AXI_R7_BSA_S9
// Default:      0x8090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S9 32'h8090000


// Name:         AXI_R7_BEA_S9
// Default:      0x809ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S9 32'h809ffff
 

// Name:         AXI_R7_BSA_S10
// Default:      0x80a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S10 32'h80a0000


// Name:         AXI_R7_BEA_S10
// Default:      0x80affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S10 32'h80affff
 

// Name:         AXI_R7_BSA_S11
// Default:      0x80b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S11 32'h80b0000


// Name:         AXI_R7_BEA_S11
// Default:      0x80bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S11 32'h80bffff
 

// Name:         AXI_R7_BSA_S12
// Default:      0x80c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S12 32'h80c0000


// Name:         AXI_R7_BEA_S12
// Default:      0x80cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S12 32'h80cffff
 

// Name:         AXI_R7_BSA_S13
// Default:      0x80d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S13 32'h80d0000


// Name:         AXI_R7_BEA_S13
// Default:      0x80dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S13 32'h80dffff
 

// Name:         AXI_R7_BSA_S14
// Default:      0x80e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S14 32'h80e0000


// Name:         AXI_R7_BEA_S14
// Default:      0x80effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S14 32'h80effff
 

// Name:         AXI_R7_BSA_S15
// Default:      0x80f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S15 32'h80f0000


// Name:         AXI_R7_BEA_S15
// Default:      0x80fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S15 32'h80fffff
 

// Name:         AXI_R7_BSA_S16
// Default:      0x8000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 7)
// 
// Region 7, Boot addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BSA_S16 32'h8000000


// Name:         AXI_R7_BEA_S16
// Default:      0x800ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 7)
// 
// Region 7, Boot addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R7_BEA_S16 32'h800ffff
 

// Name:         AXI_R8_BSA_S1
// Default:      0x9010000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S1 32'h9010000


// Name:         AXI_R8_BEA_S1
// Default:      0x901ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 1) && (AXI_BV_S1_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S1 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 1. 
// This parameter option is changeable only if there is at least 1 slave(s)  
// in the system and at least one master has access to Slave 1 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S1 32'h901ffff
 

// Name:         AXI_R8_BSA_S2
// Default:      0x9020000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S2 32'h9020000


// Name:         AXI_R8_BEA_S2
// Default:      0x902ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 2) && (AXI_BV_S2_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S2 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 2. 
// This parameter option is changeable only if there is at least 2 slave(s)  
// in the system and at least one master has access to Slave 2 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S2 32'h902ffff
 

// Name:         AXI_R8_BSA_S3
// Default:      0x9030000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S3 32'h9030000


// Name:         AXI_R8_BEA_S3
// Default:      0x903ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 3) && (AXI_BV_S3_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S3 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 3. 
// This parameter option is changeable only if there is at least 3 slave(s)  
// in the system and at least one master has access to Slave 3 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S3 32'h903ffff
 

// Name:         AXI_R8_BSA_S4
// Default:      0x9040000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S4 32'h9040000


// Name:         AXI_R8_BEA_S4
// Default:      0x904ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 4) && (AXI_BV_S4_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S4 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 4. 
// This parameter option is changeable only if there is at least 4 slave(s)  
// in the system and at least one master has access to Slave 4 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S4 32'h904ffff
 

// Name:         AXI_R8_BSA_S5
// Default:      0x9050000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S5 32'h9050000


// Name:         AXI_R8_BEA_S5
// Default:      0x905ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 5) && (AXI_BV_S5_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S5 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 5. 
// This parameter option is changeable only if there is at least 5 slave(s)  
// in the system and at least one master has access to Slave 5 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S5 32'h905ffff
 

// Name:         AXI_R8_BSA_S6
// Default:      0x9060000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S6 32'h9060000


// Name:         AXI_R8_BEA_S6
// Default:      0x906ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 6) && (AXI_BV_S6_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S6 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 6. 
// This parameter option is changeable only if there is at least 6 slave(s)  
// in the system and at least one master has access to Slave 6 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S6 32'h906ffff
 

// Name:         AXI_R8_BSA_S7
// Default:      0x9070000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S7 32'h9070000


// Name:         AXI_R8_BEA_S7
// Default:      0x907ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 7) && (AXI_BV_S7_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S7 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 7. 
// This parameter option is changeable only if there is at least 7 slave(s)  
// in the system and at least one master has access to Slave 7 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S7 32'h907ffff
 

// Name:         AXI_R8_BSA_S8
// Default:      0x9080000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S8 32'h9080000


// Name:         AXI_R8_BEA_S8
// Default:      0x908ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 8) && (AXI_BV_S8_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S8 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 8. 
// This parameter option is changeable only if there is at least 8 slave(s)  
// in the system and at least one master has access to Slave 8 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S8 32'h908ffff
 

// Name:         AXI_R8_BSA_S9
// Default:      0x9090000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S9 32'h9090000


// Name:         AXI_R8_BEA_S9
// Default:      0x909ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 9) && (AXI_BV_S9_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 1) 
//               && (AXI_NUM_RB_S9 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 9. 
// This parameter option is changeable only if there is at least 9 slave(s)  
// in the system and at least one master has access to Slave 9 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S9 32'h909ffff
 

// Name:         AXI_R8_BSA_S10
// Default:      0x90a0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S10 32'h90a0000


// Name:         AXI_R8_BEA_S10
// Default:      0x90affff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 10) && (AXI_BV_S10_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S10 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 10. 
// This parameter option is changeable only if there is at least 10 slave(s)  
// in the system and at least one master has access to Slave 10 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S10 32'h90affff
 

// Name:         AXI_R8_BSA_S11
// Default:      0x90b0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S11 32'h90b0000


// Name:         AXI_R8_BEA_S11
// Default:      0x90bffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 11) && (AXI_BV_S11_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S11 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 11. 
// This parameter option is changeable only if there is at least 11 slave(s)  
// in the system and at least one master has access to Slave 11 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S11 32'h90bffff
 

// Name:         AXI_R8_BSA_S12
// Default:      0x90c0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S12 32'h90c0000


// Name:         AXI_R8_BEA_S12
// Default:      0x90cffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 12) && (AXI_BV_S12_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S12 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 12. 
// This parameter option is changeable only if there is at least 12 slave(s)  
// in the system and at least one master has access to Slave 12 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S12 32'h90cffff
 

// Name:         AXI_R8_BSA_S13
// Default:      0x90d0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S13 32'h90d0000


// Name:         AXI_R8_BEA_S13
// Default:      0x90dffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 13) && (AXI_BV_S13_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S13 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 13. 
// This parameter option is changeable only if there is at least 13 slave(s)  
// in the system and at least one master has access to Slave 13 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S13 32'h90dffff
 

// Name:         AXI_R8_BSA_S14
// Default:      0x90e0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S14 32'h90e0000


// Name:         AXI_R8_BEA_S14
// Default:      0x90effff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 14) && (AXI_BV_S14_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S14 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 14. 
// This parameter option is changeable only if there is at least 14 slave(s)  
// in the system and at least one master has access to Slave 14 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S14 32'h90effff
 

// Name:         AXI_R8_BSA_S15
// Default:      0x90f0000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S15 32'h90f0000


// Name:         AXI_R8_BEA_S15
// Default:      0x90fffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 15) && (AXI_BV_S15_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S15 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 15. 
// This parameter option is changeable only if there is at least 15 slave(s)  
// in the system and at least one master has access to Slave 15 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S15 32'h90fffff
 

// Name:         AXI_R8_BSA_S16
// Default:      0x9000000
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 8)
// 
// Region 8, Boot addressing mode, Start address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BSA_S16 32'h9000000


// Name:         AXI_R8_BEA_S16
// Default:      0x900ffff
// Values:       0x0, ..., =sHdl::MaxValFromWidth
// Enabled:      (AXI_NUM_SLAVES >= 16) && (AXI_BV_S16_BY_ANY_M == 1) && 
//               (AXI_HAS_XDCDR == 0 || AXI_TEST_XDCDR == 1) && (AXI_REMAP_EN == 
//               1) && (AXI_NUM_RB_S16 >= 8)
// 
// Region 8, Boot addressing mode, End address for Slave 16. 
// This parameter option is changeable only if there is at least 16 slave(s)  
// in the system and at least one master has access to Slave 16 and if one 
// has an internal decoder (AXI_HAS_XDCDR = 0).
`define AXI_R8_BEA_S16 32'h900ffff
 

//This is the sum of all the pieces that make up the payload of 
//the Read Address Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_AR_PYLD_M_W 54


//This is the sum of all the pieces that make up the payload of 
//the Write Address Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_AW_PYLD_M_W 54


//This is the sum of all the pieces that make up the payload of 
//the Write Data Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_W_PYLD_M_W 77


//This is the sum of all the pieces that make up the payload of 
//the Read Data Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_R_PYLD_M_W 71


//This is the sum of all the pieces that make up the payload of 
//the Write Response Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_B_PYLD_M_W 6


//This is the sum of all the pieces that make up the payload of 
//the Read Address Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_AR_PYLD_S_W 55


//This is the sum of all the pieces that make up the payload of 
//the Write Address Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_AW_PYLD_S_W 55


//This is the sum of all the pieces that make up the payload of 
//the Write Data Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_W_PYLD_S_W 78


//This is the sum of all the pieces that make up the payload of 
//the Read Data Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_R_PYLD_S_W 72


//This is the sum of all the pieces that make up the payload of 
//the Write Response Channel. It does not include the valid or the ready.
//It does include the width of the sideband signal provided these are
//required and included by the user.
`define AXI_B_PYLD_S_W 7


//  Define for each slave present
`define AXI_HAS_S0
`define AXI_HAS_S1

//  Define for each master present
`define AXI_HAS_M1
`define AXI_HAS_M2

// Each master can see the default slave
`define AXI_NMV_S0 `AXI_NUM_MASTERS

//Creates a define for whether we support Bi-directional commands between interconnects.




// Name:         AXI_SYS_NUM_FOR_M1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 1 && AXI_NUM_SYS_MASTERS 
//               >= 1 && AXI_NUM_ICM < 1
// 
// AXI_SYS_NUM_FOR_M1 
// Set the System Master number for Master port 1
`define AXI_SYS_NUM_FOR_M1 1


// Name:         AXI_SYS_NUM_FOR_M2
// Default:      2
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 2 && AXI_NUM_SYS_MASTERS 
//               >= 2 && AXI_NUM_ICM < 2
// 
// AXI_SYS_NUM_FOR_M2 
// Set the System Master number for Master port 2
`define AXI_SYS_NUM_FOR_M2 2


// Name:         AXI_SYS_NUM_FOR_M3
// Default:      3
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 3 && AXI_NUM_SYS_MASTERS 
//               >= 3 && AXI_NUM_ICM < 3
// 
// AXI_SYS_NUM_FOR_M3 
// Set the System Master number for Master port 3
`define AXI_SYS_NUM_FOR_M3 3


// Name:         AXI_SYS_NUM_FOR_M4
// Default:      4
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 4 && AXI_NUM_SYS_MASTERS 
//               >= 4 && AXI_NUM_ICM < 4
// 
// AXI_SYS_NUM_FOR_M4 
// Set the System Master number for Master port 4
`define AXI_SYS_NUM_FOR_M4 4


// Name:         AXI_SYS_NUM_FOR_M5
// Default:      5
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 5 && AXI_NUM_SYS_MASTERS 
//               >= 5 && AXI_NUM_ICM < 5
// 
// AXI_SYS_NUM_FOR_M5 
// Set the System Master number for Master port 5
`define AXI_SYS_NUM_FOR_M5 5


// Name:         AXI_SYS_NUM_FOR_M6
// Default:      6
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 6 && AXI_NUM_SYS_MASTERS 
//               >= 6 && AXI_NUM_ICM < 6
// 
// AXI_SYS_NUM_FOR_M6 
// Set the System Master number for Master port 6
`define AXI_SYS_NUM_FOR_M6 6


// Name:         AXI_SYS_NUM_FOR_M7
// Default:      7
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 7 && AXI_NUM_SYS_MASTERS 
//               >= 7 && AXI_NUM_ICM < 7
// 
// AXI_SYS_NUM_FOR_M7 
// Set the System Master number for Master port 7
`define AXI_SYS_NUM_FOR_M7 7


// Name:         AXI_SYS_NUM_FOR_M8
// Default:      8
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 8 && AXI_NUM_SYS_MASTERS 
//               >= 8 && AXI_NUM_ICM < 8
// 
// AXI_SYS_NUM_FOR_M8 
// Set the System Master number for Master port 8
`define AXI_SYS_NUM_FOR_M8 8


// Name:         AXI_SYS_NUM_FOR_M9
// Default:      9
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 9 && AXI_NUM_SYS_MASTERS 
//               >= 9 && AXI_NUM_ICM < 9
// 
// AXI_SYS_NUM_FOR_M9 
// Set the System Master number for Master port 9
`define AXI_SYS_NUM_FOR_M9 9


// Name:         AXI_SYS_NUM_FOR_M10
// Default:      10
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 10 && AXI_NUM_SYS_MASTERS 
//               >= 10 && AXI_NUM_ICM < 10
// 
// AXI_SYS_NUM_FOR_M10 
// Set the System Master number for Master port 10
`define AXI_SYS_NUM_FOR_M10 10


// Name:         AXI_SYS_NUM_FOR_M11
// Default:      11
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 11 && AXI_NUM_SYS_MASTERS 
//               >= 11 && AXI_NUM_ICM < 11
// 
// AXI_SYS_NUM_FOR_M11 
// Set the System Master number for Master port 11
`define AXI_SYS_NUM_FOR_M11 11


// Name:         AXI_SYS_NUM_FOR_M12
// Default:      12
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 12 && AXI_NUM_SYS_MASTERS 
//               >= 12 && AXI_NUM_ICM < 12
// 
// AXI_SYS_NUM_FOR_M12 
// Set the System Master number for Master port 12
`define AXI_SYS_NUM_FOR_M12 12


// Name:         AXI_SYS_NUM_FOR_M13
// Default:      13
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 13 && AXI_NUM_SYS_MASTERS 
//               >= 13 && AXI_NUM_ICM < 13
// 
// AXI_SYS_NUM_FOR_M13 
// Set the System Master number for Master port 13
`define AXI_SYS_NUM_FOR_M13 13


// Name:         AXI_SYS_NUM_FOR_M14
// Default:      14
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 14 && AXI_NUM_SYS_MASTERS 
//               >= 14 && AXI_NUM_ICM < 14
// 
// AXI_SYS_NUM_FOR_M14 
// Set the System Master number for Master port 14
`define AXI_SYS_NUM_FOR_M14 14


// Name:         AXI_SYS_NUM_FOR_M15
// Default:      15
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 15 && AXI_NUM_SYS_MASTERS 
//               >= 15 && AXI_NUM_ICM < 15
// 
// AXI_SYS_NUM_FOR_M15 
// Set the System Master number for Master port 15
`define AXI_SYS_NUM_FOR_M15 15


// Name:         AXI_SYS_NUM_FOR_M16
// Default:      16
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_MASTERS >= 16 && AXI_NUM_SYS_MASTERS 
//               >= 16 && AXI_NUM_ICM < 16
// 
// AXI_SYS_NUM_FOR_M16 
// Set the System Master number for Master port 16
`define AXI_SYS_NUM_FOR_M16 16


// Name:         AXI_NUM_ICM
// Default:      0
// Values:       0, ..., 4
// Enabled:      AXI_HAS_BICMD == 1
// 
// This is the number of Master ports on the interconnect that are 
// configured as Interconnecting Master Ports
`define AXI_NUM_ICM 0




// Name:         AXI_ACC_NON_LCL_SLV_S1
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 1)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S1 0



// Name:         AXI_ACC_NON_LCL_SLV_S2
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 2)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S2 0



// Name:         AXI_ACC_NON_LCL_SLV_S3
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 3)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S3 0



// Name:         AXI_ACC_NON_LCL_SLV_S4
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 4)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S4 0



// Name:         AXI_ACC_NON_LCL_SLV_S5
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 5)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S5 0



// Name:         AXI_ACC_NON_LCL_SLV_S6
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 6)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S6 0



// Name:         AXI_ACC_NON_LCL_SLV_S7
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 7)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S7 0



// Name:         AXI_ACC_NON_LCL_SLV_S8
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 8)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S8 0



// Name:         AXI_ACC_NON_LCL_SLV_S9
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 9)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S9 0



// Name:         AXI_ACC_NON_LCL_SLV_S10
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 10)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S10 0



// Name:         AXI_ACC_NON_LCL_SLV_S11
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 11)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S11 0



// Name:         AXI_ACC_NON_LCL_SLV_S12
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 12)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S12 0



// Name:         AXI_ACC_NON_LCL_SLV_S13
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 13)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S13 0



// Name:         AXI_ACC_NON_LCL_SLV_S14
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 14)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S14 0



// Name:         AXI_ACC_NON_LCL_SLV_S15
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 15)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S15 0



// Name:         AXI_ACC_NON_LCL_SLV_S16
// Default:      false
// Values:       false (0), true (1)
// Enabled:      (AXI_HAS_BICMD | AXI_EN_MULTI_TILE_DLOCK_AVOID) & (AXI_NUM_SLAVES 
//               >= 16)
// 
// Used to prevent a deadlock scenario in multi-tile DW_axi systems. 
// Set to 1 for every slave port which will access a non local slave, 
// i.e. the slave port is not connected directly to a system slave, but is connected to the 
// master port of a different DW_axi instance.
`define AXI_ACC_NON_LCL_SLV_S16 0


//  Define for each interconnecting master port present.
`define AXI_IS_ICM_M1 0
`define AXI_IS_ICM_M2 0
`define AXI_IS_ICM_M3 0
`define AXI_IS_ICM_M4 0
`define AXI_IS_ICM_M5 0
`define AXI_IS_ICM_M6 0
`define AXI_IS_ICM_M7 0
`define AXI_IS_ICM_M8 0
`define AXI_IS_ICM_M9 0
`define AXI_IS_ICM_M10 0
`define AXI_IS_ICM_M11 0
`define AXI_IS_ICM_M12 0
`define AXI_IS_ICM_M13 0
`define AXI_IS_ICM_M14 0
`define AXI_IS_ICM_M15 0
`define AXI_IS_ICM_M16 0

//Creates a define for whether ICM port 1 exists

// `define AXI_HAS_ICM1

//Creates a define for whether ICM port 2 exists

// `define AXI_HAS_ICM2

//Creates a define for whether ICM port 3 exists

// `define AXI_HAS_ICM3

//Creates a define for whether ICM port 4 exists

// `define AXI_HAS_ICM4


`define AXI_IDW_M1 4


`define AXI_IDW_M2 4


`define AXI_IDW_M3 4


`define AXI_IDW_M4 4


// Name:         AXI_NUM_MST_THRU_ICM1
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_ICM > 1
// 
// Set the total number of System Masters that can forward 
// transactions through interconnecting Master port 1
`define AXI_NUM_MST_THRU_ICM1 1


// Name:         AXI_NUM_MST_THRU_ICM2
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_ICM >= 2
// 
// Set the total number of System Masters that can forward 
// transactions through interconnecting Master port 2
`define AXI_NUM_MST_THRU_ICM2 1


// Name:         AXI_NUM_MST_THRU_ICM3
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_ICM >= 3
// 
// Set the total number of System Masters that can forward 
// transactions through interconnecting Master port 3
`define AXI_NUM_MST_THRU_ICM3 1


// Name:         AXI_NUM_MST_THRU_ICM4
// Default:      1
// Values:       1, ..., 8
// Enabled:      AXI_HAS_BICMD == 1 && AXI_NUM_ICM >= 4
// 
// Set the total number of System Masters that can forward 
// transactions through interconnecting Master port 4
`define AXI_NUM_MST_THRU_ICM4 1


// Name:         AXI_ALLOW_MST1_ICM1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM1 > 
//               0)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 1 in Normal mode
`define AXI_ALLOW_MST1_ICM1 1


// Name:         AXI_ALLOW_MST2_ICM1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM1 > 
//               1)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 1 in Normal mode
`define AXI_ALLOW_MST2_ICM1 1


// Name:         AXI_ALLOW_MST3_ICM1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM1 > 
//               2)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 1 in Normal mode
`define AXI_ALLOW_MST3_ICM1 1


// Name:         AXI_ALLOW_MST4_ICM1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM1 > 
//               3)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 1 in Normal mode
`define AXI_ALLOW_MST4_ICM1 1


// Name:         AXI_ALLOW_MST5_ICM1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM1 > 
//               4)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 1 in Normal mode
`define AXI_ALLOW_MST5_ICM1 1


// Name:         AXI_ALLOW_MST6_ICM1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM1 > 
//               5)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 1 in Normal mode
`define AXI_ALLOW_MST6_ICM1 1


// Name:         AXI_ALLOW_MST7_ICM1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM1 > 
//               6)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 1 in Normal mode
`define AXI_ALLOW_MST7_ICM1 1


// Name:         AXI_ALLOW_MST8_ICM1
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM1 > 
//               7)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 1 in Normal mode
`define AXI_ALLOW_MST8_ICM1 1


// Name:         AXI_ALLOW_MST1_ICM2
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM2 > 
//               0)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 2 in Normal mode
`define AXI_ALLOW_MST1_ICM2 1


// Name:         AXI_ALLOW_MST2_ICM2
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM2 > 
//               1)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 2 in Normal mode
`define AXI_ALLOW_MST2_ICM2 1


// Name:         AXI_ALLOW_MST3_ICM2
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM2 > 
//               2)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 2 in Normal mode
`define AXI_ALLOW_MST3_ICM2 1


// Name:         AXI_ALLOW_MST4_ICM2
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM2 > 
//               3)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 2 in Normal mode
`define AXI_ALLOW_MST4_ICM2 1


// Name:         AXI_ALLOW_MST5_ICM2
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM2 > 
//               4)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 2 in Normal mode
`define AXI_ALLOW_MST5_ICM2 1


// Name:         AXI_ALLOW_MST6_ICM2
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM2 > 
//               5)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 2 in Normal mode
`define AXI_ALLOW_MST6_ICM2 1


// Name:         AXI_ALLOW_MST7_ICM2
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM2 > 
//               6)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 2 in Normal mode
`define AXI_ALLOW_MST7_ICM2 1


// Name:         AXI_ALLOW_MST8_ICM2
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 1) && (AXI_NUM_MST_THRU_ICM2 > 
//               7)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 2 in Normal mode
`define AXI_ALLOW_MST8_ICM2 1


// Name:         AXI_ALLOW_MST1_ICM3
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 2) && (AXI_NUM_MST_THRU_ICM3 > 
//               0)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 3 in Normal mode
`define AXI_ALLOW_MST1_ICM3 1


// Name:         AXI_ALLOW_MST2_ICM3
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 2) && (AXI_NUM_MST_THRU_ICM3 > 
//               1)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 3 in Normal mode
`define AXI_ALLOW_MST2_ICM3 1


// Name:         AXI_ALLOW_MST3_ICM3
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 2) && (AXI_NUM_MST_THRU_ICM3 > 
//               2)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 3 in Normal mode
`define AXI_ALLOW_MST3_ICM3 1


// Name:         AXI_ALLOW_MST4_ICM3
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 2) && (AXI_NUM_MST_THRU_ICM3 > 
//               3)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 3 in Normal mode
`define AXI_ALLOW_MST4_ICM3 1


// Name:         AXI_ALLOW_MST5_ICM3
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 2) && (AXI_NUM_MST_THRU_ICM3 > 
//               4)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 3 in Normal mode
`define AXI_ALLOW_MST5_ICM3 1


// Name:         AXI_ALLOW_MST6_ICM3
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 2) && (AXI_NUM_MST_THRU_ICM3 > 
//               5)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 3 in Normal mode
`define AXI_ALLOW_MST6_ICM3 1


// Name:         AXI_ALLOW_MST7_ICM3
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 2) && (AXI_NUM_MST_THRU_ICM3 > 
//               6)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 3 in Normal mode
`define AXI_ALLOW_MST7_ICM3 1


// Name:         AXI_ALLOW_MST8_ICM3
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 2) && (AXI_NUM_MST_THRU_ICM3 > 
//               7)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 3 in Normal mode
`define AXI_ALLOW_MST8_ICM3 1


// Name:         AXI_ALLOW_MST1_ICM4
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 3) && (AXI_NUM_MST_THRU_ICM4 > 
//               0)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 4 in Normal mode
`define AXI_ALLOW_MST1_ICM4 1


// Name:         AXI_ALLOW_MST2_ICM4
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 3) && (AXI_NUM_MST_THRU_ICM4 > 
//               1)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 4 in Normal mode
`define AXI_ALLOW_MST2_ICM4 1


// Name:         AXI_ALLOW_MST3_ICM4
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 3) && (AXI_NUM_MST_THRU_ICM4 > 
//               2)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 4 in Normal mode
`define AXI_ALLOW_MST3_ICM4 1


// Name:         AXI_ALLOW_MST4_ICM4
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 3) && (AXI_NUM_MST_THRU_ICM4 > 
//               3)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 4 in Normal mode
`define AXI_ALLOW_MST4_ICM4 1


// Name:         AXI_ALLOW_MST5_ICM4
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 3) && (AXI_NUM_MST_THRU_ICM4 > 
//               4)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 4 in Normal mode
`define AXI_ALLOW_MST5_ICM4 1


// Name:         AXI_ALLOW_MST6_ICM4
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 3) && (AXI_NUM_MST_THRU_ICM4 > 
//               5)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 4 in Normal mode
`define AXI_ALLOW_MST6_ICM4 1


// Name:         AXI_ALLOW_MST7_ICM4
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 3) && (AXI_NUM_MST_THRU_ICM4 > 
//               6)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 4 in Normal mode
`define AXI_ALLOW_MST7_ICM4 1


// Name:         AXI_ALLOW_MST8_ICM4
// Default:      1
// Values:       1, ..., =@AXI_NUM_SYS_MASTERS
// Enabled:      AXI_HAS_BICMD == 1 && (AXI_NUM_ICM > 3) && (AXI_NUM_MST_THRU_ICM4 > 
//               7)
// 
// Set a System Master number that can forward 
// transactions through interconnecting Master port 4 in Normal mode
`define AXI_ALLOW_MST8_ICM4 1

`define AXI_PNUM_FOR_SYS_NUM_M1 1


`define AXI_PNUM_FOR_SYS_NUM_M2 2


`define AXI_PNUM_FOR_SYS_NUM_M3 0


`define AXI_PNUM_FOR_SYS_NUM_M4 0


`define AXI_PNUM_FOR_SYS_NUM_M5 0


`define AXI_PNUM_FOR_SYS_NUM_M6 0


`define AXI_PNUM_FOR_SYS_NUM_M7 0


`define AXI_PNUM_FOR_SYS_NUM_M8 0


`define AXI_PNUM_FOR_SYS_NUM_M9 0


`define AXI_PNUM_FOR_SYS_NUM_M10 0


`define AXI_PNUM_FOR_SYS_NUM_M11 0


`define AXI_PNUM_FOR_SYS_NUM_M12 0


`define AXI_PNUM_FOR_SYS_NUM_M13 0


`define AXI_PNUM_FOR_SYS_NUM_M14 0


`define AXI_PNUM_FOR_SYS_NUM_M15 0


`define AXI_PNUM_FOR_SYS_NUM_M16 0


`define AXI_PNUM_FOR_SYS_NUM_M17 0


`define AXI_PNUM_FOR_SYS_NUM_M18 0


`define AXI_PNUM_FOR_SYS_NUM_M19 0


`define AXI_PNUM_FOR_SYS_NUM_M20 0


`define AXI_PNUM_FOR_SYS_NUM_M21 0


`define AXI_PNUM_FOR_SYS_NUM_M22 0


`define AXI_PNUM_FOR_SYS_NUM_M23 0


`define AXI_PNUM_FOR_SYS_NUM_M24 0


`define AXI_PNUM_FOR_SYS_NUM_M25 0


`define AXI_PNUM_FOR_SYS_NUM_M26 0


`define AXI_PNUM_FOR_SYS_NUM_M27 0


`define AXI_PNUM_FOR_SYS_NUM_M28 0


`define AXI_PNUM_FOR_SYS_NUM_M29 0


`define AXI_PNUM_FOR_SYS_NUM_M30 0


`define AXI_PNUM_FOR_SYS_NUM_M31 0


`define AXI_PNUM_FOR_SYS_NUM_M32 0


`define AXI_PNUM_FOR_SYS_NUM_M33 0


`define AXI_PNUM_FOR_SYS_NUM_M34 0


`define AXI_PNUM_FOR_SYS_NUM_M35 0


`define AXI_PNUM_FOR_SYS_NUM_M36 0


`define AXI_PNUM_FOR_SYS_NUM_M37 0


`define AXI_PNUM_FOR_SYS_NUM_M38 0


`define AXI_PNUM_FOR_SYS_NUM_M39 0


`define AXI_PNUM_FOR_SYS_NUM_M40 0


`define AXI_PNUM_FOR_SYS_NUM_M41 0


`define AXI_PNUM_FOR_SYS_NUM_M42 0


`define AXI_PNUM_FOR_SYS_NUM_M43 0


`define AXI_PNUM_FOR_SYS_NUM_M44 0


`define AXI_PNUM_FOR_SYS_NUM_M45 0


`define AXI_PNUM_FOR_SYS_NUM_M46 0


`define AXI_PNUM_FOR_SYS_NUM_M47 0


`define AXI_PNUM_FOR_SYS_NUM_M48 0


`define AXI_PNUM_FOR_SYS_NUM_M49 0


`define AXI_PNUM_FOR_SYS_NUM_M50 0


`define AXI_PNUM_FOR_SYS_NUM_M51 0


`define AXI_PNUM_FOR_SYS_NUM_M52 0


`define AXI_PNUM_FOR_SYS_NUM_M53 0


`define AXI_PNUM_FOR_SYS_NUM_M54 0


`define AXI_PNUM_FOR_SYS_NUM_M55 0


`define AXI_PNUM_FOR_SYS_NUM_M56 0


`define AXI_PNUM_FOR_SYS_NUM_M57 0


`define AXI_PNUM_FOR_SYS_NUM_M58 0


`define AXI_PNUM_FOR_SYS_NUM_M59 0


`define AXI_PNUM_FOR_SYS_NUM_M60 0


`define AXI_PNUM_FOR_SYS_NUM_M61 0


`define AXI_PNUM_FOR_SYS_NUM_M62 0


`define AXI_PNUM_FOR_SYS_NUM_M63 0


`define AXI_PNUM_FOR_SYS_NUM_M64 0

